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Author SHA1 Message Date
jianglianfang
73832ab0a4 vnc server: Fix that vnc_updater thread exited caused by readed a null data 
When updating the full-screen data, sq_ init() will clear the updqueue and add just one new full-screen data to the updqueue. So when the vnc_updater thread is awakened, it may read a null data due to multiple reading, leading to vnc_updater thread exited , which is not expected.

Signed-off-by: jianglianfang <jianglianfang@xiaomi.com>
 2023-05-25 22:41:47 +08:00
raiden00pl
e06ce27f56 boards/nrf5340-dk: add mx25 memory support 
From now on-board QSPI memory is supported.
 2023-05-25 22:41:34 +08:00
raiden00pl
8b89730e61 arch/nrf53: add QSPI support 2023-05-25 22:41:34 +08:00
raiden00pl
5ff6c8b403 arch/nrf53: add HFCLK192M clock support 
The HFCLK192M clock is required for QSPI to work
 2023-05-25 22:41:34 +08:00
raiden00pl
8943d528fd arch/nrf52: add an option to configure QSPI sampling delay for RX data 
The default RX delay value may not be suitable for high QSPI frequencies
 2023-05-25 22:39:16 +08:00
chao an
6f87bcc9ac sabre-6quad/coredump: add coredump config to enable ci check 
How to setup coredump ?

1. Build config coredump:

  $ ./tools/configure.sh ./boards/arm/imx6/sabre-6quad/configs/coredump
  $ make

2. Run qemu and get the coredump snapshot:

  $ qemu-system-arm -semihosting -M sabrelite -m 1024 -smp 4 -nographic -kernel ./nuttx -s
  ABCDGHIJKNOPQ

  NuttShell (NSH) NuttX-10.4.0
  nsh> coredump
  [CPU0] [ 6] Start coredump:
  [CPU0] [ 6] 5A5601013D03FF077F454C4601010100C0000304002800C00D003420036000070400053400200008200A4000000420030034C024200001D8092004E00200601A
  [CPU0] [ 6] 060C0000E85D831040030018200E400300072003403C601F06100000F8518310400340574003E0041F00142003025683106003A000E0081F005A201B4003A000
  [CPU0] [ 6] E0071F03987F831040030060200E4003E0041F209003288A8310400300B820104003E0041F061C0000D09283104003609C2003C01F00202006007C2003000320
  [CPU0] [ 6] 0308435055302049444C45200BE02700E0333BE01B0040A70094200340CFE0576BE0070040730006200340000424A782101420030474A482102020074137400B
  [CPU0] [ 6] 0030200B4027422309F51880108E8A80107F0161AA600040BFE102670031E01FBF4053E00300E0233BE02B0040A7E10267E02C6B403BE05700436B019319A167
  [CPU0] [ 6] 200F20005A560100A703FF010000200000202003007C20030003200308435055322049444C45200BE0170000022003E00300E0233BE02B0040A7009420030001
  [CPU0] [ 6] 2003E02F6BE007B3E04C00025683102005E0080040BFE102670033E01FBF402FE00300E0233BE02B0040A7E10267E02C6BE007B3E04C00005AE1196706687077
  [CPU0] [ 6] 6F726B00E01CBF00042003E00300A03BE0500040A7C167A06BE01CA7E00300E007B3E0170042FF05BC748310785C213B00005A560100F303FF0A000074A48210
  [CPU0] [ 6] 38748310242007010100E00D0008987F8310998C8010A4200303FF000020201260004008007C200300032003076E73685F6D61696E200AE0180000052003E003
  [CPU0] [ 6] 00E0233BE02B0040A70094200340DFE02F6BE007B3E0170000022003078480831088998310200A0200F08E2007200FC1674003400004CC8A8310042007006420
  [CPU0] [ 6] 030028200BE1176707636F726564756D70200AE0180000062003E00300E0233BE02B0040A7C167E02F6BE007B3E017000BDC458310E0988310780A0000415B03
  [CPU0] [ 6] 6C9A8310416B408B4133408F01788F217BA000405F00B0202F02EB21816003035F0000602012E0EB000100005A5601002103FF0E000000005E831000A27C3F00
  [CPU0] [ 6] 005080200DE0FF00E0FF00E0FF00E0CA000100005A5601001203FF010000E0FF00E0FF00E0FF00E0DA000100005A5601005403FF01000020000838748310D037
  [CPU0] [ 6] 8310DF200B0487328010C8200B400F400720120000400B00AB2017005F200B04432B80101520030002200B0101012004E00600028137806033E0FF00E0FF00E0
  [CPU0] [ 6] FF00E083000100005A560100F203FF010000600007808310BC8F8310DF200A088732801084FFFFFFA0200F0006200F04848A83105F200704E92D8110F1200340
  [CPU0] [ 6] 1303108C8310202200FF200A0900988E8310FD248010F7A01B061BD3801054AC826033C0004023403304CDD2801001200FE00300030FA2801020061200C15080
  [CPU0] [ 6] 103081821089678010A18E8310B35CE0092B400F0333EC8010404F4003200EE0640040C34003407B0D08F781107F7B801071F28010A99480C340000291938060
  [CPU0] [ 6] 2340AB4003400B05A1928010F883E005AF01F99080DF40174003009DA00F00642003400F0071A00F013F692063200B018D37E00163E0FF00E0FF00E02E000100
  [CPU0] [ 6] 005A5601003A03FF010000600003589083102006E0080001F092801707636F726564756D70200A600003EFBEADDEE0FF03E0FF03E0FF03E01B032342E07A0001
  [CPU0] [ 6] 00005A560101C003FF010000E095000BF08E83100927801054AC8210400B201201005F2003400BE00717E0CB0040DBE007E7E00FFF40170055200F0043201720
  [CPU0] [ 6] 0A6023401F4017400006111D8010207183600F047D40831018200B4023E003470794818210D91A8010E0174701E43FE00173403306F49A8310DF4C8160170448
  [CPU0] [ 6] 99831041201704CE1F841002200704CD3F81100C2007049D34811040201B200A05002EF781106C200B008D200B001D201F05893E81107978806F000A200300D8
  [CPU0] [ 6] 204F01D57B800F00882027400300F1E0020F009F202B40434027C06B122F798010789B8310F803000008040000C89683600F04277A80108C200700BC2037202A
  [CPU0] [ 6] 01008F202B20060200D092200F000820082003006C20470730A7821000FCFFFF201160000533208110D0072008201F410340230020202301B12220BB200B2019
  [CPU0] [ 6] 010006200301992420DF0323000001200B01001C805740034037400340420000208F60000504000534002040166000046BE88110F0213F200A000040AB00FF20
  [CPU0] [ 6] 0000E120E7400B020B188160174000400F201A00FF402B048517811065200340FB201260B000FD203303F7528110408300A9A00700E84083E00200033F698010
  [CPU0] [ 6] 401B018D37814720005A5601000800090100006000010000
  [CPU0] [ 6] Finish coredump (Compression Enabled).

3. Copy the hex body and save to file:

  $ cat elf.dump
  [CPU0] [ 6] 5A5601013D03FF077F454C4601010100C0000304002800C00D003420036000070400053400200008200A4000000420030034C024200001D8092004E00200601A
  ...
  [CPU0] [ 6] 401B018D37814720005A5601000800090100006000010000

4. Run tools/coredump.py to convert hex dump to elf coredump:

  $ ./tools/coredump.py elf.dump
  Chunk #1 is compressed, 317 bytes (original size: 1023 bytes)
  ...
  Chunk #10 is compressed, 8 bytes (original size: 9 bytes)

  $ ls elf.core
  elf.core

5. Pass core(elf.core) and bin elf(nuttx) to gdb:
  !!(Toolchain(arm-none-eabi-gdb) version must be newer than 11.3) !!

  $ arm-none-eabi-gdb -c elf.core nuttx
  GNU gdb (Arm GNU Toolchain 11.3.Rel1) 12.1.90.20220802-git
  ...
  Reading symbols from nuttx...

  [New process 6]
  [New process 1]
  [New process 2]
  [New process 3]
  [New process 4]
  [New process 5]
  [New process 6]
  Core was generated by `'.
  #0  0x10808a8e in up_idle () at chip/imx_idle.c:61
  61	}
  [Current thread is 1 (process 6)]
  (gdb)
  (gdb) info thread
    Id   Target Id         Frame
  * 1    process 6         0x10808a8e in up_idle () at chip/imx_idle.c:61
    2    process 1         0x10808a8e in up_idle () at chip/imx_idle.c:61
    3    process 2         0x00000000 in ?? ()
    4    process 3         0x00000000 in ?? ()
    5    process 4         up_switch_context (tcb=0x1082a474 <g_idletcb>, rtcb=rtcb@entry=0x10837438) at common/arm_switchcontext.c:95
    6    process 5         up_switch_context (tcb=0x10838ef0, rtcb=rtcb@entry=0x10838000) at common/arm_switchcontext.c:95
    7    process 6         elf_emit_tcb_note (cinfo=0x10839a6c, tcb=0x10838ef0) at libelf/libelf_coredump.c:272
  (gdb) thread 6
  [Switching to thread 6 (process 5)]
  #0  up_switch_context (tcb=0x10838ef0, rtcb=rtcb@entry=0x10838000) at common/arm_switchcontext.c:95
  95	      arm_switchcontext(&rtcb->xcp.regs, tcb->xcp.regs);
  (gdb) bt
  #0  up_switch_context (tcb=0x10838ef0, rtcb=rtcb@entry=0x10838000) at common/arm_switchcontext.c:95
  #1  0x10803286 in nxsem_wait (sem=0x10838fbc) at semaphore/sem_wait.c:176
  #2  0x10812de8 in nxsched_waitpid (pid=pid@entry=6, stat_loc=stat_loc@entry=0x10838a84, options=options@entry=4) at sched/sched_waitpid.c:169
  #3  0x10812df6 in waitpid (pid=pid@entry=6, stat_loc=stat_loc@entry=0x10838a84, options=options@entry=4) at sched/sched_waitpid.c:639
  #4  0x1080d31a in nsh_builtin (vtbl=vtbl@entry=0x10838c10, cmd=0x10838e98 <error: Cannot access memory at address 0x10838e98>, argv=argv@entry=0x10838adc, redirfile=redirfile@entry=0x0, oflags=oflags@entry=0) at nsh_builtin.c:162
  #5  0x1080a20e in nsh_execute (oflags=0, redirfile=0x0, argv=0x10838adc, argc=1, vtbl=0x10838c10) at nsh_parse.c:641
  #6  nsh_parse_command (vtbl=vtbl@entry=0x10838c10, cmdline=<optimized out>) at nsh_parse.c:2742
  #7  0x1080a510 in nsh_parse (vtbl=vtbl@entry=0x10838c10, cmdline=cmdline@entry=0x10838e98 <error: Cannot access memory at address 0x10838e98>) at nsh_parse.c:2826
  #8  0x10809390 in nsh_session (pstate=0x10838c10, login=login@entry=1, argc=argc@entry=1, argv=argv@entry=0x108383f8) at nsh_session.c:245
  #9  0x108090f8 in nsh_consolemain (argc=argc@entry=1, argv=argv@entry=0x108383f8) at nsh_consolemain.c:71
  #10 0x1080909c in nsh_main (argc=1, argv=0x108383f8) at nsh_main.c:74
  #11 0x1080693e in nxtask_startup (entrypt=0x10809071 <nsh_main>, argc=1, argv=0x108383f8) at sched/task_startup.c:70
  #12 0x1080378c in nxtask_start () at task/task_start.c:134
  #13 0x00000000 in ?? ()
  Backtrace stopped: previous frame identical to this frame (corrupt stack?)

Signed-off-by: chao an <anchao@xiaomi.com>
 2023-05-25 20:42:04 +08:00
chao an
6fdb8b8a66 tools/coredump: add coredump python parser 
Signed-off-by: chao an <anchao@xiaomi.com>
 2023-05-25 20:42:04 +08:00
chao an
86bf7d9bec sched/misc: Add support for coredump in assert 
Add coredump support to collect the stacks and registers of all threads when asserting

Signed-off-by: chao an <anchao@xiaomi.com>
 2023-05-25 20:42:04 +08:00
Ville Juven
e0f4a76d6c fs_poll: Fix wrong return value in CONFIG_BUILD_KERNEL 
The exit condition below does not work:

  if (ret < 0)
    {
      set_errno(-ret);
      return ERROR;
    }
  else
    {
      return count;
    }
 2023-05-25 20:41:20 +08:00
Huang Qi
84c7a4dd69 libc.csv: Correct type of return value for strstr 
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2023-05-25 20:09:27 +08:00
Michael Jung
efa2a95163 Update stm32l562e-dk:nsh 
- Update TrustedFirmare-M instructions to latest version of STM32CubeL5
- Increase idle thread stack size to not overflow during system init
- Select ARCH_HAVE_TRUSTZONE for STM32L5
- Set CONFIG_ARCH_TRUSTZONE_NONSECURE for stm32l562e-dk:nsh, since NuttX
  is running in the Non-secure world.

See https://github.com/apache/nuttx/issues/9316

Signed-off-by: Michael Jung <michael.jung@secore.ly>
 2023-05-25 16:04:30 +08:00
chao an
e51ec54c02 stream/hexdump: add hexdump stream to dump binary to syslog 
Signed-off-by: chao an <anchao@xiaomi.com>
 2023-05-25 15:22:04 +08:00
Xiang Xiao
0203839fa1 stream: Add syslogstream implementation 
which forward the output to syslog

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Signed-off-by: chao an <anchao@xiaomi.com>
 2023-05-25 15:22:04 +08:00
Xiang Xiao
20ea607bd0 stream: Rename syslogstream to syslograwstream 
to prepare a new stream implementation of syslog

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Signed-off-by: chao an <anchao@xiaomi.com>
 2023-05-25 15:22:04 +08:00
chao an
f75adacea6 stream/syslog: remove unnecessary ifdef CONFIG_SYSLOG_BUFFER 
Signed-off-by: chao an <anchao@xiaomi.com>
 2023-05-25 15:22:04 +08:00
Dong Heng
4a279b4b9b xtensa/esp32s3: Support 32MB PSRAM 2023-05-25 13:46:11 +08:00
chao an
78006f9824 elf/coredump: add sanity checks for stack pointer 
stack pointer may be invalid value if in SMP mode, add sanity checks
to avoid invalid access

Signed-off-by: chao an <anchao@xiaomi.com>
 2023-05-25 11:37:30 +08:00
Nathan Hartman
50d1de93ed Documentation: Import "Analyzing Cortex-M Hardfaults" from CWIKI 
* Documentation/guides/cortexmhardfaults.rst:
  New. Migrated from [1] with conversion to reStructuredText,
  minor typo fixes, and a link to a Narkive archive of the
  original quoted question.

* Documentation/guides/index.rst:
  Add above to TOC.

[1] https://cwiki.apache.org/confluence/display/NUTTX/Analyzing+Cortex-M+Hardfaults
 2023-05-24 17:31:33 -03:00
Peter van der Perk
0cadb0cf83 S32K3XX EMAC MCAST support 
Fix compile warning when ioctl is not enabled
 2023-05-24 13:08:02 -03:00
chao an
24f4216066 elf/coredump: add support of dump task stack without memory segments 
Signed-off-by: chao an <anchao@xiaomi.com>
 2023-05-24 22:34:47 +08:00
raiden00pl
0133831a70 arch/stm32f0l0g0: fix compilation for L0 pinmap 2023-05-24 22:30:45 +08:00
raiden00pl
7cf52139e8 boards/stm32f0l0g0: rework boards to not use CONFIG_STM32F0L0G0_USE_LEGACY_PINMAP=y 
Continuation to PR #8992
 2023-05-24 22:30:45 +08:00
Nathan Hartman
5a50800a9f Documentation: Minor fixes in Tickless OS documentation 
* Documentation/reference/os/time_clock.rst:
  Add missing Kconfig code-block, found at CWIKI [1].
  Fix some typos.

References:
[1] https://cwiki.apache.org/confluence/display/NUTTX/Tickless+OS
 2023-05-24 10:31:56 +08:00
raiden00pl
6d11fe315d arch/nrf53/nrf53_gpiote.c: fix compilation for GPIOTE1 2023-05-24 09:54:55 +08:00
raiden00pl
934602b76e boards/thingy53: add usb example 
The board can act as an USB composite device. For now CDCACM and RNDIS are supported.
 2023-05-24 09:54:55 +08:00
raiden00pl
04fa008018 boards/nrf5340-dk: add usb example 
The board can act as an USB composite device. For now CDCACM and RNDIS are supported.
 2023-05-24 09:54:55 +08:00
raiden00pl
0117260d8c arch/nrf53: add USBD support 
USB device role is now supported for NRF53
 2023-05-24 09:54:55 +08:00
chao an
0455167457 stream/syslog: use internal buffer to decoupling syslog with iob 
Signed-off-by: chao an <anchao@xiaomi.com>
 2023-05-24 09:53:30 +08:00
Tiago Medicci Serrano
1bc4b8d7b2 esp32s3/wifi: enable SMP by default on Wi-Fi-related defconfigs 
In order to enhance the Wi-Fi performance, enable SMP by default to
make use of the dual-core functionality of the ESP32-S3.
 2023-05-24 00:37:46 +08:00
Tiago Medicci Serrano
63364a52ff esp32s3/spiflash: pause other CPU before SPI flash operations 
Whenever a SPI flash operation is going to take place, it's
necessary to disable both the instruction and data cache. In order
to avoid the other CPU (if SMP is enabled) to retrieve data from
the SPI flash, it needs to be paused until the current SPI flash
operation finishes. All the code that "pauses" the other CPU (in
fact, the CPU spins until `up_cpu_resume` is called) needs to run
from the instruction RAM.
 2023-05-24 00:37:46 +08:00
raiden00pl
218aa63af3 boards/nrf53: introduce common folder 
This is an initial step towards moving common logic for NRF53 boards into one place.
At this point, only initialization of the TIMER has been moved.
 2023-05-24 00:04:28 +08:00
raiden00pl
f646664cfb boards/nrf52: introduce common folder 
This is an initial step towards moving common logic for NRF52 boards into one place.
At this point, only initialization of the TIMER has been moved.
 2023-05-24 00:04:28 +08:00
dependabot[bot]
d9ea87443e build(deps): bump requests from 2.30.0 to 2.31.0 in /Documentation 
Bumps [requests](https://github.com/psf/requests) from 2.30.0 to 2.31.0.
- [Release notes](https://github.com/psf/requests/releases)
- [Changelog](https://github.com/psf/requests/blob/main/HISTORY.md)
- [Commits](https://github.com/psf/requests/compare/v2.30.0...v2.31.0)

---
updated-dependencies:
- dependency-name: requests
  dependency-type: indirect
...

Signed-off-by: dependabot[bot] <support@github.com>
 2023-05-23 17:02:55 +08:00
hujun5
35b597ec2c arch/all: in smp pthread_cancel occasionally deadlock except for arm64 
please reference the issue here for more information:
https://github.com/apache/nuttx/pull/9065

Signed-off-by: hujun5 <hujun5@xiaomi.com>
 2023-05-23 15:48:35 +09:00
Tiago Medicci Serrano
c60d59d825 esp32s3: add dedicated interrupt stack for ESP32-S3 by default 
This config also prevents crashes due to the commit 6be363f, which
fix a race condition in multi-threaded write/read of the serial
driver, but increases stack size.
 2023-05-23 13:39:50 +08:00
Petro Karashchenko
70fd6f1642 arch/arm/samv7: remove alignment check that is not needed 
SAMv7 QSPI peripheral does not copy-in/out directly into/from
user provided buffer, but use a dedicated memory that is interfaces
using byte copy. The QSPI command buffer can point to memory with
any alignment

Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2023-05-23 02:52:35 +08:00
TimJTi
3cb168b177 GD25 Flash memory - performance enhancements 2023-05-23 01:32:58 +08:00
zhanghu5
a043657323 dma support 16550 uart 
Signed-off-by: zhanghu5 <zhanghu5@xiaomi.com>
 2023-05-23 01:32:03 +08:00
TimJTi
672302bd57 SAMA5D2 SPI DMA fix and Performance Enhancements 2023-05-23 01:26:08 +08:00
simbit18
e4ffce3355 Fix Kconfig style 
Remove spaces from Kconfig files
 2023-05-23 00:03:25 +08:00
simbit18
46e1916a91 arch/arm/src/nrf53/Kconfig: Fix config I2C3 Master 
correct config NRF53_I2C3_MASTER ( NRF53_I2C2_MASTER -> NRF53_I2C3_MASTER )
 2023-05-22 17:17:50 +02:00
anjiahao
c60dd72a2a Support memdump to realize incremental dump function 
Add a new field to record the global on the basis of mm_backtrace.
When using alloc, the field is incremented by 1,
so that the memory usage can be dumped within the range
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
 2023-05-22 12:31:32 +08:00
anjiahao
97e652aed1 tlsf:fix bug invalid reference & mm_backtace need tid 
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
 2023-05-22 12:31:32 +08:00
zhangyuan21
9b882b46be arch/arm64: move sgi attach and enable to gic init 
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
 2023-05-21 09:58:34 -03:00
zhangyuan21
f8b5fd2a9a arch/arm64: send sgi with correct aff and target list 
armv8r and armv8a have different process affinity,
and sgi affinity needs to be able to adapt all of them.

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
 2023-05-21 09:58:34 -03:00
qinwei1
ea98e5a92e arm64: gicv3 add arm64_gic_irq_trigger to set irq type 
Summary
    For ARM64, it need to set IRQ type(EDGE or LEVEL). it's specific
 for ARM64 PPI or SPI.
    The change add arm64_gic_irq_trigger to set IRQ type

Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
 2023-05-21 09:58:34 -03:00
qinwei1
ca6cdd16e9 arm64: gicv3 add up_affinity_irq/up_trigger_irq/up_prioritize_irq 
Summary
  add up_affinity_irq/up_trigger_irq/up_prioritize_irq for gicv3
these interface is necessary for some drivers

Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
 2023-05-21 09:58:34 -03:00
qinwei1
28a354f276 arm64: gicv3, add power up sequence for gc600/gc700 
Summary:
   GICR_PWRR is a IMPLEMENTATION-DEFINED register for gc700/gc600, which
is following gic v3 and v4.
   Please check GICR_PWRR define at TRM of GIC600/GIC700 for more detail

Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
 2023-05-21 09:58:34 -03:00
Xiang Xiao
7990f90915 Indent the define statement by two spaces 
follow the code style convention

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2023-05-21 09:52:08 -03:00
Lwazi Dube
ae1fd83a46 usbhost: Can now handle multiple interface descriptors. 
See #3644. Code from:
https://github.com/apache/nuttx/compare/master...btashton:libusb
 2023-05-21 09:50:36 -03:00