Commit Graph

16334 Commits

Author SHA1 Message Date
Nathan Hartman
892c6b254a tiva/cc13x2_cc26x2: Fix nxstyle errors
arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_aon_pmctl.h:

    * Fix nxstyle errors.
2020-10-27 09:54:02 -07:00
Daniel P. Carvalho
8339bac6e4 Replaces BSD license by Apache License. 2020-10-27 11:11:40 -03:00
Daniel P. Carvalho
8c04cc86c0 Improvements on ADC driver
* Add option to start adc at setup
  * Add option to cofigure ADC resolution
  * Add option to cofigure ADC sample time
  * Add option to cofigure ADC DMA
  * Add suport for low level operations.
2020-10-27 11:11:40 -03:00
Dong Heng
d86fd84a8e xtensa/esp32: Add real-time timer support for WiFi 2020-10-27 10:36:34 -03:00
Abdelatif Guettouche
58655d1efd arch/xtensa/src/esp32: SMP case of interruptstack.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-27 07:44:20 +09:00
Abdelatif Guettouche
c97d11aa7b arch/xtensa: Add the optional interrupt stack.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-27 07:44:20 +09:00
Sebastian Ene
efbcb2cd31 arch/sim: Enable SIM_WALLTIME option by default
### Summary of Changes ###

Running the NuttX simulation 'as fast as possible' breaks the features
that depend on timing: eg. the Bluetooth stack. Enabling this option by
default SIM_WALLTIME=y will introduce delays and will tick the simulation at
a real pace.
Refresh defconfigs for sim targets and add depends on SIM_WALLTIME for
SIM_HCISOCKET.

Signed-off-by: Sebastian Ene <sene@apache.org>
2020-10-26 11:01:40 -07:00
Nathan Hartman
6f029174f2 tiva/cc13x2_cc26x2: Fix nxstyle errors
arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_aon_rtc.h:

    * Fix nxstyle errors.
2020-10-26 10:39:32 -07:00
Masayuki Ishikawa
904a602c74 arm: armv7-a: Fix kernel stack dump in arm_assert.c
Summary:
- This commit fixes kernel stack dump information

Impact:
- Affects armv7-a with kernel build

Testing:
- Built with sama5d4-ek:knsh
- Not tested

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-10-26 09:05:49 -07:00
Masayuki Ishikawa
3c4bf1a2bf arch: armv6-m: Refactor interrupt stack related code
Summary:
- Apply the same logic for armv7-m
- NOTE: stack pointer alignment is 4-byte

Impact:
- Affects armv6-m with interrupt stack enabled

Testing:
- Built with freedom-kl25z:nsh (CONFIG_ARCH_INTERRUPTSTACK=2048)
- Not tested but should work

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-10-26 09:05:49 -07:00
Masayuki Ishikawa
0b73eec5cd arch: armv8-m: Refactor interrupt stack related code
Summary:
- Apply the same logic for armv7-m
- NOTE: stack pointer alignment is 8-byte

Impact:
- Affects armv8-m with interrupt stack enabled

Testing:
- Not tested but should work

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-10-26 09:05:49 -07:00
Masayuki Ishikawa
d553515758 armv7-m, cxd56xx, lc823450: Refactor interrupt stack related code
Summary:
- Remove +4/-8 offset coding
- Also, fix alignments for g_intstackalloc
- NOTE: stack pointer alignment is 8-byte

Impact:
- Affects armv7-m with interrupt stack enabled

Testing:
- Tested with spresense:wifi_smp
- Tested with lc823450:smp
- Tested with stm32f4discovery:wifi

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-10-26 09:05:49 -07:00
Masayuki Ishikawa
32563b15ac arch: armv7-r: Refactor interrupt stack related code
Summary:
- Apply the same logic for armv7-a
- NOTE: stack pointer alignment is 8-byte

Impact:
- Affects armv7-r with interrupt stack enabled

Testing:
- Not tested but should work

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-10-26 09:05:49 -07:00
Masayuki Ishikawa
973a6c49b6 arm, c5471: Refactor interrupt stack related code
Summary:
- Apply the same logic for armv7-a
- NOTE: stack pointer alignment is 4-byte

Impact:
- Affects arm (arm7/9) and c5471 with interrupt stack enabled

Testing:
- Built with c5471evm.nsh (CONFIG_ARCH_INTERRUPTSTACK=2048)
- Built with ea3131:nsh (CONFIG_ARCH_INTERRUPTSTACK=2048)
- Not tested but should work

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-10-26 09:05:49 -07:00
Masayuki Ishikawa
6e12f3c782 armv7-a, imx6: Refactor interrupt stack related code
Summary:
- Remove -4/-8 offset coding in imx_irq.c and arm_vectors.S
- Instead, add SP adjustment after calling setirqstack/setfiqstack
- Fix off-by-one irq/fiq stack allocation in 8-byte aligned arch
- Fix comments on the user stack pointer in arm_vectors.S
- Also, fix up_dumpstate() to extract the user stack pointer
- NOTE: stack pointer alignment is 8-byte

Impact:
- Affects armv7-a with interrupt stack enabled

Testing:
- Tested with sabre-6quad:smp with QEMU
- Tested with sabre-6quad:nsh with QEMU

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-10-26 09:05:49 -07:00
Masayuki Ishikawa
eddf1189be arch: armv7-a: Fix CPUx IDLE stack top for SMP
Summary:
- This commit fixes CPUx IDLE stack top for SMP
- Also removes SMP_STACK_TOP from smp.h

Impact:
- Affects armv7-a SMP only

Testing:
- Tested with sabre-6quad:smp (QEMU)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-10-26 09:05:49 -07:00
Masayuki Ishikawa
9120a3022d arch: armv7-a: Fix style warnings in arm_cpuidlestack.c
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-10-26 09:05:49 -07:00
Masayuki Ishikawa
92ebbd7d21 arch: armv7-a: Fix style warnings in smp.h
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-10-26 09:05:49 -07:00
Alan C. Assis
34df2126b3 Fix missing 'ret' reported by Frank-Christian Kruegel 2020-10-26 15:26:49 +01:00
dongjiuzhu
d452a05910 pollnotify: we should send poll events before semaphore incrementes.
There is a good case on sim platform:
When we input some cmd and click enter key to start application in terminal,
this context will change to application from IDLE loop. Althrough entey key '\r'
has been received to recv buffer and complete post semaphore of reader, but
pollnotify may not be called because context change. So when application run
poll function, because no events happend and poll enter wait, context will
again change to IDLE loop, this pollnotify of IDLE loop will run to send poll
events, poll function of applicaton will wake up. It's wrong!

Change-Id: I812a889f2e90781a9c3cb4b0251cccc4d32bebd1
Signed-off-by: dongjiuzhu <dongjiuzhu1@xiaomi.com>
2020-10-26 08:27:09 -03:00
Simon Piriou
13e10504c9 arch: stm32: nxstyle check for otghs driver 2020-10-26 08:17:25 -03:00
Simon Piriou
3eb3b0da4d arch: stm32: fix otghs logic to support interface requests 2020-10-26 08:17:25 -03:00
Matias N
5386f972fa bluetooth: Add support for HCI RAW channel; make host layer optional 2020-10-25 17:04:25 -07:00
Masayuki Ishikawa
3098b61776 Revert "arch/sim: Make the SIGUSR1 host signal to use the NuttX irq logic"
This reverts commit d6210fcd84.
2020-10-26 08:42:52 +09:00
Abdelatif Guettouche
9b98f20969 arch/xtensa: Fix the naming of the internal heap functions. They should
be prefixed by xtensa_ instead of up_.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
34ad33c8b2 arch/xtensa/Kconfig: Add help for the seperate internal heap.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
5ac5655fa4 arch/xtensa/src/esp32/esp32_spi&spiflash: Free the correct buffer.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
0182e6e8bb arch/xtensa/src/commin/xtensa_usestack&createstack.c: Set the alignment
to be 4 bytes.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
172896728f arch/xtensa/src/esp32/esp32_spi.c: Instead of returning with no error
code, assert the return of the imm_malloc function.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
2fa5d65355 arch/xtensa/src/common: Refactor the mm_ macros into a separate file.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
f0ae1dd54a arch/xtensa/src/esp32: Fix PR #1958 nxstyle issues.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
7db8b920ff arch/xtensa/src/esp32/hardware: PIN_CTRL was defined twice.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
0ba0a3a092 arch/xtensa/src/esp32/hardware/esp32_soc.h: Lowercase hex value
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
b6429a50d7 arch/xtensa/src/esp32/esp32_allocateheap.c: Delete a preprocessor
warning that's not relevant anymore.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
1b12d20225 arch/xtensa/src/esp32/esp32_spiflash.c&esp32_spi.c: Allocate a buffer from DRAM
when the given buffer is from PSRAM.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
7ac5f7a35b arch/xtensa/src/esp32: Add a PROCFS entry for the internal memory
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
a1318926b4 arch/xtensa/esp32: Allow internal drivers and tasks' stack to be
allocated in an internal heap.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Yoshinori Sugino
3ac90fca79 Remove tabs and spaces at the end of lines 2020-10-24 09:38:21 +01:00
Nathan Hartman
f9a6988ca8 tiva/cc13x2_cc26x2: Fix nxstyle errors
arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_ccfg.h,
arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_vims.h:

    * Fix nxstyle errors.
2020-10-23 01:32:17 +08:00
Nathan Hartman
81cfa88fc5 tiva/cc13x2_cc26x2: Fix nxstyle errors
arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_adi4_aux.h,
arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_aux_smph.h,
arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_ddi.h,
arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_memorymap.h,
arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_smph.h:

    * Fix nxstyle errors.
2020-10-22 00:20:42 +08:00
Philippe Coval
271016a3ad kinetis: Make kinetis_i2c_sem_wait_noncancelable optional
CONFIG_I2C_RESET is coming from imxrt_lpi2c.c

Change-Id: I8f55eaf793386fe5ac1d4adaf310d6e0f08dcd92
Bug: https://github.com/apache/incubator-nuttx/pull/1999
Forwarded: https://github.com/apache/incubator-nuttx/pulls/rzr
Signed-off-by: Philippe Coval <rzr@users.sf.net>
2020-10-21 13:36:55 +08:00
Masayuki Ishikawa
dad5a79bf3 arch: arm: Fix interrupt stack handlings for SMP
Summary:
- Modify arm_intstack_base() to return "top" of the IRQ stack for the current CPU
- This change fixes IRQ stack dump information for ARM SMP
- Add arm_intstack_alloc() to return "bottom" of the IRQ stack for the current CPU
- Also, these functions are now implemented in xxx_irq.c (imx/cxd56/lc823450)
- up_color_intstack() and up_check_intstack() now call arm_intstack_alloc()
- These semantics are now consistent with non-SMP case
- up_color_intstack() now initializes whole IRQ stack region for SMP
- Adjust IRQ stack top address for each CPU (e.g. -8)
- Fix setintstack to handle in case of NCPUS=1 (cxd56, lc823450)
- Adjust INTSTACK_SIZE to 8 bytes alignment (cxd56, lc823450)
- Refactor setintstack for lc823450
- Remove old IRQ stack coloring code from up_irqinitialize() (lc823450)
- Introduce g_cpu_intstack_top for lc823450
- Refactor header files

Impact:
- Affects imx6/cxd56xx/lc823450 SMP with interrupt stack enabled

Testing:
- Tested with sabre-6quad:smp (with QEMU, NCPUS=1 and 4)
- Tested with spresense:wifi_smp (NCPUS=1 and 2)
- Tested with lc823450-xgevk:rndis (NCPUS=1 and 2)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-10-21 11:49:45 +08:00
Masayuki Ishikawa
56a081515c arch: imx6: Fix style warnings in chip.h
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-10-21 11:49:45 +08:00
YAMAMOTO Takashi
89c9855d7b esp32: Fix a few #endif comments 2020-10-20 18:50:28 +08:00
Xiang Xiao
2956b8516b Fix nxstyle warning
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-10-20 01:45:06 -07:00
Xiang Xiao
eb4121ce38 Change all 'Nuttx' to 'NuttX'
Unify the naming convention

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-10-20 01:45:06 -07:00
liuhaitao
d5c6bfe6cf arch: Add custom arch chip build support
Just like custom board build support, add custom arch chip build
support.

Change-Id: I71c87e6b2195501a1b1d728b71d7cbe344951057
Signed-off-by: liuhaitao <liuhaitao@xiaomi.com>
2020-10-20 14:48:16 +08:00
Brennan Ashton
5e8bcaa360 serial: nxstyle fixes
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
2020-10-20 14:43:19 +08:00
Juha Niskanen
94f0f55911 arch: serial: fix all TCGETS retrieving zero baud rate
cfsetispeed() now stores baud rate to c_cflag member of
struct termios, so it must not be overridden later on.

Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
2020-10-20 14:43:19 +08:00
YAMAMOTO Takashi
60a6d9cfe5 arch/xtensa/src/esp32/esp32_wlan.c: Fix an unused var warning
chip/esp32_wlan.c: In function 'esp_ioctl':
chip/esp32_wlan.c:1262:30: warning: unused variable 'req' [-Wunused-variable]
   struct mii_ioctl_notify_s *req;
                              ^~~
2020-10-19 21:06:07 -07:00