Gregory Nutt
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6422792f57
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Standard configuration variables used to enable interupt controller debug; SAMA5: Correct handling of spurious interrupts
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2013-08-03 08:22:37 -06:00 |
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Gregory Nutt
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86b815373a
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Remove up_assert_code
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2013-04-25 15:19:59 -06:00 |
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patacongo
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854dbf19e5
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Add support for ram vectors to the ARMv7-M architecture
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5756 42af7a65-404d-4744-a932-0658087f49c3
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2013-03-18 21:10:08 +00:00 |
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patacongo
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539e1a6799
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More files for the Cortex-M0/NUC120 port
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5659 42af7a65-404d-4744-a932-0658087f49c3
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2013-02-18 20:24:20 +00:00 |
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patacongo
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3458ee74a4
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Removed stm32_internal.h; Changes for clean compile of STM32F3Discovery configuration with SPI and USB
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5630 42af7a65-404d-4744-a932-0658087f49c3
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2013-02-09 15:03:49 +00:00 |
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patacongo
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be066e6fa6
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Use of BASEPRI to control ARM interrupts is now functional
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5548 42af7a65-404d-4744-a932-0658087f49c3
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2013-01-22 16:09:10 +00:00 |
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patacongo
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f0c357cd5a
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More logic to use BASEPRI to control interrupts -- still doesn't work
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5547 42af7a65-404d-4744-a932-0658087f49c3
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2013-01-22 14:37:17 +00:00 |
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patacongo
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b3ed93854b
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Add option to use BASEPRI instead of PRIMASK to disable interrupts in all ARMv7-M architectures
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5546 42af7a65-404d-4744-a932-0658087f49c3
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2013-01-22 01:25:40 +00:00 |
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patacongo
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d36bf9f183
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Add LPC43 interrrupt control logic
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4905 42af7a65-404d-4744-a932-0658087f49c3
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2012-07-04 19:34:11 +00:00 |
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patacongo
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8807fea8b0
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Interrupt priority fix + new LM3S header files
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4792 42af7a65-404d-4744-a932-0658087f49c3
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2012-06-01 13:22:27 +00:00 |
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patacongo
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9c89c16a7c
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Name change: Change Cortex-M3 naming to ARMv7-M naming so support Cortex-M4
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3846 42af7a65-404d-4744-a932-0658087f49c3
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2011-08-05 21:57:49 +00:00 |
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patacongo
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bd12973b36
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current_regs should be volatile; add support for nested interrupts; enable interrupts during syscall processing
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3475 42af7a65-404d-4744-a932-0658087f49c3
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2011-04-06 23:01:06 +00:00 |
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patacongo
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056b895642
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Attach mem mgmt fault handle if MPU is enabled
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3471 42af7a65-404d-4744-a932-0658087f49c3
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2011-04-06 01:51:07 +00:00 |
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patacongo
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dc9d27c301
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Add stubs for AVR32 IRQ controls
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2988 42af7a65-404d-4744-a932-0658087f49c3
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2010-10-09 22:02:25 +00:00 |
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patacongo
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9998f85110
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Changing NuttX fixed size type names to C99 standard names -- things will be broken for awhile
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2359 42af7a65-404d-4744-a932-0658087f49c3
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2009-12-16 20:05:51 +00:00 |
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patacongo
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c1cd3b3a42
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BUG: mixing else causes bad IRQ settings
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2194 42af7a65-404d-4744-a932-0658087f49c3
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2009-10-30 13:51:07 +00:00 |
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patacongo
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94fca00261
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Fix major bug in STM32 interrupt enable/disable logic; NSH now works on STM32
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2149 42af7a65-404d-4744-a932-0658087f49c3
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2009-10-17 20:42:37 +00:00 |
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patacongo
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d1bfc3e67c
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When running from DFU load, need to set NVIC vector address
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2129 42af7a65-404d-4744-a932-0658087f49c3
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2009-10-13 23:37:06 +00:00 |
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patacongo
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a66667c99d
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IRQ numbering fixes
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2100 42af7a65-404d-4744-a932-0658087f49c3
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2009-09-26 21:21:59 +00:00 |
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patacongo
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ac96bd553a
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Add IRQ and SYSTICK logic
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2099 42af7a65-404d-4744-a932-0658087f49c3
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2009-09-26 20:35:45 +00:00 |
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