Commit Graph

2086 Commits

Author SHA1 Message Date
Gregory Nutt
e7479e9b9d Add prefex ETH0 to all PHY configurations to support multiple NICs 2013-09-17 10:45:07 -06:00
Gregory Nutt
b06216ff11 SAMA4 EMAC: Remove some editor garbage that ended up in the last commit 2013-09-16 18:04:38 -06:00
Gregory Nutt
7ef1bd2f4c SAMA5 EMAC: Add basic PHY logic 2013-09-16 18:00:21 -06:00
Gregory Nutt
50fd028680 SAMA5 EMAC: Packet transmission logic 2013-09-16 14:58:11 -06:00
Gregory Nutt
09e6c653cc SAMA4 EMAC: Add basic interrupt handling logic 2013-09-16 13:57:57 -06:00
Gregory Nutt
9d59d5ef13 SAMA5 EMAC: Incremental progress. Still not code complete 2013-09-16 11:36:12 -06:00
Gregory Nutt
af61f846f9 Freescale Kinetis KL25Z PIT and TPM module register definitions 2013-09-15 17:00:50 -06:00
Gregory Nutt
285f5201dc SAMA4 EMAC buffer allocation logic 2013-09-15 14:26:25 -06:00
Gregory Nutt
ed7c7a25e7 SAMA5 Ethernet: Add support for PHY interrupts 2013-09-15 12:24:42 -06:00
Gregory Nutt
58dad361b8 SAMA5: Update Ethernet initalization logic to handle both EMAC and GMAC 2013-09-14 08:19:36 -06:00
Gregory Nutt
14b3417a85 SAMA5 EMAC: Create a empty, skeleton file that will eventually become the SAMA5 EMAC driver 2013-09-13 15:04:46 -06:00
Gregory Nutt
50f482f902 STM32: Support for the LeafLabs Maple and Maple Mini boards. From Librae 2013-09-13 12:45:33 -06:00
Gregory Nutt
b5bdde09cc STM32 Kconfig: Fix STM32 UART7/8 kconfig names and UART DMA. Provided by Lorenz Meier 2013-09-13 11:45:32 -06:00
Gregory Nutt
b5254cc5af Make filter register accessible for CAN1 and CAN2. Provided by Lorenz Meier 2013-09-13 11:20:10 -06:00
Gregory Nutt
7e33cee02f SAMA5 EMAC and GMAC: More additions to register definition files 2013-09-13 03:35:56 -06:00
Gregory Nutt
f2f40f35bd SAMA5: Beginning of EMAC and GMAC register definition header files 2013-09-12 15:45:12 -06:00
Gregory Nutt
c839aa84ca SAMA5D3x-EK README update 2013-09-12 14:17:56 -06:00
Gregory Nutt
4e0c905d61 SAMA5 TWI: Misc improvements during debug (still not getting interupts) 2013-09-12 12:25:31 -06:00
Gregory Nutt
0330eea54d SAMA5 TWI: Cleanup compilation errors that occur when I2C debug is enabled 2013-09-12 09:46:20 -06:00
Gregory Nutt
b3194bd5e5 SAMA5 TWI: Add support for I2C readwrite and transfer methods 2013-09-11 17:52:23 -06:00
Gregory Nutt
b5eed8c9cb SAMA5: Barebones TWI driver implementation 2013-09-11 16:48:56 -06:00
Gregory Nutt
382a066eae SAMA5: Framework for a TWI driver (incomplete) 2013-09-11 12:28:52 -06:00
Gregory Nutt
e49069b92b SAMA5: TWI register definition file 2013-09-11 10:23:46 -06:00
Gregory Nutt
7391afb5c2 SAMA5D3x-EK demo configuration now supports HSMCI0 and HSMCI1 2013-09-11 09:50:36 -06:00
Gregory Nutt
462dd6936c Clean-up a few USB trace formats 2013-09-10 16:17:06 -06:00
Gregory Nutt
990d3a65a4 SAMA5: Add tracing support to the OHCI driver 2013-09-10 16:01:44 -06:00
Gregory Nutt
89c829d1ae SAMA5 EHCI: Did not work with DEBUG off. Appears to be because of some D-Cache flushing that was performed only with DEBUG ON. Now is unconditional 2013-09-10 10:12:51 -06:00
Gregory Nutt
c6bf25bca0 Extent the the USB host trace logic to include verbose debug output 2013-09-09 17:27:21 -06:00
Gregory Nutt
3ba64b0cfe USB monitor extended so that it can also be used with USB host trace data 2013-09-09 15:02:33 -06:00
Gregory Nutt
fbd5ab0758 Beginning of support for USB host side tracing 2013-09-09 14:01:52 -06:00
Gregory Nutt
a992004b0e USB MSC host class driver: Don't bother retrying to initialize the FLASH if the interface is returning fatal transfer errors 2013-09-09 10:00:16 -06:00
Gregory Nutt
40f84dfa19 Trivial updates assocaited with USB host mass storage and SAMA5 EHCI 2013-09-08 13:42:56 -06:00
Gregory Nutt
59f6aeefd2 SAMA5: Add support EHCI/OHCI to sama5d3x-ek/demo (does not work yet); Fix some EHCI/OHCI compilation issues when DEBUG is disabled 2013-09-07 11:43:06 -06:00
Gregory Nutt
e30cb1d470 SAMA5D3x-EK: Add a new 'demo' configuration 2013-09-06 11:40:46 -06:00
Gregory Nutt
fb37248343 CDC/ACM and PL2303 device drivers: Don't use the max packet size assigned to an endpoint in order to determine the request buffer size. The endpoint has not yet been configured that max packet size may be wrong. 2013-09-05 18:00:16 -06:00
Gregory Nutt
6dae945fb0 SAMA5 UDPHS: Fix bad setup for sam_req_write call introduce in last commit 2013-09-05 15:51:27 -06:00
Gregory Nutt
d0923ee830 SAMA5 UDPHS: Major changes to DMA interrupt and request handling to better handle DMA 2013-09-05 14:33:27 -06:00
Gregory Nutt
4377b4f5e8 SAMA5 UDPHS: Fix DMA channel vs. matching endpoint 2013-09-04 15:08:19 -06:00
Gregory Nutt
8c64ca58b2 SAMA5 UDPHS: More USB fixes mostly related to byte counts, endpoint configuration, and dma configuration 2013-09-04 13:36:52 -06:00
Gregory Nutt
a478b680a3 SAMA5 UDPHS: More zero length packet fixes; revamped request queue structures 2013-09-04 09:48:08 -06:00
Gregory Nutt
a9a8801472 SAMA5 UDPHS: Fixes related to null packet and SETUP OUT data handling 2013-09-03 19:13:34 -06:00
Gregory Nutt
d294826cfd SAMA5 UDPHS: Small change to zero length packet handling 2013-09-03 16:24:11 -06:00
Gregory Nutt
10da3662e4 SAMA5 UDPHS: Fix some issues with TX interrupt handling 2013-09-03 14:53:10 -06:00
Gregory Nutt
43a62c63d9 SAMA5 UDPHS: A little debugging progress. Not all transfers are working yet 2013-09-03 13:09:50 -06:00
Gregory Nutt
84439348df SAMA5 UDPHS: Changes from initial debug session. Still a long way to go 2013-09-02 16:59:07 -06:00
Gregory Nutt
37579db920 SAMA5 UDPHS: Fixes related to soft connect pullup and DMA buffer allocation 2013-09-02 14:55:33 -06:00
Gregory Nutt
c162cca9e8 SAMA5 UDPHS: Some very early debug corrections. Not yet working. 2013-09-02 12:26:15 -06:00
Gregory Nutt
742e89783b SAMA5 UDPHS: Add logic to handle deferred address setting; add logic to handle EP0 SETUP OUT data 2013-09-02 10:08:18 -06:00
Gregory Nutt
393b44f059 STM32 Timer Register Bit Definitions: Some CCER bit settings changed per SourceForge bug #18 submitted by CCCTSAO 2013-09-02 08:01:09 -06:00
Gregory Nutt
387795ecdf SAMA5 UDPHS: Clean up some write request handling 2013-09-01 16:56:22 -06:00