sergiotarxz/nuttx
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity
44,952 Commits 1 Branch 0 Tags 291 MiB
ebffcdc992
Commit Graph

44952 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
liuhaitao
c4e2d88e6b Make top Make.defs symlink to board Make.defs instead 
Symlink to board Make.defs for top Make.defs, so top Make.defs
syncs in realtime.

Signed-off-by: liuhaitao <liuhaitao@xiaomi.com>
 2022-04-10 01:28:27 +02:00
Xiang Xiao
0f82eccc4f .github/workflows/check.yml: Enable Change-ID check explicitly 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-04-09 22:06:54 +02:00
liuhaitao
c998a2c9bf checkpatch.sh: add -m option to enable/disable Change-Id check 
Defaultly disable Change-Id check in commit message.

Signed-off-by: liuhaitao <liuhaitao@xiaomi.com>
 2022-04-09 22:06:54 +02:00
Huang Qi
9284770f75 arch/risc-v: Move epc adjustment to riscv_doirq 
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2022-04-10 00:52:04 +08:00
Huang Qi
833211680a arch/risc-v: Attach exception handler in common place 
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2022-04-10 00:52:04 +08:00
Huang Qi
36bc8d2131 arch/risc-v: Align prototype of riscv_exception with xcpt_t 
Thus we can attach it to irq handler without any cast.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2022-04-10 00:52:04 +08:00
Xiang Xiao
c235c0fa43 boards/lx_cpu: Enable up_perf API 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-04-08 21:02:13 -03:00
Xiang Xiao
1f7b49d700 boards/nucleo-h743zi2: Enable up_perf API 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-04-08 21:02:13 -03:00
Xiang Xiao
51ffa3edb0 sched/irq: Fix array overrun in coverity check 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-04-08 21:02:13 -03:00
Xiang Xiao
aed5dadc3d sched/irq: Remove CONFIG_SCHED_IRQMONITOR when define CALL_VECTOR 
since up_perf_ API doesn't couple with CONFIG_SCHED_IRQMONITOR

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-04-08 21:02:13 -03:00
Xiang Xiao
bf3da321c9 sched/wqueue: Simplify CALL_WORKER dispatch condition 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-04-08 21:02:13 -03:00
Xiang Xiao
074beff551 tools/checkrelease.sh: Don't check DISCLAIMER-WIP anymore 
since all license is clean up now

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-04-08 21:00:56 -03:00
Huang Qi
c6942b68d5 arch/risc-v: Add handler for misaligned load/store 
Some risc-v based chips don't support unaligned data access,
it will trigger a exception and then lead to crash.

In this patch, we handle the misaligned access by software to make
system run continue.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2022-04-08 23:27:07 +08:00
yinshengkai
4b6743591a fs/vfs: fix st_mode mask check 
The full mask for st_mode is 0177777
Now modify any file permissions in hostfs and all will fail
 2022-04-08 15:06:41 +03:00
chao.an
8d66dbc068 arm/armv[7|8]-m: skip the fpu save/restore if stack frame is integer-only 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-04-08 14:28:41 +09:00
chao.an
8cb008c3c7 sched/note: correct flatten format 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-04-08 02:41:25 +08:00
chao.an
ef89f3f15a sched/note: add dummy definition if CONFIG_SCHED_INSTRUMENTATION disabled 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-04-08 02:41:25 +08:00
anjiahao
47304e7254 sched/pthread:need check pthread is DETACHED 
pthread_join need check thread is DETACHED,
Whether to wait according to the result.And,
if a thread is DETACHED,it will not set a new
attr.
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
 2022-04-08 01:41:06 +08:00
Huang Qi
b6cf1ac662 arch/riscv: Minor style change and text correction 
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2022-04-08 01:07:06 +08:00
Michal Lenc
d5b34f9ce0 Documentation/guides/pysimcoder.rst: update pysimCoder dependencies 
CONFIG_LIBM option may be required by some toolchains that do not include
standard math library. Morover CONFIG_PTHREAD_STACK_MIN was listed twice
in the list.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
 2022-04-08 01:05:43 +08:00
Huang Qi
4ebc581c73 esp32c3: Simplify irq dispatch logic 
ESP32C3 use customized irq encoding so it's hard to share further code
with other risc-v based chips, in this patch, we keep the exception
number definition with risc-v spec.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2022-04-07 18:16:35 +02:00
Ville Juven
d38b4965f8 MPFS: Prepare support for S-mode 
- Access to PLIC via S-mode registers
- Access to IRQs via S-mode registers / definitions
- Initialize S-mode registers upon boot
- Initialize per CPU area before nx_start

NOTE: S-mode requires a companion SW (SBI) which is not yet implemented,
thus S-mode is not usable as is, yet.
 2022-04-07 21:55:36 +08:00
Xiang Xiao
3a26cf6a02 arch/risc-v: Remove the unnecessary inclusion of board header files 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-04-07 11:25:12 +03:00
chao.an
ba5320c36f fs/poll: change format for type pollevent_t 
complete the following commits:

commit d87cf8d4ca
Author: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
Date:   Fri Apr 1 20:59:55 2022 +0800

    fs/poll: change format for type pollevent_t

    Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>

commit d535943a69
Author: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
Date:   Fri Apr 1 17:49:10 2022 +0800

    fs/epoll: change type of eventset from uint8_t to uint32_t

    to support EPOLLONESHOT and so on.

    Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>

Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-04-07 16:23:32 +08:00
Jiuzhu Dong
e93100cb4d lib_lib_vsprintf/backtrace: fix the type issue 
using 't': For integer types, causes printf to expect
a ptrdiff_t-sized integer argument.

Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
 2022-04-07 12:14:27 +08:00
Jiuzhu Dong
d87cf8d4ca fs/poll: change format for type pollevent_t 
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
 2022-04-07 12:14:06 +08:00
Jiuzhu Dong
d535943a69 fs/epoll: change type of eventset from uint8_t to uint32_t 
to support EPOLLONESHOT and so on.

Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
 2022-04-07 12:14:06 +08:00
Huang Qi
53fef8d9c4 arch/risc-v: Replace riscv_fault with riscv_exception 
Remove riscv_fault since its code is duplicated with riscv_exception,
and there are textual excpetion reason in riscv_exception.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2022-04-06 22:48:46 +08:00
yinshengkai
db012687f9 arch/sim: support simulator keyboard devices 2022-04-06 15:26:57 +03:00
Alan C. Assis
b8a9d7da19 esp32: Add board support to TWAI/CANBus 2022-04-06 15:09:46 +03:00
Alan C. Assis
1090e1a8ea xtensa/esp32: Add support to TWAI/CANBus controller 2022-04-06 15:09:46 +03:00
yinshengkai
dfbf06e250 fix uinput rpmsg logic error 2022-04-06 14:36:11 +03:00
Petro Karashchenko
ff0470d28a include/nuttx: remove double definitions of UNUSED macro 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-04-05 22:57:50 +08:00
zhuyanlin
df6985e2bf jlink-nuttx: update regs as nuttx regs save path change 
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-04-05 13:33:00 +02:00
zhuyanlin
6a761ff087 arch:tcbinfo: update tcbinfo as xcpcontext update 
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-04-05 13:33:00 +02:00
Xiang Xiao
ae6bfdc9b9 libc: Avoid the compiler generate code call self(memcpy/memmove/memset/memcmp) recursively 
please reference the similar change done by other libc implementation:
https://reviews.llvm.org/D68028?id=224286
85c2e6110c
4a1f55e92f
82dfae9ab0

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-04-05 13:25:53 +03:00
Xiang Xiao
34e17ba0ce libc/string: Fix the minor style issue 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-04-05 13:25:53 +03:00
Xiang Xiao
9785d6606c openamp: Change the dependence from OPENAMP to RPTUN 
since all rpmsg driver need the extension api exposed by rptun driver

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-04-05 10:05:41 +03:00
Long Dao
8bf0750090 Update cpp_cmake.rst 2022-04-05 02:04:05 +08:00
Long Dao
e25df6706d Update cpp_cmake.rst 
update CMAKE_C_FLAGS when compile C file
 2022-04-05 02:04:05 +08:00
Ville Juven
6c22e2894c RISC-V: Fix usage of static_assert in riscv_percpu.c 
There is no alias for struct riscv_percu_s
 2022-04-04 22:44:25 +08:00
Ville Juven
7db356e720 RISC-V: Fix file name of riscv_dispatch_syscall 2022-04-04 22:44:18 +08:00
Petro Karashchenko
d08fbca679 nuttx: unify FAR attribute usage across the code 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-04-04 21:32:58 +08:00
Abdelatif Guettouche
f527abc324 arch/xtensa: Build the xtensa_tcbinfo.c file for S2 and S3. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-04-04 21:25:47 +08:00
Xiang Xiao
499c450d36 libc/netdb: Hold dns lock when operating with resolv.conf 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-04-04 19:48:36 +09:00
Xiang Xiao
cd695cd0d9 libc/netdb: Remove the temporary unlock in dns_foreach_nameserver 
since netdb support the recursive lock

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-04-04 19:48:36 +09:00
Xiang Xiao
a8cac59864 libc/netdb: Support the recursive lock 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-04-04 19:48:36 +09:00
Xiang Xiao
9f7ecbd5b7 syscall: Fix Makefile:69: target 'syscall_names.o' given more than once in the same rule 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-04-04 08:44:50 +02:00
YAMAMOTO Takashi
75b1358d8e modlib_bind.c: Restore "Relocation address out of range" checks 
Restore the checks which got completely broken by the following change.
```
commit 15142a8b10
Author: anjiahao <anjiahao@xiaomi.com>
Date:   Fri Apr 1 16:20:03 2022 +0800

    modlib/modlib_bind:fix unsigned_compare with zero

    Signed-off-by: anjiahao <anjiahao@xiaomi.com>
```
 2022-04-04 09:12:37 +03:00
Xiang Xiao
bf48c6d4a8 arch/riscv: Rename SCRATCH_HARTID_OFFSET to RISCV_PERCPU_HARTID_OFFSET 
and fix the typo error

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-04-04 08:22:08 +03:00