stack_t used by sigaltstack, make it compile sucess in sim.
Signed-off-by: yangyalei <yangyalei@xiaomi.com>
ltp: fix compile errors
Signed-off-by: yangyalei <yangyalei@xiaomi.com>
If the cache is already enabled before NuttX starts up,
enabling the cache in NuttX will cause the cache to be
re-invalidated, then resulting in data that is already
in the cache being flushed out.
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
1. add lib_fork api in libs/libc, we need a fork() api to implement the
fork relative method, such as pthread_atfork
2. rename the assembly fork entry function name to up_fork(), and rename
the up_fork() to arch specific name, such as
sim_fork()/arm_fork()/mips_fork() etc.
Signed-off-by: guoshichao <guoshichao@xiaomi.com>
The implementation of up_perf_*() is in a different static library in nuttx:
Hardware: libarch.a
Software: libdrivers.a (weak function)
Since functions with weak attributes cannot be correctly replaced in multiple static libraries,
this PR will use macros to replace whether the arch supports hardware perf events
Signed-off-by: chao an <anchao@xiaomi.com>
If -fstack-protector-all is enabled, gcc linker will need GCC
SSP(Stack Smashing Protector) support, Since the implement of SSP
is related to the OS, most of embedded toolchain does not provide
ssp support, so an error will be reported when linking:
enable CONFIG_LTO_FULL && CONFIG_STACK_CANARIES
arm-none-eabi/bin/ld: cannot find -lssp_nonshared: No such file or directory
arm-none-eabi/bin/ld: cannot find -lssp: No such file or directory
https://github.com/gcc-mirror/gcc/blob/master/gcc/gcc.cc#L983-L985
Since nuttx has already implemented SSP related hook functions,
so in this PR, we filter out this option in the link phase to ensure that
the implementation of lssp/lssp_nonshared will not be referenced
Signed-off-by: chao an <anchao@xiaomi.com>
According to the ARMv7a/r/m and ARMv8m architecture manuals
The allowed values are
0 Data or unified cache.
1 Instruction cache.
"One CCSIDR is implemented for each cache that can be accessed by the processor. CSSELR selects which Cache Size ID Register is accessible, see c0, Cache Size Selection Register (CSSELR)."
Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
Remove TABs
Fix indentation
Fix Multi-line comments
Fix Comments to the Right of Statements.
Fix nuttx coding style
Fix Comments to the Right of Statements.
1. as we can use fork to implement vfork, so we rename the vfork to
fork, and use the fork method as the base to implement vfork method
2. create the vfork function as a libc function based on fork
function
Signed-off-by: guoshichao <guoshichao@xiaomi.com>
