..
addrenv.h
arm_addrenv_kstack.c
Add CONFIG_DEBUG_ERROR. Change names of *dbg() * *err()
2016-06-11 15:50:49 -06:00
arm_addrenv_shm.c
arm_addrenv_ustack.c
Add CONFIG_DEBUG_ERROR. Change names of *dbg() * *err()
2016-06-11 15:50:49 -06:00
arm_addrenv_utils.c
Add CONFIG_DEBUG_ERROR. Change names of *dbg() * *err()
2016-06-11 15:50:49 -06:00
arm_addrenv.c
Add CONFIG_DEBUG_ERROR. Change names of *dbg() * *err()
2016-06-11 15:50:49 -06:00
arm_allocpage.c
arm_assert.c
SMP: Fix typos in some conditional compilation
2016-11-24 17:59:45 -06:00
arm_blocktask.c
arm_checkmapping.c
arm_coherent_dcache.c
arm_copyarmstate.c
arm_copyfullstate.c
arm_cpuhead.S
i.MX6: Don't output the alphabet if CONFIG_DEBUG_FEATURES is not set.
2016-11-29 08:34:22 -06:00
arm_cpuidlestack.c
arm_cpuindex.c
arm_cpupause.c
irq_dispatch: Add argument pointer to irq_dispatch
2017-02-27 06:27:56 -06:00
arm_cpustart.c
irq_dispatch: Add argument pointer to irq_dispatch
2017-02-27 06:27:56 -06:00
arm_dataabort.c
Without lowsyslog() *llinfo() is not useful. Eliminate and replace with *info().
2016-06-20 11:59:15 -06:00
arm_doirq.c
SMP: Back out deferred IRQ locking. This was accidentally merged into master and it looks like it is going to be more work than I thought to get it working again. Changes will go to the irqlock branch.
2016-12-24 19:53:37 -06:00
arm_fpuconfig.S
arm_fullcontextrestore.S
SMP: Back out deferred IRQ locking. This was accidentally merged into master and it looks like it is going to be more work than I thought to get it working again. Changes will go to the irqlock branch.
2016-12-24 19:53:37 -06:00
arm_gicv2_dump.c
Without lowsyslog() *llinfo() is not useful. Eliminate and replace with *info().
2016-06-20 11:59:15 -06:00
arm_gicv2.c
irq_dispatch: Add argument pointer to irq_dispatch
2017-02-27 06:27:56 -06:00
arm_head.S
ARMv7-A/i.MX6: Modify handling of the SMP cache coherency configuration so that it is identical to the steps from the TRM. Makes no differenct, however.
2016-11-27 10:21:46 -06:00
arm_initialstate.c
arm_l2cc_pl310.c
armv7-a/armv6-m/arm/a1x: Convert *err() to either *info() or add ERROR:, depending on if an error is reported
2016-06-17 16:44:50 -06:00
arm_mmu.c
arm_pgalloc.c
arm_pghead.S
ARMv7-A/i.MX6: Modify handling of the SMP cache coherency configuration so that it is identical to the steps from the TRM. Makes no differenct, however.
2016-11-27 10:21:46 -06:00
arm_pginitialize.c
arm_physpgaddr.c
arm_prefetchabort.c
Without lowsyslog() *llinfo() is not useful. Eliminate and replace with *info().
2016-06-20 11:59:15 -06:00
arm_releasepending.c
Revert "All CMP platforms: Apply same fix verified on other platforms found on Xtensa."
2016-12-25 07:08:44 -06:00
arm_reprioritizertr.c
Without lowsyslog() *llinfo() is not useful. Eliminate and replace with *info().
2016-06-20 11:59:15 -06:00
arm_restorefpu.S
arm_savefpu.S
arm_saveusercontext.S
arm_schedulesigaction.c
SMP: Fix a typo introduced in c5b00ccfc4
2017-01-16 08:48:05 -06:00
arm_scu.c
For Cortex-A9, should also set ACTLR.FW in SMP mode to enble TLB and cache broadcasts. Does not fix SMP cache problem.
2016-12-07 09:06:41 -06:00
arm_sigdeliver.c
SMP: Add spin_trylock(). Use this in conditions where other CPUs need to stopped but we cannot call enter_critical_section.
2016-11-24 13:33:43 -06:00
arm_signal_dispatch.c
arm_syscall.c
Without lowsyslog() *llinfo() is not useful. Eliminate and replace with *info().
2016-06-20 11:59:15 -06:00
arm_testset.S
Implement deferred IRQ locking. Adds support for ARMv7-A.
2016-12-23 10:17:36 -06:00
arm_unblocktask.c
arm_undefinedinsn.c
Add underscore at beginning of alert() as well
2016-06-16 12:38:05 -06:00
arm_va2pte.c
arm_vectoraddrexcptn.S
arm_vectors.S
i.MX6 interrupt handling: Additional logic needed to handle nested interrupts when an interrupt stack is used
2016-12-13 10:04:38 -06:00
arm_vectortab.S
arm_vfork.S
arm_virtpgaddr.c
arm.h
cache.h
For Cortex-A9, should also set ACTLR.FW in SMP mode to enble TLB and cache broadcasts. Does not fix SMP cache problem.
2016-12-07 09:06:41 -06:00
cp15_cacheops.h
cp15_clean_dcache.S
cp15_coherent_dcache.S
cp15_flush_dcache.S
cp15_invalidate_dcache_all.S
cp15_invalidate_dcache.S
cp15.h
crt0.c
fpu.h
gic.h
irq_dispatch: Add argument pointer to irq_dispatch
2017-02-27 06:27:56 -06:00
gtm.h
Kconfig
Move optimized ARM memcpy functions from arch/arm/src/ to libc/machine/. This is necessary for the PROTECTED and KERNEL build modes. Otherwise, memcpy() will be built in to kernel space and not accessible to applications.
2017-01-20 10:53:46 -06:00
l2cc_pl310.h
l2cc.h
mmu.h
i.MX6: Remove non-cached, inter-cpu memory region. Not a useful concept.
2016-12-13 16:59:50 -06:00
mpcore.h
pgalloc.h
sctlr.h
scu.h
ARMv7-A: Fix some SCU SMP logic
2016-11-26 18:41:48 -06:00
smp.h
svcall.h
Toolchain.defs
Back out most of 34be3e7c3c and update README again. Windows native tools cannot be used with Ubuntu under Windows 10 now. For Cygwin, that support depends on the 'cygpath -w' tool to convert POSIX paths to Windows paths. There is no corresponding tool for Ubuntu under Windows 10.
2017-01-01 16:29:03 -06:00
b3222bbc8a