2018-03-26 18:37:32 +02:00
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#
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# For a description of the syntax of this configuration file,
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# see the file kconfig-language.txt in the NuttX tools repository.
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#
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comment "NRF52 Configuration Options"
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choice
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prompt "NRF52 Chip Selection"
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default ARCH_CHIP_NRF52832
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depends on ARCH_CHIP_NRF52
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config ARCH_CHIP_NRF52832
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bool "NRF52832"
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select ARCH_FAMILY_NRF52
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2020-08-30 12:23:50 +02:00
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select NRF52_HAVE_BPROT
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2019-12-19 16:40:56 +01:00
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config ARCH_CHIP_NRF52833
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bool "NRF52832"
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select ARCH_FAMILY_NRF52
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2020-08-30 12:23:50 +02:00
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select NRF52_HAVE_ACL
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2019-12-19 16:40:56 +01:00
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select NRF52_HAVE_UART1
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select NRF52_HAVE_PORT1
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select NRF52_HAVE_SPI3_MASTER
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select NRF52_HAVE_USBDEV
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2020-08-30 12:23:50 +02:00
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select NRF52_HAVE_PWM3
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2018-03-26 18:37:32 +02:00
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2019-03-12 13:51:24 +01:00
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config ARCH_CHIP_NRF52840
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bool "NRF52840"
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select ARCH_FAMILY_NRF52
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2020-08-30 12:23:50 +02:00
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select NRF52_HAVE_ACL
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2019-12-16 19:35:45 +01:00
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select NRF52_HAVE_UART1
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select NRF52_HAVE_PORT1
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2019-12-19 16:40:56 +01:00
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select NRF52_HAVE_SPI3_MASTER
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select NRF52_HAVE_QSPI
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select NRF52_HAVE_USBDEV
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2020-08-30 12:23:50 +02:00
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select NRF52_HAVE_PWM3
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select NRF52_HAVE_CRYPTOCELL
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2019-03-12 13:51:24 +01:00
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2018-03-26 18:37:32 +02:00
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endchoice # NRF52 Chip Selection
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# NRF52 Families
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config ARCH_FAMILY_NRF52
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bool
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default n
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# Peripheral support
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2020-08-30 12:23:50 +02:00
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config NRF52_HAVE_BPROT
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bool
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default n
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config NRF52_HAVE_ACL
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bool
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default n
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2019-12-19 16:40:56 +01:00
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config NRF52_HAVE_UART1
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2018-03-26 18:37:32 +02:00
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bool
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default n
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2019-12-19 16:40:56 +01:00
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config NRF52_HAVE_PORT1
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2018-03-26 18:37:32 +02:00
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bool
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default n
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2019-12-19 16:40:56 +01:00
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config NRF52_HAVE_SPI3_MASTER
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2019-12-16 19:35:45 +01:00
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bool
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default n
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2019-12-19 16:40:56 +01:00
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config NRF52_HAVE_QSPI
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bool
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default n
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config NRF52_HAVE_USBDEV
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2019-12-16 19:35:45 +01:00
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bool
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default n
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2020-08-30 12:23:50 +02:00
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config NRF52_HAVE_PWM3
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bool
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default n
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config NRF52_HAVE_CRYPTOCELL
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bool
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default n
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2019-12-16 19:35:45 +01:00
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# Peripheral Selection
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2019-12-19 16:40:56 +01:00
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config NRF52_I2C_MASTER
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bool
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default n
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config NRF52_SPI_MASTER
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bool
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default n
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2019-12-16 19:35:45 +01:00
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config NRF52_UART
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2018-03-26 18:37:32 +02:00
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bool
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default n
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2020-07-18 10:00:41 +02:00
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config NRF52_TIMER
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bool
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default n
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2020-09-13 12:29:19 +02:00
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config NRF52_PWM
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bool
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default n
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2020-07-18 10:05:46 +02:00
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config NRF52_RTC
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bool
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default n
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2018-03-26 18:37:32 +02:00
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menu "NRF52 Peripheral Selection"
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config NRF52_I2C0_MASTER
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bool "I2C0 Master"
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default n
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2019-12-19 16:40:56 +01:00
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select NRF52_I2C_MASTER
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2018-03-26 18:37:32 +02:00
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config NRF52_I2C1_MASTER
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bool "I2C1 Master"
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default n
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2019-12-19 16:40:56 +01:00
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select NRF52_I2C_MASTER
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config NRF52_SPI0_MASTER
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bool "SPI0 Master"
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default n
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select NRF52_SPI_MASTER
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config NRF52_SPI1_MASTER
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bool "SPI1 Master"
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default n
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select NRF52_SPI_MASTER
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2020-09-16 03:13:46 +02:00
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config NRF52_SPI2_MASTER
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bool "SPI2 Master"
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default n
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select NRF52_SPI_MASTER
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2019-12-19 16:40:56 +01:00
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config NRF52_SPI3_MASTER
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bool "SPI3 Master"
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default n
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select NRF52_SPI_MASTER
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depends on NRF52_HAVE_SPI3_MASTER
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2018-03-26 18:37:32 +02:00
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2020-01-08 15:48:20 +01:00
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if NRF52_SPI_MASTER
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config NRF52_SPI_MASTER_INTERRUPTS
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bool "SPI Master interrupts support"
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default n
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endif
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config NRF52_GPIOTE
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bool "GPIOTE (GPIO interrupts)"
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default n
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2018-03-26 18:37:32 +02:00
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config NRF52_UART0
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bool "UART0"
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default n
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select UART0_SERIALDRIVER
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2019-12-16 19:35:45 +01:00
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select NRF52_UART
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config NRF52_UART1
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bool "UART1"
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default n
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depends on NRF52_HAVE_UART1
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select UART1_SERIALDRIVER
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select NRF52_UART
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2018-03-26 18:37:32 +02:00
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2019-03-12 13:51:24 +01:00
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config NRF52_RNG
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bool "Random Generator"
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default n
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2019-03-13 14:21:29 +01:00
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select ARCH_HAVE_RNG
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2019-03-12 13:51:24 +01:00
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config NRF52_QSPI
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bool "QSPI"
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default n
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2019-12-19 16:40:56 +01:00
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depends on NRF52_HAVE_QSPI
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2019-03-12 13:51:24 +01:00
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2018-04-20 15:13:22 +02:00
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config NRF52_WDT
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bool "Watchdog (WDT)"
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default n
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select WATCHDOG
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2019-12-19 16:40:56 +01:00
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config NRF52_RADIO
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bool "RADIO"
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2020-04-03 17:12:41 +02:00
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depends on EXPERIMENTAL
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2021-01-24 18:19:59 +01:00
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depends on !NRF52_SOFTDEVICE_CONTROLLER
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2019-12-19 16:40:56 +01:00
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default n
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config NRF52_NFCT
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bool "NFCT"
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default n
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config NRF52_SAADC
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bool "SAADC"
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default n
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config NRF52_TIMER0
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bool "TIMER0"
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2020-07-18 10:00:41 +02:00
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select NRF52_TIMER
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2021-01-24 18:19:59 +01:00
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depends on !NRF52_SOFTDEVICE_CONTROLLER
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2019-12-19 16:40:56 +01:00
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default n
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config NRF52_TIMER1
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bool "TIMER1"
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2020-07-18 10:00:41 +02:00
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select NRF52_TIMER
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2019-12-19 16:40:56 +01:00
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default n
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config NRF52_TIMER2
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bool "TIMER2"
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2020-07-18 10:00:41 +02:00
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select NRF52_TIMER
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2019-12-19 16:40:56 +01:00
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default n
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config NRF52_TIMER3
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bool "TIMER3"
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2020-07-18 10:00:41 +02:00
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select NRF52_TIMER
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2019-12-19 16:40:56 +01:00
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default n
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config NRF52_TIMER4
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bool "TIMER4"
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2020-07-18 10:00:41 +02:00
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select NRF52_TIMER
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2019-12-19 16:40:56 +01:00
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default n
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2020-09-13 12:29:19 +02:00
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config NRF52_PWM0
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bool "PWM0"
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select NRF52_PWM
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default n
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config NRF52_PWM1
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bool "PWM1"
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select NRF52_PWM
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default n
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config NRF52_PWM2
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bool "PWM2"
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select NRF52_PWM
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default n
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config NRF52_PWM3
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bool "PWM3"
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depends on NRF52_HAVE_PWM3
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select NRF52_PWM
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default n
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2020-07-25 04:04:04 +02:00
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config NRF52_PPI
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bool "PPI"
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default n
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2019-12-19 16:40:56 +01:00
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config NRF52_RTC0
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bool "RTC0"
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2020-07-18 10:05:46 +02:00
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select NRF52_RTC
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2021-01-24 18:19:59 +01:00
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depends on !NRF52_SOFTDEVICE_CONTROLLER
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2019-12-19 16:40:56 +01:00
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default n
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config NRF52_RTC1
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bool "RTC1"
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2020-07-18 10:05:46 +02:00
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select NRF52_RTC
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2019-12-19 16:40:56 +01:00
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default n
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config NRF52_RTC2
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bool "RTC2"
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2020-07-18 10:05:46 +02:00
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select NRF52_RTC
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2019-12-19 16:40:56 +01:00
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default n
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config NRF52_I2S
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bool "I2S"
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default n
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config NRF52_USBDEV
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bool "USB Device"
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default n
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depends on NRF52_HAVE_USBDEV
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config NRF52_COMP
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bool "COMP"
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default n
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2018-03-26 18:37:32 +02:00
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endmenu # NRF52 Peripheral Selection
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2020-08-30 21:11:03 +02:00
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menu "Clock Configuration"
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config NRF52_HFCLK_XTAL
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bool "Enable HFCLK from external crystal"
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default n
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---help---
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If the board includes an external high-frequency crystal, enable this
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option to supply the HFCLK. If this option is disabled, the internal
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oscillator will be used.
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Note that the RADIO peripheral requires the HFCLK to be used.
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config NRF52_USE_LFCLK
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bool "Enable LFCLK"
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default n
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---help---
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Enable low-frequency clock.
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if NRF52_USE_LFCLK
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choice
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prompt "LFCLK source"
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default NRF52_LFCLK_XTAL
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config NRF52_LFCLK_XTAL
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bool "External 32.768Khz crystal"
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config NRF52_LFCLK_RC
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bool "Internal RC oscillator"
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config NRF52_LFCLK_SYNTH
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bool "Synthesized from HFCLK"
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endchoice
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endif # NRF52_USE_LFCLK
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endmenu # Clock Configuration
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2020-09-06 22:12:43 +02:00
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menu "System Timer"
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config NRF52_SYSTIMER
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bool
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default y
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choice
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prompt "System Timer Source"
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default NRF52_SYSTIMER_SYSTICK
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---help---
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Choose which hardware resource will drive NuttX
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system time
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config NRF52_SYSTIMER_SYSTICK
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bool "SysTick"
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select TIMER_ARCH
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select TIMER
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select ARMV7M_SYSTICK
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---help---
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Use ARM SysTick. It can be used for tickless and
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non-tickless mode.
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NOTE: nRF52 implementation of WFE/WFI involves is
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incompatible with SysTick. This means that if
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you choose this option, WFE/WFI will not be used
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in idle loop.
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config NRF52_SYSTIMER_RTC
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bool "RTC"
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select NRF52_RTC
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select SCHED_TICKLESS
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select SCHED_TICKLESS_ALARM
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select NRF52_USE_LFCLK
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---help---
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Use RTC timer in tickless mode.
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endchoice
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if NRF52_SYSTIMER_RTC
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config NRF52_SYSTIMER_RTC_INSTANCE
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int "RTC timer instance"
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2021-01-24 18:19:59 +01:00
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default 0 if !NRF52_SOFTDEVICE_CONTROLLER
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default 1 if NRF52_SOFTDEVICE_CONTROLLER
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2020-09-06 22:12:43 +02:00
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range 0 2
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---help---
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Which RTC instance to use to drive the system timer
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endif
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endmenu # System Timer
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2020-11-01 14:51:37 +01:00
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config NRF52_DCDC
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bool "Enable DC/DC regulator"
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default n
|
|
|
|
---help---
|
|
|
|
This option enables the DC/DC regulator, which reduces
|
|
|
|
current consumption. This requires extra circuitry (inductors).
|
|
|
|
|
2018-05-05 02:19:36 +02:00
|
|
|
config NRF52_FLASH_PREFETCH
|
|
|
|
bool "Enable FLASH Pre-fetch"
|
|
|
|
default y
|
|
|
|
---help---
|
|
|
|
Enable FLASH prefetch
|
|
|
|
|
|
|
|
config NRF52_PROGMEM
|
|
|
|
bool "FLASH program memory"
|
|
|
|
default n
|
|
|
|
select ARCH_HAVE_PROGMEM
|
|
|
|
---help---
|
|
|
|
Enable support FLASH interfaces as defined in include/nuttx/progmem.h
|
|
|
|
|
2018-03-26 18:37:32 +02:00
|
|
|
menu "GPIO Interrupt Configuration"
|
|
|
|
|
nrf52 GPIO/GPIOTE: better expose pin interrupt capability
This change improves upon current support for pin interrupts. Before,
a pin interrupt was handled (with nrf52_gpiote_setevent) using one
of the eight available GPIOTE channels. Moreover, it didn't event let
the user specify which channel to use (simply tried to get a free one).
Also, it was buggy since it did not consider unsetting the callback.
Besides GPIOTE channels, there is another way to deal with pin interrupts.
The GPIO peripheral is capable of generating a PORT event
(for the whole GPIO port) depending on the pin SENSE configuration
(HIGH or LOW, or NONE) and GPIO DETECTMODE register
(latching or non-latching).
This change then renames nrf52_gpiote_setevent into nrf52_gpiote_set_ch_event,
maintaining functionality of original function, but now allows specifying
channel (and correctly handles unsetting the callback). Then, a
new nrf52_gpiote_set_pin_event is added, which allows to set a callback
for a given pin. During initialization, interrupt for the PORT event is
enabled and handled in such way that for each pin whose corresponding
bit in LATCH register (indicates the result of pin SENSEing) the
callback for this pin will be invoked. This mechanism means that
every pin can get an ISR. It also avoids using GPIOTE channels for this
purpose which carry higher current consumption.
This new per-pin callback mechanism has some added memory requirement
so it can be disabled and its default is dependant on DEFAULT_SMALL.
When disabled, a callback for the PORT event can be set directly
with nrf52_gpiote_set_port_event
There was only one use of nrf52_gpio_setevent() which was migrated
into nrf52_gpio_set_ch_event() passing channel zero.
2020-11-07 21:12:47 +01:00
|
|
|
config NRF52_PER_PIN_INTERRUPTS
|
|
|
|
bool "Per-pin interrupt callbacks"
|
|
|
|
default n if DEFAULT_SMALL
|
|
|
|
default y if !DEFAULT_SMALL
|
|
|
|
depends on NRF52_GPIOTE
|
|
|
|
---help---
|
|
|
|
The GPIOTE peripheral supports a limited number of channels which can
|
|
|
|
be set to EVENT mode and thus generate interrupts on pin state changes.
|
|
|
|
Another mechanism offered by the GPIO/GPIOTE peripherals is the PORT
|
|
|
|
event. This event is generated from a signal shared by all pins in
|
|
|
|
the GPIO port.
|
|
|
|
|
|
|
|
This option enables the ability to set per-pin callbacks that will
|
|
|
|
be invoked from the main GPIOTE ISR when a PORT event is generated.
|
|
|
|
As this involves extra storage to store each callback, this option can
|
|
|
|
be disabled to save space. In such case, it is possible to set a callback
|
|
|
|
for the whole PORT event directly.
|
|
|
|
|
2018-03-26 18:37:32 +02:00
|
|
|
endmenu # GPIO Interrupt Configuration
|
2020-09-13 12:29:19 +02:00
|
|
|
|
|
|
|
menu "PWM configuration"
|
|
|
|
|
|
|
|
config NRF52_PWM_MULTICHAN
|
|
|
|
bool "PWM Multiple Output Channels"
|
|
|
|
default n
|
|
|
|
|
|
|
|
if NRF52_PWM_MULTICHAN
|
|
|
|
|
|
|
|
if NRF52_PWM0
|
|
|
|
|
|
|
|
config NRF52_PWM0_CH0
|
|
|
|
bool "PWM0 Channel 0 Output"
|
|
|
|
default n
|
|
|
|
---help---
|
|
|
|
Enables channel 0 output.
|
|
|
|
|
|
|
|
config NRF52_PWM0_CH1
|
|
|
|
bool "PWM0 Channel 1 Output"
|
|
|
|
default n
|
|
|
|
---help---
|
|
|
|
Enables channel 1 output.
|
|
|
|
|
|
|
|
config NRF52_PWM0_CH2
|
|
|
|
bool "PWM0 Channel 2 Output"
|
|
|
|
default n
|
|
|
|
---help---
|
|
|
|
Enables channel 2 output.
|
|
|
|
|
|
|
|
config NRF52_PWM0_CH3
|
|
|
|
bool "PWM0 Channel 3 Output"
|
|
|
|
default n
|
|
|
|
---help---
|
|
|
|
Enables channel 3 output.
|
|
|
|
|
|
|
|
endif # NRF52_PWM0
|
|
|
|
|
|
|
|
if NRF52_PWM1
|
|
|
|
|
|
|
|
config NRF52_PWM1_CH0
|
|
|
|
bool "PWM1 Channel 0 Output"
|
|
|
|
default n
|
|
|
|
---help---
|
|
|
|
Enables channel 0 output.
|
|
|
|
|
|
|
|
config NRF52_PWM1_CH1
|
|
|
|
bool "PWM1 Channel 1 Output"
|
|
|
|
default n
|
|
|
|
---help---
|
|
|
|
Enables channel 1 output.
|
|
|
|
|
|
|
|
config NRF52_PWM1_CH2
|
|
|
|
bool "PWM1 Channel 2 Output"
|
|
|
|
default n
|
|
|
|
---help---
|
|
|
|
Enables channel 2 output.
|
|
|
|
|
|
|
|
config NRF52_PWM1_CH3
|
|
|
|
bool "PWM1 Channel 3 Output"
|
|
|
|
default n
|
|
|
|
---help---
|
|
|
|
Enables channel 3 output.
|
|
|
|
|
|
|
|
endif # NRF52_PWM1
|
|
|
|
|
|
|
|
if NRF52_PWM2
|
|
|
|
|
|
|
|
config NRF52_PWM2_CH0
|
|
|
|
bool "PWM2 Channel 0 Output"
|
|
|
|
default n
|
|
|
|
---help---
|
|
|
|
Enables channel 0 output.
|
|
|
|
|
|
|
|
config NRF52_PWM2_CH1
|
|
|
|
bool "PWM2 Channel 1 Output"
|
|
|
|
default n
|
|
|
|
---help---
|
|
|
|
Enables channel 1 output.
|
|
|
|
|
|
|
|
config NRF52_PWM2_CH2
|
|
|
|
bool "PWM2 Channel 2 Output"
|
|
|
|
default n
|
|
|
|
---help---
|
|
|
|
Enables channel 2 output.
|
|
|
|
|
|
|
|
config NRF52_PWM2_CH3
|
|
|
|
bool "PWM2 Channel 3 Output"
|
|
|
|
default n
|
|
|
|
---help---
|
|
|
|
Enables channel 3 output.
|
|
|
|
|
|
|
|
endif # NRF52_PWM2
|
|
|
|
|
|
|
|
if NRF52_PWM3
|
|
|
|
|
|
|
|
config NRF52_PWM3_CH0
|
|
|
|
bool "PWM3 Channel 0 Output"
|
|
|
|
default n
|
|
|
|
---help---
|
|
|
|
Enables channel 0 output.
|
|
|
|
|
|
|
|
config NRF52_PWM3_CH1
|
|
|
|
bool "PWM3 Channel 1 Output"
|
|
|
|
default n
|
|
|
|
---help---
|
|
|
|
Enables channel 1 output.
|
|
|
|
|
|
|
|
config NRF52_PWM3_CH2
|
|
|
|
bool "PWM3 Channel 2 Output"
|
|
|
|
default n
|
|
|
|
---help---
|
|
|
|
Enables channel 2 output.
|
|
|
|
|
|
|
|
config NRF52_PWM3_CH3
|
|
|
|
bool "PWM3 Channel 3 Output"
|
|
|
|
default n
|
|
|
|
---help---
|
|
|
|
Enables channel 3 output.
|
|
|
|
|
|
|
|
endif # NRF52_PWM3
|
|
|
|
|
|
|
|
endif # !NRF52_PWM_MULTICHAN
|
|
|
|
|
|
|
|
if !NRF52_PWM_MULTICHAN
|
|
|
|
|
|
|
|
config NRF52_PWM0_CHANNEL
|
|
|
|
int "PWM0 Output Channel"
|
|
|
|
depends on NRF52_PWM0
|
|
|
|
default 0
|
|
|
|
range 0 3
|
|
|
|
|
|
|
|
config NRF52_PWM1_CHANNEL
|
|
|
|
int "PWM1 Output Channel"
|
|
|
|
depends on NRF52_PWM1
|
|
|
|
default 0
|
|
|
|
range 0 3
|
|
|
|
|
|
|
|
config NRF52_PWM2_CHANNEL
|
|
|
|
int "PWM2 Output Channel"
|
|
|
|
depends on NRF52_PWM2
|
|
|
|
default 0
|
|
|
|
range 0 3
|
|
|
|
|
|
|
|
config NRF52_PWM3_CHANNEL
|
|
|
|
int "PWM3 Output Channel"
|
|
|
|
depends on NRF52_PWM3
|
|
|
|
default 0
|
|
|
|
range 0 3
|
|
|
|
|
|
|
|
endif # !NRF52_PWM_MULTICHAN
|
|
|
|
|
|
|
|
endmenu # PWM configuration
|
2020-09-13 12:30:35 +02:00
|
|
|
|
|
|
|
menu "SAADC Configuration"
|
|
|
|
|
|
|
|
if NRF52_SAADC
|
|
|
|
|
|
|
|
choice
|
|
|
|
prompt "SAADC trigger selection"
|
|
|
|
default NRF52_SAADC_TASK
|
|
|
|
---help---
|
|
|
|
Choose mode for sample rate control
|
|
|
|
|
|
|
|
config NRF52_SAADC_TASK
|
|
|
|
bool "SAADC Task trigger"
|
|
|
|
|
|
|
|
config NRF52_SAADC_TIMER
|
|
|
|
bool "SAADC Timer trigger"
|
|
|
|
|
|
|
|
endchoice # SAADC trigger selection
|
|
|
|
|
|
|
|
if NRF52_SAADC_TIMER
|
|
|
|
|
|
|
|
config NRF52_SAADC_TIMER_CC
|
|
|
|
int "SAADC Timer CC"
|
|
|
|
default 0
|
|
|
|
range 80 2047
|
|
|
|
|
|
|
|
endif #NRF52_SAADC_TIMER
|
|
|
|
|
|
|
|
config NRF52_SAADC_OVERSAMPLE
|
|
|
|
int "SAADC oversample"
|
|
|
|
default 0
|
|
|
|
range 0 8
|
|
|
|
---help---
|
|
|
|
SAADC oversample control
|
|
|
|
|
|
|
|
config NRF52_SAADC_RESOLUTION
|
|
|
|
int "SAADC resolution"
|
|
|
|
default 0
|
|
|
|
range 0 3
|
|
|
|
---help---
|
|
|
|
SAADC resolution 0 - 8 bits, 1 - 10 bits, 2 - 12 bits, 3 - 14 bits
|
|
|
|
|
|
|
|
config NRF52_SAADC_CHANNELS
|
|
|
|
int "SAADC channels"
|
|
|
|
default 8
|
|
|
|
range 0 8
|
|
|
|
---help---
|
|
|
|
SAADC channels
|
|
|
|
|
|
|
|
config NRF52_SAADC_LIMITS
|
|
|
|
bool "SAADC limits enable"
|
|
|
|
default n
|
|
|
|
---help---
|
|
|
|
SAADC limist enable
|
|
|
|
|
|
|
|
endif # NRF52_SAADC
|
|
|
|
|
|
|
|
endmenu # SAADC Configuration
|
2020-11-09 20:56:51 +01:00
|
|
|
|
|
|
|
menu "SPI Configuration"
|
|
|
|
|
|
|
|
config NRF52_SPI_MASTER_WORKAROUND_1BYTE_TRANSFER
|
|
|
|
bool "Master 1 Byte transfer anomaly workaround"
|
|
|
|
depends on NRF52_SPI_MASTER && ARCH_CHIP_NRF52832
|
2021-01-30 21:28:17 +01:00
|
|
|
select NRF52_PPI
|
2020-11-09 20:56:51 +01:00
|
|
|
default y
|
|
|
|
---help---
|
|
|
|
Enable the workaround to fix SPI Master 1 byte transfer bug
|
|
|
|
which occurs in NRF52832 revision 1 and revision 2.
|
|
|
|
endmenu
|
2021-01-13 07:47:51 +01:00
|
|
|
|
|
|
|
menu "I2C Master Configuration"
|
|
|
|
|
|
|
|
config NRF52_I2C_MASTER_DISABLE_NOSTART
|
|
|
|
bool "Disable the I2C Master NOSTART flag support"
|
|
|
|
default n
|
2021-01-17 23:18:12 +01:00
|
|
|
---help---
|
|
|
|
To combine two i2c messages that are part of a
|
|
|
|
single transaction (NO_STOP-NO_START) the nrf52
|
|
|
|
hardware requires these be joined into a single
|
|
|
|
transfer. This can be expensive and some devices
|
|
|
|
can get away with multi-part transfers as separate
|
|
|
|
transfers. Enable this at your own risk!
|
|
|
|
|
|
|
|
config NRF52_I2C_MASTER_COPY_BUF_SIZE
|
|
|
|
int "Static buffer size for NOSTART flag support"
|
|
|
|
depends on !NRF52_I2C_MASTER_DISABLE_NOSTART
|
|
|
|
default 4
|
|
|
|
---help---
|
|
|
|
To combine two i2c messages that are part of a
|
|
|
|
single transaction (NO_STOP-NO_START) the nrf52
|
|
|
|
hardware requires these be joined into a single
|
|
|
|
transfer. This static buffer will be used if the
|
|
|
|
transaction will fit otherwise it will fall back
|
|
|
|
on malloc.
|
2021-01-13 07:47:51 +01:00
|
|
|
|
|
|
|
endmenu
|
2021-01-24 18:19:59 +01:00
|
|
|
|
|
|
|
menuconfig NRF52_SOFTDEVICE_CONTROLLER
|
|
|
|
bool "SoftDevice Controller"
|
|
|
|
select CONFIG_ARMV7M_USEBASEPRI
|
|
|
|
select CONFIG_ARCH_RAMVECTORS
|
|
|
|
select NRF52_USE_LFCLK
|
|
|
|
select NRF52_LFCLK_XTAL
|
|
|
|
---help---
|
|
|
|
This enables use of Nordic SoftDevice controller
|
|
|
|
(SDC). It is a library version of a subset of
|
|
|
|
full SoftDevice, which only includes the BLE
|
|
|
|
controller implementation.
|
|
|
|
|
|
|
|
It makes use of RTC0, TIMER0, RADIO and RNG, so
|
|
|
|
these will be unavailable for direct use by user.
|
|
|
|
It also makes use of PPI channel range 17-31.
|
|
|
|
|
|
|
|
if NRF52_SOFTDEVICE_CONTROLLER
|
|
|
|
|
|
|
|
config NRF52_SDC_CLOCK_ACCURACY
|
|
|
|
int "Clock Accuracy [PPM]"
|
|
|
|
default 250
|
|
|
|
---help---
|
|
|
|
Select the clock accuracy depending on the chosen low-frequency clock
|
|
|
|
source
|
|
|
|
|
|
|
|
config NRF52_SDC_SLAVE_COUNT
|
|
|
|
int "Number of slave roles to support (also master)"
|
|
|
|
default 1
|
|
|
|
---help---
|
|
|
|
This controls how many slave connections will be supported. It also
|
|
|
|
determines the number of master roles from the following:
|
|
|
|
|
|
|
|
MASTER_ROLES = CONFIG_BLUETOOTH_MAX_CONN - NRF52_SDC_SLAVE_COUNT
|
|
|
|
|
|
|
|
So by choosing these two variables you can control both capabilities.
|
|
|
|
|
|
|
|
config NRF52_SDC_ADVERTISING
|
|
|
|
bool "Support advertising"
|
|
|
|
default y
|
|
|
|
|
|
|
|
config NRF52_SDC_SCANNING
|
|
|
|
bool "Support scanning"
|
|
|
|
default y
|
|
|
|
|
|
|
|
config NRF52_SDC_LE_2M_PHY
|
|
|
|
bool "Support LE 2M PHY"
|
|
|
|
default y
|
|
|
|
|
|
|
|
config NRF52_SDC_LE_CODED_PHY
|
|
|
|
bool "Support LE Coded PHY"
|
|
|
|
default y
|
|
|
|
|
|
|
|
config NRF52_SDC_DLE
|
|
|
|
bool "Support Data Length Extension (DLE)"
|
|
|
|
default y
|
|
|
|
|
|
|
|
config NRF52_SDC_VERSION
|
|
|
|
int "SoftDevice version"
|
|
|
|
default 132 if ARCH_CHIP_NRF52832
|
|
|
|
default 140 if ARCH_CHIP_NRF52840
|
|
|
|
---help---
|
|
|
|
The softdevice version to use. This depends on the particular chip
|
|
|
|
to use. See official Nordic documentation on which chips are supported
|
|
|
|
in each version.
|
|
|
|
endif
|
|
|
|
|