nuttx/arch/arm/src/stm32h7/Make.defs

############################################################################
# arch/arm/src/stm32h7/Make.defs
#
#   Copyright (C) 2018 Gregory Nutt. All rights reserved.
#   Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
#    notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
#    notice, this list of conditions and the following disclaimer in
#    the documentation and/or other materials provided with the
#    distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
#    used to endorse or promote products derived from this software
#    without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
############################################################################

# The start-up, "head", file.  Only common vectors are support so there
# isn't one.

HEAD_ASRC =

# Common ARM and Cortex-M7 files

CMN_UASRCS =
CMN_UCSRCS =

CMN_ASRCS  = up_saveusercontext.S up_fullcontextrestore.S up_switchcontext.S
CMN_ASRCS += up_testset.S vfork.S

ifeq ($(CONFIG_ARCH_SETJMP_H),y)
ifeq ($(CONFIG_ARCH_TOOLCHAIN_GNU),y)
CMN_ASRCS += up_setjmp.S
endif
endif

CMN_CSRCS  = up_assert.c up_blocktask.c up_copyfullstate.c up_createstack.c
CMN_CSRCS += up_doirq.c up_exit.c up_hardfault.c  up_initialize.c
CMN_CSRCS += up_initialstate.c up_interruptcontext.c up_mdelay.c up_memfault.c
CMN_CSRCS += up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c
CMN_CSRCS += up_releasepending.c up_releasestack.c up_reprioritizertr.c
CMN_CSRCS += up_schedulesigaction.c up_sigdeliver.c up_stackframe.c up_svcall.c
CMN_CSRCS += up_systemreset.c up_trigger_irq.c up_udelay.c up_unblocktask.c
CMN_CSRCS += up_usestack.c up_vfork.c

# Configuration-dependent common files

ifeq ($(CONFIG_ARMV7M_STACKCHECK),y)
CMN_CSRCS += up_stackcheck.c
endif

ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
CMN_ASRCS += up_lazyexception.S
else
CMN_ASRCS += up_exception.S
endif
CMN_CSRCS += up_vectors.c

CMN_CSRCS += up_cache.c
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += up_fpu.S
CMN_CSRCS += up_copyarmstate.c
endif

ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
CMN_CSRCS += up_idle.c
endif

ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
endif

ifeq ($(CONFIG_BUILD_PROTECTED),y)
CMN_CSRCS += up_mpu.c up_task_start.c up_pthread_start.c
CMN_CSRCS += up_signal_dispatch.c
CMN_UASRCS += up_signal_handler.S
endif

ifeq ($(CONFIG_STACK_COLORATION),y)
CMN_CSRCS += up_checkstack.c
endif

# Required STM32H7 files

CHIP_ASRCS  =
CHIP_CSRCS  = stm32_allocateheap.c stm32_exti_gpio.c stm32_gpio.c stm32_irq.c
CHIP_CSRCS += stm32_start.c stm32_rcc.c stm32_lowputc.c stm32_serial.c
CHIP_CSRCS += stm32_uid.c

ifneq ($(CONFIG_SCHED_TICKLESS),y)
CHIP_CSRCS += stm32_timerisr.c
endif

ifeq ($(CONFIG_BUILD_PROTECTED),y)
CHIP_CSRCS += stm32_userspace.c stm32_mpuinit.c
endif

ifeq ($(CONFIG_ARMV7M_DTCM),y)
CHIP_CSRCS += stm32_dtcm.c
ifeq ($(CONFIG_STM32H7_DTCM_PROCFS),y)
CHIP_CSRCS += stm32_procfs_dtcm.c
endif
endif

ifeq ($(CONFIG_STM32H7_ADC),y)
CHIP_CSRCS += stm32_adc.c
endif

ifeq ($(CONFIG_STM32H7_BBSRAM),y)
CHIP_CSRCS += stm32_bbsram.c
endif

ifeq ($(CONFIG_STM32H7_DMA),y)
CHIP_CSRCS += stm32_dma.c
endif

ifeq ($(filter y,$(CONFIG_STM32H7_IWDG) $(CONFIG_STM32H7_RTC_LSICLOCK)),y)
CHIP_CSRCS += stm32_lsi.c
endif

ifeq ($(CONFIG_STM32H7_RTC_LSECLOCK),y)
CHIP_CSRCS += stm32_lse.c
endif

ifeq ($(CONFIG_STM32H7_I2C),y)
CHIP_CSRCS += stm32_i2c.c
endif

ifeq ($(CONFIG_STM32H7_PWR),y)
CHIP_CSRCS += stm32_pwr.c
endif

ifeq ($(CONFIG_STM32H7_RTC),y)
CHIP_CSRCS += stm32_rtc.c
ifeq ($(CONFIG_RTC_ALARM),y)
CHIP_CSRCS += stm32_exti_alarm.c
endif
ifeq ($(CONFIG_RTC_PERIODIC),y)
CHIP_CSRCS += stm32_exti_wakeup.c
endif
ifeq ($(CONFIG_RTC_DRIVER),y)
CHIP_CSRCS += stm32_rtc_lowerhalf.c
endif
endif

ifeq ($(CONFIG_STM32H7_SPI),y)
CHIP_CSRCS += stm32_spi.c
endif

ifeq ($(CONFIG_STM32H7_SDMMC),y)
CHIP_CSRCS += stm32_sdmmc.c
endif

ifeq ($(CONFIG_USBDEV),y)
CHIP_CSRCS += stm32_otgdev.c
endif

ifeq ($(CONFIG_USBHOST),y)
CHIP_CSRCS += stm32_otghost.c
endif

ifeq ($(CONFIG_STM32H7_TIM),y)
CHIP_CSRCS += stm32_tim.c
endif

ifeq ($(CONFIG_STM32H7_PWM),y)
CHIP_CSRCS += stm32_pwm.c
endif

ifeq ($(CONFIG_STM32H7_ETHMAC),y)
CHIP_CSRCS += stm32_ethernet.c
endif

ifeq ($(CONFIG_SENSORS_QENCODER),y)
CHIP_CSRCS += stm32_qencoder.c
endif