Commit Graph

45647 Commits

Author SHA1 Message Date
ligd
118fd3902c dump_task: also dump thread param when dump thread name
Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-06-07 20:17:23 +03:00
Xiang Xiao
9d4c708913 net/tcp: Search conn list again to aovid the race condition in tcp_timer_expiry
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-06-07 20:15:41 +03:00
Xiang Xiao
fe85e9d0fa net: Remove devif_timer from comment
since devif_timer has been removed in:
commit 035d925864
Author: zhanghongyu <zhanghongyu@xiaomi.com>
Date:   Sun May 29 21:47:28 2022 +0800

    devif: remove all devif_timer

    Signed-off-by: zhanghongyu <zhanghongyu@xiaomi.com>

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-06-07 20:15:41 +03:00
Xiang Xiao
298b4aba0c net/tcp: Hold the net lock in tcp_timer_expiry
to follow the call convention for d_txavail

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-06-07 20:15:41 +03:00
Xiang Xiao
5b165a2294 libc/stdio: Generate the dummy atexit and on_exit
since the compiler may generate the code call atexit automatically

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-06-07 20:14:34 +03:00
Gustavo Henrique Nihei
183da24fc5 mm: Log name of the Heap to which the new region is being added
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-06-08 01:10:10 +08:00
Michał Łyszczek
f643edbe41 boards/nucleo-wl55jc: add new board
This patch includes bare minimum support for nucleo-wl55jc board.
It compiles and nsh shell is working properly on virtual com port
over USB. 3 onboard leds with userled driver are working.

Signed-off-by: Michał Łyszczek <michal.lyszczek@bofc.pl>
2022-06-07 23:20:02 +08:00
Michał Łyszczek
e54fe68bbf stm32wl5: add new chip family
This patch adds new chip family, stm32wl5x. This is bare minimum
implementation of said chip. I've tested this by running nsh.
There are only two chips in this family, stm32wl55 and stm32wl54.
The only difference between them is that stm32wl55 has LORA.

stm32wl5 is dual CPU (not core!). Right now only CPU1 is implemented.
CPU0 has access to radio hardware (while CPU1 does not). Chip is
designed so that CPU0 handles radio traffic while CPU1 does the
heavy lifting with data - there is communication pipe between two
CPUs.

I plan to use nuttx on CPU1 and LORA from stm32cube on CPU0 so I
don't have implementing CPU0 right now - once we have working LORA
in nuttx this may change.

Peripherals (except for radio) are shared so it's best to focus on
CPU1 to initialize all peripherals so that CPU0 can only use them
later. There is no real benefit to implement CPU0 if we don't have
working LORA/radio support in nuttx.

In time I will be implementing more and more things from this chip.
Right now I would like this minimal implementation to be merged in
case someone wants to work on this chip as well.

Signed-off-by: Michał Łyszczek <michal.lyszczek@bofc.pl>

---
patch v1->v2
  - fixed formatting (suggested by Alan Carvalho de Assis)
  - rebased patch to master (previous patch was based on nuttx-10.2
    and did not compile on master)
2022-06-07 22:28:32 +08:00
anjiahao
e0c3bf64a0 libc:Optimize the behavior of fwrite
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2022-06-07 22:28:00 +08:00
wangbowen6
af87921eda arm/tlsr82: gpio driver bug fix and optimize.
Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
2022-06-07 22:26:36 +08:00
Abdelatif Guettouche
8217c646a7 arch/xtensa/xtensa_coproc.S: Fix the condition to save the coprocessors
state.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-06-07 19:50:50 +08:00
zhuyanlin
3455002ffd libc:xtensa:arch_memmove: fix warning
warning: 'SIM_CHECKS_ALIGNMENT' macro redefined
[-Wmacro-redefined] #define SIM_CHECKS_ALIGNMENT 1

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-06-07 11:09:57 +03:00
Xiang Xiao
5509f8f4ba arch/x86: Fix the Kconfig warning
arch/x86/Kconfig:28:warning: choice value used outside its choice group
arch/x86/Kconfig:29:warning: defaults for choice values not supported

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-06-07 12:43:11 +09:00
Jeonghyun Kim
4058f01faf Correct code formatting 2022-06-07 03:20:57 +08:00
Jeonghyun Kim
f53792fea0 board: nucleo-l432kc: Add spi driver registering function and Make it is called on appinit. 2022-06-07 03:20:57 +08:00
Jeonghyun Kim
1717ffdb38 chip: stm32l4: Register spi character driver when both spi port and driver available 2022-06-07 03:20:57 +08:00
Jeonghyun Kim
f7295dd434 board: nucleo-l432kc: Add missing TIM1 CH3, CH4 pin definition 2022-06-07 03:20:57 +08:00
Jeonghyun Kim
9aa3edc11e chip: stm32l4: Correct config mistype 2022-06-07 03:20:57 +08:00
Abdelatif Guettouche
060df22968 arch/xtensa: Initialize the internal heap early.
We might have a situation where an allocation will be requested before
the call to `up_initialize` is performed.  For the current code, this
situation is the stack for the CPUs in SMP mode.

Beside this issue, it's natural to have the internal heap initialized
with the other heaps.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-06-07 02:32:30 +08:00
Fotis Panagiotopoulos
73d5a27702 Fix in default syslog date format. 2022-06-05 22:23:32 +08:00
Hidenori Matsubayashi
cbcc748985 Fix wrong path in README for RISC-V
Signed-off-by: Hidenori Matsubayashi <hidenori.matsubayashi@gmail.com>
2022-06-05 16:05:40 +08:00
Richard Tucker
2b8c59fcf1 arch/risc-v/litex: fix typo 2022-06-04 17:04:42 +03:00
Fotis Panagiotopoulos
c0df7317ac Fix in syslog file separator. 2022-06-04 14:30:15 +08:00
Xiang Xiao
01c8bebf58 sched/tls: Add task_init_info and task_uninit_info
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-06-03 23:56:50 +03:00
Xiang Xiao
47b707bbf8 sched/tls: Add tls_init_info and tls_dup_info
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-06-03 23:56:50 +03:00
Xiang Xiao
3e32b605fe libc/tls: Make tls_get_info as the pulibc function instead up_tls_info
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-06-03 23:56:50 +03:00
Xiang Xiao
33a6aa2f48 sched/tls: Don't compensate the tls size to the stack size
it isn't good to change the stack size passed by caller

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-06-03 23:56:50 +03:00
Xiang Xiao
bd76e69f8d tls: Merge tls_xxx into pthread_keyxxx
it's always better to provide the standard api directly

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-06-03 23:56:50 +03:00
Xiang Xiao
c19d37adf0 libc/wchar: Call mbsnrtowcs in mbrtowc to handle the partial sequence correctly
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-06-03 22:25:49 +03:00
Xiang Xiao
4c34075d10 libc/wchar: Remove the unnecessary cast
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-06-03 22:25:49 +03:00
Xiang Xiao
11e1a8b28b arch: Define WCHAR_[MIN|MAX] in arch/include/limits.h
follow up the below change:
commit 6357523892
Author: Xiang Xiao <xiaoxiang@xiaomi.com>
Date:   Mon Nov 1 12:40:51 2021 +0800

    arch: Add _wchar_t typedef like other basic types

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-06-03 22:25:49 +03:00
Xiang Xiao
7f3c540570 include/wchar.h: Remove NULL macro from it
since the same macro is defined in sys/types.h and
the comment out macro definition in stdint.h

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-06-03 22:25:49 +03:00
YAMAMOTO Takashi
375a64fed6 esp32-devkitc:wamr_wasi_debug: pin WAMR version
The "main" branch occasionally got broken.
It isn't nice to break our (nuttx's) CI every time it happens.
2022-06-04 01:05:45 +08:00
Richard Tucker
85af65e72e arch/risc-v: re-add missing riscv_udelay source
This was broken with: 9d9d591b93
2022-06-03 16:39:30 +08:00
Richard Tucker
e8ac5c44f4 libc/time: rearrange itimerspec struct elements
Aligns with the linux definition of itimerspec
2022-06-03 13:04:25 +08:00
chao.an
f66b17091c netpacket/sockaddr_ll: complete the members of sockaddr_ll
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-06-03 13:04:09 +08:00
chao.an
61ee155752 wireless: add Wireless statistics
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-06-03 13:04:09 +08:00
Michael Jung
9be3848491 Add driver for WIZnet W5500 Ethernet controller
A device driver based on drivers/net/skeleton.c, which uses the W5500 in
MACRAW mode (i.e. bypassing the integrated protocol stack).

Signed-off-by: Michael Jung <michael.jung@secore.ly>
2022-06-03 13:01:23 +08:00
chao.an
5f46a21c25 signal: add define of SIGHUP/SIGTTIN
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-06-03 12:50:14 +08:00
zhanghongyu
035d925864 devif: remove all devif_timer
Signed-off-by: zhanghongyu <zhanghongyu@xiaomi.com>
2022-06-02 20:11:50 -03:00
Xiang Xiao
406e1effed libc: Always compile ___cxa_atexit
since libsupc++ depends on it unconditionally

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-06-02 10:54:23 +03:00
Xiang Xiao
1a3e57fe86 libc: Remove weak_function from __aeabi_atexit
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-06-02 10:54:23 +03:00
wangbowen6
acf21d2a8e arm/tlsr82: support flash protection and voltage calibration.
Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
2022-06-02 15:25:48 +08:00
vxj9800
bfde3c007d Add preprocessor directive __attribute__((packed)) to cromfs_node_s
This directive tells the compiler that cromfs_node_s might be located at a memory
address which is not word aligned. This resolves the hardFault caused by unaligned
memory access on armv6-m architecture which doesn't support it.
2022-06-01 12:09:37 +08:00
Petro Karashchenko
39f174908f tools/gencromfs: add attribute to set minimum 4 bytes aignment for cromfs image data
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-06-01 12:07:35 +08:00
Alin Jerpelea
3366f1fb35 boards: spresense: defconfig: enable ISX019 camera driver
Enable the second camera driver for Spresense board

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2022-05-31 19:52:33 +08:00
Alin Jerpelea
72f399e052 drivers: video: add isx019 camera sensor
The driver is provided by Spresense SDK

ISX019 has the DOL-HDR feature, which combines images with different exposure so that
both bright and dark data of high-contrast subject can be viewed at the same time.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2022-05-31 19:52:33 +08:00
Abdelatif Guettouche
c7823f7914 arch/xtensa/xtensa_sigdeliver.c: Remove old code that was preventing
jumping back to the assembly signal trampoline and getting into its
infinite loop.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-05-31 17:40:54 +08:00
Abdelatif Guettouche
c99776659f xtensa: Delete the assembly signal trampoline.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-05-31 17:40:54 +08:00
Huang Qi
9d9d591b93 arch/risc-v: Unify common source include
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-05-31 07:59:33 +03:00