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1e40e03c7f
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12230 Commits

Author SHA1 Message Date
Ken Pettit
1e40e03c7f Minor RISC-V update 2016-10-21 17:01:40 -06:00
Frank Benkert
cf5fdf1f8f SAM Watchdog: Register the watchdog device at the configured device path CONFIG_WATCHDOG_DEVPATH vs. hard-coded /dev/wdt 2016-10-21 07:09:20 -06:00
Gregory Nutt
48fb97e7b5 More of the same cloned typo 2016-10-19 10:11:45 -06:00
Gregory Nutt
5d56172f82 Merged in w8jcik/nuttx (pull request #152) 
add tim8 to stm32f103v pinmap
 2016-10-19 16:03:34 +00:00
Gregory Nutt
841e1aa77f Fix a cloned typo 2016-10-19 09:14:21 -06:00
Maciej Wójcik
c719a32a40 add tim8 to stm32f103v pinmap 2016-10-19 16:34:07 +02:00
Gregory Nutt
20fc02569f Merged in david_s5/nuttx/upstream_kinetis_to_greg (pull request #151) 
Upstream kinetis to greg
 2016-10-18 22:12:08 +00:00
David Sidrane
c3543cf402 Kinetis:BugFix:i2c driver offset swapped for value in kinetis_i2c_putreg 2016-10-18 12:00:01 -10:00
David Sidrane
b29b2874fe Kinetis Allow CONFIG_ARMV7M_CMNVECTOR, CONFIG_STACK_COLORATION, CONFIG_ARCH_FPU 2016-10-18 12:00:01 -10:00
David Sidrane
bce382da52 Kinetis Support ARMV7 Common Vector and FPU 2016-10-18 12:00:01 -10:00
David Sidrane
4de46c848d Broke out DMA to use the modern Nuttx chip inclusion - still STUBS 2016-10-18 12:00:01 -10:00
David Sidrane
42ac6ecebd Kinetis broke out SPI to kinetis/kinetis_spi.h 2016-10-18 12:00:01 -10:00
David Sidrane
70d5c7753e Kinetis - Added missing headers 2016-10-18 12:00:01 -10:00
Ken Pettit
201a32cf8c Add support for the RISC-V architecture and configs/nr5m100-nexys4 board. I will be making the FPGA code for this available soon (within a week I would say). The board support on this is pretty thin, but it seems like maybe a good idea to get the base RISC-V stuff in since there are people interested in it. 2016-10-16 09:47:07 -06:00
Gregory Nutt
30598c005f Cosmetic changes from review of last PR 2016-10-15 08:56:11 -06:00
David Sidrane
909ea5e8ef F4 Support versampling by 8 2016-10-15 03:56:07 -10:00
Gregory Nutt
5b46ce4889 Cosmetic changes from review of last PR 2016-10-14 17:39:21 -06:00
Gregory Nutt
f2ebb6d2a0 Merged in neilh20/anuttx/pr_K64_uid (pull request #147) 
Add Kinetis freedom-k64f uid
 2016-10-14 23:29:19 +00:00
Gregory Nutt
ad6856c931 Trivial stylistic changes from review of last PR 2016-10-14 11:12:49 -06:00
Sebastien Lorquet
fb1f424e12 Support Complementary PWM outputs on STM32L4 2016-10-14 18:06:11 +02:00
Sebastien Lorquet
f7e0a36f55 Multiple stm32l4 timer fixes: 
- too many parentheses when calculating max chan count (???)
- channel 4 does not have a complementary output
 2016-10-14 12:50:45 +02:00
neilh10
6dca9a4390 Add UID Unique ID 2016-10-13 19:50:35 -07:00
neilh10
64b020f1a8 Add UID Unique ID 2016-10-13 19:42:39 -07:00
Gregory Nutt
0bc19a63bb Merged in david_s5/nuttx-5/david_s5/kinetish-edited-online-with-bitbucket-1476115086140 (pull request #144) 
kinetis.h edited online with Bitbucket
 2016-10-10 10:04:04 -06:00
David Sidrane
0476c43748 kinetis.h edited online with Bitbucket 2016-10-10 15:58:21 +00:00
David Sidrane
4703a23171 kinetis.h edited online with Bitbucket 2016-10-10 15:56:02 +00:00
Jens Gräf
1d3abd17cc dma2d: fix an error in up_dma2dcreatelayer where an invalid pointer was returned when a certain underlying function failed. 2016-10-07 13:42:24 +02:00
Gregory Nutt
d61239e38f stm32_modifycr2 should be available on all platforms is DMA is enabled. 2016-10-06 08:50:52 -06:00
David Sidrane
d4a8585d6f Fixed L4 USB Driver by avoiding SETUPDONE and EPOUT_SETUP 2016-10-04 16:52:12 -10:00
David Sidrane
a416b304a3 Code Cleanup and conform to upstrem debug config 2016-10-04 16:51:47 -10:00
David Sidrane
e54a0cd3d0 Header cleanup 2016-10-04 16:51:32 -10:00
Sebastien Lorquet
9dcecd4b15 Add support for qencoders on various nucleo boards 2016-10-03 16:07:20 +02:00
Gregory Nutt
06c70129ed STM32L4: Remove dependencies on STM32 F3 from Kconfig 2016-10-02 16:05:13 -06:00
Sebastien Lorquet
d5ef349d9a Add support for quadrature encoders on STM32L4 2016-10-02 23:26:16 +02:00
Neil Hancock
ef475eb6a9 STM32 Ethernet: Correct typo in conditional logic 2016-10-01 07:32:41 -06:00
Vytautas Lukenskas
fd1de92016 There are some small problems in LPC43xx RS485 mode configuration. In particular: 1. UART0,2,3 do not have DTR pins (different from UART1), so, Kconfig needs to be adjusted. 2. lpc43_uart.c in RS485 mode only configures DIR pin, but doesn't enable pin output for UART0,2,3. 3. should be option to reverse DIR control pin output polarity. 4. lpc43xx/chip/lpc43_uart.h doesn't have USART3 definitions. NOTE: I didn't modified and didn't tested USART1, as it has different hardware. From Vytautas Lukenskas. 2016-09-30 08:51:49 -06:00
Young
7f32019a76 Add a new ioctl command (set MAXPOS) for tiva QEI 2016-09-26 18:10:06 +08:00
Gregory Nutt
2da3da7fd6 Costmetic changes from review of last commit 2016-09-25 17:24:39 -06:00
Mateusz Szafoni
9742757f26 Remove GPIO_ETH_RMII_TX_CLK. TX_CLK is not present in RMII 2016-09-22 10:05:45 +02:00
Gregory Nutt
d2e03daeb1 Fix some strange spacing apparently introduced by tools/indent.sh 2016-09-21 16:06:05 -06:00
Gregory Nutt
54eee5b303 Review of PR 135 2016-09-21 09:36:39 -06:00
Young
cf99e50b7a Add QEI lower-half driver impl. for Tiva series chip 2016-09-21 17:08:31 +08:00
Gregory Nutt
1c20376e39 SAM GPIO: Apply Wolfgang's change for SAM3/4 to SAMA5 and SAMV7 2016-09-20 15:33:31 -06:00
Wolfgang Reißnegger
3f22b63321 SAM3/4: Fix GPIO pull-up/down code. 
Enabling the pull-down resistor while the pull-up resistor is still enabled
is not possible. In this case, the write of PIO_PPDER for the relevant I/O
line is discarded. Likewise, enabling the pull-up resistor while the
pull-down resistor is still enabled is not possible. In this case, the
write of PIO_PUER for the relevant I/O line is discarded.
 2016-09-20 13:32:04 -07:00
Gregory Nutt
ed22c93d7a Tiva Ethernet: Needs support for CONFIG_NET_MULTIBUFFER=y 2016-09-20 13:02:24 -06:00
Gregory Nutt
4dc3521743 All SAM Ethernet Drivers: Add support so that the drivers can be built with CONFIG_NET_MULTIBUFFER=y 2016-09-20 08:56:36 -06:00
Gregory Nutt
7f1a88e243 Pierre's assertion-avoidance change should also be applied to STM32 F7 and L4 2016-09-15 08:41:49 -06:00
Pierre-noel Bouteville
829de7d5bd Set USB address to avoid a failed assertion 2016-09-15 08:36:45 -06:00
Jim Wylder
5d73f114b5 STM32L4: Add support for USART3-USART5 
For STM32L4 parts, the higher number USART ports supported
varies.  Add the HAVE_USARTx definitions to the configuration
to allow enabling the higher numbered USART ports.

Signed-off-by: Jim Wylder <jwylder@motorola.com>
 2016-09-14 15:20:18 -05:00
Sebastien Lorquet
50dd745e23 restore stm32l4 name 2016-09-07 14:17:38 +02:00