Gregory Nutt
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729ee7c099
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ARMv7-A: Small improvement to some register handling in context restoration.
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2016-12-23 11:13:18 -06:00 |
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Gregory Nutt
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d9ef0e86fb
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Fix a couple of errors in the last commit
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2016-12-23 10:45:13 -06:00 |
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Gregory Nutt
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c00a1870d7
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Implement deferred IRQ locking. Adds support for ARMv7-A.
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2016-12-23 10:17:36 -06:00 |
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Gregory Nutt
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e6fff09ef8
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Implement deferred IRQ locking. So far only form ARMv7-M.
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2016-12-23 07:55:41 -06:00 |
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David Sidrane
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76ceb37553
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Allow dma in 1 bit mode in STM32F4xxx
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2016-12-22 09:19:37 -10:00 |
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Gregory Nutt
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5f9caad078
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Xtensa ESP32: Correct copyright info; update some comments
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2016-12-22 12:34:55 -06:00 |
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Gregory Nutt
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714e6f80ca
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Xtensa ESP32: Corrects a problem with dispatching to signal handlers: Cannot vector directly to the signal handling function as in other ABIs under the Xtensa Window ABI. In that case, we need to go through a tiny hook when performs the correct window call (call4) otherwise registers will be scrambled in the signal handler
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2016-12-22 11:19:38 -06:00 |
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Gregory Nutt
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d9a64b9ca9
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Xtensa ESP32: Some fixes from integration of ostest configuration. Almost works: There are some assertions in xtensa_sigdeliver()
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2016-12-22 09:34:39 -06:00 |
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Gregory Nutt
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2b5235e937
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Xtensa ESP32: Add an OS test to verify the port.
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2016-12-22 08:20:05 -06:00 |
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Gregory Nutt
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fb146abee0
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All CMP platforms: Apply same fix verified on other platforms found on Xtensa.
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2016-12-21 14:04:09 -06:00 |
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Gregory Nutt
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733a57b4df
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Xtensa SMP: Avoid a nasty situation in SMP by assuring that up_release_pending() is not re-entered.
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2016-12-21 13:34:01 -06:00 |
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Gregory Nutt
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c1e2606526
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Olimex STM32 P407: Has only 128KiB of contiguous RAM. Exclude CCM memory for now.
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2016-12-21 12:49:03 -06:00 |
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Gregory Nutt
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81c1466d93
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Olimex STM32 P407: Hmmm.. board does not boot. Simplifying the configuration does not help.
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2016-12-21 11:38:45 -06:00 |
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Gregory Nutt
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7e075bab36
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Merge in support for the Olimex STM32 P407 board
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2016-12-21 10:47:50 -06:00 |
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Gregory Nutt
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f8f2c00415
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Olimex STM32 P407: Update clocking using STM3250G; Verify GPIOs.
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2016-12-21 10:45:36 -06:00 |
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Gregory Nutt
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588d2b506f
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Xtensa ESP32: Oddly, an rsync barrier when writing to co-processor register corrects problem.
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2016-12-21 08:04:48 -06:00 |
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Gregory Nutt
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1b7162a0db
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Eliminate a warning
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2016-12-21 08:04:48 -06:00 |
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Gregory Nutt
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41eda13c9f
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Olimex STM32-P407: Add an stm32_bringup.c file like most newer configurations.
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2016-12-20 18:05:28 -06:00 |
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Gregory Nutt
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764b9f46cc
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Olimex STM32-P407: Initial clone from Olimex STM32-P207
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2016-12-20 17:49:46 -06:00 |
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Geoffrey
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89c33e9799
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Xtensa ESP32: Clock frequency is different if running from IRAM or is booting from FLASH. This is a booltloader issue.
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2016-12-20 16:14:38 -06:00 |
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Gregory Nutt
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59c5ae3eae
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Refresh some configurations
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2016-12-20 15:42:31 -06:00 |
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Gregory Nutt
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57d8a437ef
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Fix procfs status for SMP case.
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2016-12-20 11:51:39 -06:00 |
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Gregory Nutt
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81697f2285
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Xtensa ESP32: Fix APP CPU startup... Can't use semaphores on the IDLE thread.
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2016-12-20 11:26:37 -06:00 |
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Gregory Nutt
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6d5a718b98
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Xtensa ESP32: A few fixes for APP CPU start-up
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2016-12-20 10:38:27 -06:00 |
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Gregory Nutt
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404925d93e
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Update README
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2016-12-20 10:03:48 -06:00 |
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Gregory Nutt
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4e9a0ffea5
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Xtensa ESP32: Update APP CPU startup logic to match current Expressif example code.
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2016-12-20 09:00:04 -06:00 |
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Gregory Nutt
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3b681586c0
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Xtensa ESP32: Missing prologue/epilogue macros on C callable function
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2016-12-20 08:31:36 -06:00 |
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Gregory Nutt
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5666bf30a7
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Review of last PR
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2016-12-20 07:08:46 -06:00 |
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Gregory Nutt
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1ed25c0d73
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Merged in young-mu/nuttx (pull request #187)
Support PWM_PULSECOUNT feature for TI tiva
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2016-12-20 07:00:35 -06:00 |
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Young
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07b70fcc20
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Improve the PWM logs
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2016-12-20 17:05:51 +08:00 |
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Young
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9d355e12d5
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Support indefinite number of pulses generation in PULSECOUNT mode
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2016-12-20 14:08:31 +08:00 |
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Young
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e35406f7d6
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Support PWM_PULSECOUNT feature for TI tiva
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2016-12-20 13:20:04 +08:00 |
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Young
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b737f0e156
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Merged nuttx/nuttx into master
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2016-12-20 11:40:23 +08:00 |
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Gregory Nutt
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e5182acbe3
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Xtensa ESP32: Make sure that SMP configuratin still builds without errors.
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2016-12-19 14:12:19 -06:00 |
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Gregory Nutt
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e61549d8b9
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Xtensa ESP32: Clean-up and fixes from last commits
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2016-12-19 13:57:37 -06:00 |
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Gregory Nutt
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097f09cb02
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Xtensa ESP32: Corrects timer initialization and timer input frequency.
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2016-12-19 11:50:28 -06:00 |
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Gregory Nutt
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a9a39800a4
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Xtensa ESP32: Fixes some double faults and user errors, but I do not fully understand why.
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2016-12-19 11:14:08 -06:00 |
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Gregory Nutt
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886ce88b4f
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Xtensa ESP32: Automatically mount /proc at start-up.
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2016-12-19 09:43:16 -06:00 |
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Gregory Nutt
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b47255a6de
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Update README.
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2016-12-18 17:30:30 -06:00 |
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Gregory Nutt
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2b0b698d72
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ESP32 Serial: Add logic to prevent infinite loops in interrupt handler.
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2016-12-18 16:04:25 -06:00 |
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Gregory Nutt
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71bb79a6c7
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ESP32 Serial: Fix some register bit definitions.
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2016-12-18 15:11:34 -06:00 |
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Gregory Nutt
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4bd530d026
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Xtensa ESP32: Last change should be conditioned on the window ABI.
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2016-12-18 13:17:31 -06:00 |
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Gregory Nutt
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665c1647b5
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Xtensa ESP32: Need to spill registers to memory as the last dying action before switching to a new thread.
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2016-12-18 12:54:47 -06:00 |
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Gregory Nutt
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586f0aab50
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Fix context save logic when called in window ABI configuration. Add an IDLE stack. Don't depend on the mystery stack received from the bootloader.
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2016-12-18 10:08:08 -06:00 |
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Gregory Nutt
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8ce1fdaab0
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Add an attribution to the scanset addition to sscanf()
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2016-12-17 16:18:04 -06:00 |
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Author: Aleksandr Vyhovanec
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7be1b86a81
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Add scansets to the scanf function. Enabled CONFIG_LIBC_SCANSET option.
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2016-12-17 14:39:19 -06:00 |
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Gregory Nutt
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93e6d16f75
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Xtensa ESP32: wsr, not rsr.
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2016-12-17 11:23:10 -06:00 |
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Gregory Nutt
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a88c50d366
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Xtensa ESP32: Need to clone some logic for syncrhonous context switch. Window spill logic in the conmon restores logic is inappropriate in this context
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2016-12-17 11:00:12 -06:00 |
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Gregory Nutt
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6b80e5f15f
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Xtensa ESP32: Fix clobbered a9 in co-processor context save/restore
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2016-12-17 11:00:12 -06:00 |
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Gregory Nutt
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8de1127899
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Xtensa ESP32: Using wrong register to disable interrupts.
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2016-12-17 11:00:12 -06:00 |
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