Commit Graph

115 Commits

Author SHA1 Message Date
Xiang Xiao
b9bd88d9d3 rptun: Select OPENMAP under RPTUN
to simplify the IPC related configuration

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-12-28 11:08:57 +08:00
Eero Nurkkala
1cb879773a risc-v/mpfs/opensbi: update opensbi to version 1.3.1
Version 1.3.1 is the latest tagged version as of November
the 21st, 2023.  This patch prepares the required changes
to make v1.3.1 work.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2023-11-21 04:04:47 -08:00
SPRESENSE
f3fabc5d32 Revert "make/archive: Use the full path name when matching or storing names in the archive"
This reverts commit 563125fde3.
2023-10-27 22:26:18 +08:00
ThomasNS
a2c806027f fix led panic feature 2023-09-21 00:35:12 +08:00
Huang Qi
e144b1208f boards/riscv: Fix module linker target
Fix:
```
riscv-none-elf-ld: sotest.o: ABI is incompatible with that of the selected emulation:
  target emulation `elf64-littleriscv' does not match `elf32-littleriscv'
riscv-none-elf-ld: failed to merge target specific data of file sotest.o
```

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2023-09-20 17:04:56 +08:00
Alan Carvalho de Assis
c27c33e9a9 Run refresh.sh to update all board configs 2023-09-02 14:45:44 +08:00
Eero Nurkkala
f5cdfa73dc risc-v/mpfs: clear L2 before use
SiFive document: "ECC Error Handling Guide" states:

"Any SRAM block or cache memory containing ECC functionality needs to be
initialized prior to use. ECC will correct defective bits based on memory
contents, so if memory is not first initialized to a known state, then ECC
will not operate as expected. It is recommended to use a DMA, if available,
to write the entire SRAM or cache to zeros prior to enabling ECC reporting.
If no DMA is present, use store instructions issued from the processor."

Clean the cache at this early stage so no ECC errors will be flooding later.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2023-09-01 19:28:54 +08:00
cuiziwei
4ec7af779d nuttx/boards:init_array.* needs to be executed in order
When I try to set priorities in certain programs, such as init_priority(HIGH_PRIORITY), I've noticed that during linking, there's no guarantee that the programs will be compiled in the sequence I've specified based on priority. This has led to some runtime errors in my program.

I realized that in the ld file, when initializing dynamic arrays, there's no assurance of initializing init_array.* before init_array. This has resulted in runtime errors in the program. Consequently, I've rearranged the init_array.* in the ld file of NuttX to be placed before init_array and added a SORT operation to init_array.* to ensure accurate initialization based on priorities during linking.
2023-08-29 22:54:37 +08:00
Xiang Xiao
a967da5270 arch/riscv: Move -mcmodel=medany from Make.defs to Toolchain.defs
to avoid the code duplication

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-08-25 21:22:47 +03:00
chao an
563125fde3 make/archive: Use the full path name when matching or storing names in the archive
This pr will avoid targets with the same name can not be archive in the same library

Signed-off-by: chao an <anchao@xiaomi.com>
2023-08-26 01:21:10 +08:00
Jukka Laitinen
6a5d00f68c arch/risc-v/src/mpfs: Add CFG_DDR_SGMII_PHY_RPC156 register setting for DDR training
Decreasing the value may increase DQ/DQS window size. Keep the default value
(1) for the existing board configurations.

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2023-08-17 17:50:37 +08:00
Ville Juven
6bafdd45fd riscv/mpfs: Set hart2 default entrypoint to -1 like the others
No reason to have a different entrypoint
2023-07-26 19:58:05 -03:00
Xiang Xiao
e031a73aef Kconfig: Change some "default y" to "default !DEFAULT_SMALL"
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-07-16 14:39:20 -03:00
Xiang Xiao
0eeca0f375 build: Replace "$(shell $(INCDIR) $(CC) ...)" with $(INCDIR_PREFIX)
to unify the way to get include directories

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-06-23 00:11:25 +03:00
Ville Juven
159a4f83d6 mpfs/icicle: Enable KMM_MAP for knsh
This also removes kconfig warning:

  Normalize icicle/knsh
.config:248:warning: symbol value '' invalid for ARCH_KMAP_VBASE
.config:248:warning: symbol value '' invalid for ARCH_KMAP_VBASE
2023-06-07 21:04:57 +08:00
Ville Juven
0a9279f672 MPFS: Use NuttX SBI for Kernel mode 2023-06-07 01:48:15 +08:00
Ville Juven
223cc6d1f4 mpfs/corespi: Add driver for CoreSPI
Adds a driver for an FPGA fabric / CoreSPI implementation.

Supports multiple instances, assuming they reside in some base address,
offsettable by a constant value.
2023-05-31 15:52:56 -03:00
Eero Nurkkala
a0bde84c9a risc-v/mpfs: integrate fpga i2c driver
This incorporates an fpga i2c driver into the existing i2c driver.
This fpga i2c works almost 100% as the MSS i2c, but the difference
is that the fpga driver terminates all transactions with a stop
sent -interrupt. That needs to be handled.

Fpga clock source is also different, act accordingly.

SEC2TICK(10) is an overkill to any app, use just one second instead.

modifyreg32s are simplified as well, no need to clear and set
as set is enough.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2023-05-29 20:45:01 +08:00
Xiang Xiao
7a8cf7ff70 Indent the include statement by two spaces
follow the coding style

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-05-16 12:34:32 -03:00
Xiang Xiao
2c5f653bfd Remove the tail spaces from all files except Documentation
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-02-26 13:24:24 -08:00
Ville Juven
0bebb94923 icicle/configs: Update some configs
- Remove the annoying color terminal for nsh target
- Add SHMFS for nsh and pnsh
- Increase stack user and kernel sizes for kernel mode
2023-01-30 21:57:25 +08:00
Xiang Xiao
299de87e68 tiva/lm3s6965-ek: Remove CONFIG_DEBUG_ASSERTIONS from qemu-protected
to save the code size

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-01-24 15:00:19 -03:00
Ville Juven
b3360e4da9 mpfs/knsh: Enable SHMFS 2023-01-18 11:01:20 +08:00
Ville Juven
9b0e1659ea risc-v/mpfs: Mark the page table section as NOLOAD
Otherwise the linker will allocate an output section for it, which actually
uses kernel ROM memory for nothing
2022-12-08 21:56:03 +08:00
Ville Juven
d088a48da4 mpfs/knsh: Enable SHM for MPFS kernel mode build 2022-11-18 22:45:26 +08:00
Ville Juven
603992fc5f mpfs/ld-kernel: Increase size of kflash and ksram to 2MB 2022-11-18 22:45:26 +08:00
Xiang Xiao
a446b5816f mm/circbuf: Remove MM_CIRCBUF option from Kconfig
since the linker can remove the unused object file from the final image

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-11-08 10:18:27 -03:00
Masayuki Ishikawa
bbe2fd3b80 boards: Fix the CI build errors for telnetd
Summary:
- This commit fixes the CI build errors regressed by
  https://github.com/apache/incubator-nuttx/pull/7351

Impact:
- None

Testing:
- Build only

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-11-07 16:06:00 +01:00
Xiang Xiao
4e43fef5cd boards: Update telnetd related config after apps/nshlib change
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-11-07 15:24:29 +09:00
Eero Nurkkala
3afc83abc7 risc-v/mpfs: ihc: reorganize ihc
Currently the IHC (Inter Hart Communication) depends on OpenAMP and
rptun.  However, the bootloader portion of the IHC doesn't need
either of them.  Now they are wasting a lot of bootloader space.

Reorganize the bootloader portion into a separate file 'mpfs_ihc_sbi.c'.
This file contains the OpenSBI vendor extensions, or the only required
functionalities for the bootloader.  On the other hand, 'mpfs_ihc.c'
contains the non-bootloader code.

This patch also makes it possible to utilize 2 RPMSG channels.  This
has been tested so that 2 separate NuttXs on harts 1 and 2 communicate
with Linux kernel that runs on harts 3 and 4.

New configuration files are added as well:
  - rpmsg-ch1:  sample config for RPMSG
  - rpmsg-ch2:  sample config for another RPMSG channel
  - rpmsg-sbi:  sample bootloader config for RPMSG/OpenSBI

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-11-02 21:44:52 +08:00
Masayuki Ishikawa
00ce58963f boards: icicle: Fix license information to use the OpenSBI
Summary:
- I noticed that the OpenSBI library depends on the BSD license
- This commit fixes this issue

Impact:
- None

Testing:
- Build only

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-09-27 18:29:09 +02:00
Xiang Xiao
70290b6e38 arch: Change the linker generated symbols from uint32_t to uint8_t *
and remove the duplicated declaration

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-09-24 21:26:56 +02:00
Eero Nurkkala
ec026c14cb risc-v/mpfs: emmcsd: further enhance the clocking
Simplify the clock mode from the board.h -files. Also make the
SD clock definable as well.

Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-09-15 01:55:33 +08:00
Eero Nurkkala
e5305a250a risc-v/mpfs: emmcsd: provide options for selecting clk speed
Some related products, such as Aries m100pfs, don't support eMMC
speeds up to 200MHz. Thus, provide option to select slower clock.
This has only to do with the clocking, no CMD6 is sent to select
high speed modes.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-09-13 11:23:45 +08:00
Ville Juven
23a2e27ffc mpfs/opensbi: Add the ddr memory region back to opensbi ld script
fixes ld-envm-opensbi.script:41: warning: memory region `ddr' not declared
2022-08-18 22:14:21 +08:00
Ville Juven
b8b541fbf5 mpfs: Remove the ddrstorage section from the OpenSBI package
It is not really needed; g_hart_stacks is only used during SBI init as
a temporary stack area. We can use the scratch area buffers for this, as
the scratch areas define almost 4K of extra space, which is used for
exception stacks anyway.
2022-08-10 10:01:47 +03:00
Nathan Hartman
dd718e78f7 Fix typos 2022-08-07 23:33:19 +08:00
Nathan Hartman
20bdd44e7b Remove executable permission from source and build files. 2022-08-04 12:48:18 -03:00
Masayuki Ishikawa
5902b7f6d6 boads: icicle: Fix build errors in cxxtest_main.cxx
Summary:
- This commit fixes build errors in cxxtest_main.cxx

Impact:
- None

Testing:
- build only

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-07-27 23:22:23 +08:00
Xiang Xiao
1d43b4a4eb libc/stdio: Enable LIBC_FLOATINGPOINT by default if ARCH_FPU is enabled
and DEFAULT_SMALL is false

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-07-21 09:53:09 -04:00
Eero Nurkkala
5683e020e8 risc-v/mpfs: update clock configuration parameters
Update PLL configuration parameters to match the values provided
by the vendor.

Also remove extra call to mpfs_pll_config() as it's already called
at mpfs_clockconfig().

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-06-15 21:29:45 +08:00
Ville Juven
16286081e1 risc-v/mpfs: Move the entry point to .start section
Remove the object linkage and use an explicit .start section
2022-06-10 20:18:23 +08:00
Eero Nurkkala
39d389545e risc-v/mpfs: usb: add composite support
This provides USB composite (CDC/ACM and Mass Storage) support
for mpfs board. In addition, a number of USB fixes are included:

 - Support for Setup Out packets
 - Proper support for larger than packet size writes
 - Finishing setup packets properly

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-06-09 20:44:40 +08:00
Ville Juven
5782fc46f5 mpfs/knsh: Add C++ support
Increase the kernel stack size to 2K because it overflows when executing
dtors.
2022-05-27 09:14:49 -03:00
Ville Juven
5800dd2af5 boards/xxx: Remove CONFIG_SCHED_ATEXIT/ONEXIT from all defconfigs 2022-05-25 15:28:43 +08:00
Xiang Xiao
5958d3ac62 risc-v: Move "LDFLAGS += -melf32lriscv" from Make.defs to Toolchain.defs
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-16 11:17:08 +03:00
Xiang Xiao
1f920e55d3 Move warning option from Make.defs to Toolchain.defs
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-15 15:40:35 +03:00
Eero Nurkkala
77e36d1acc risc-v/mpfs: introduce IHC driver
This provides an example of Asymmetric Multiprocessing (AMP). The
master from Linux sends pings that this NuttX echoes back. The system
uses RPMsg from OpenAMP.

The Inter-Hart Communication module is present in the vendor's software
stack with the tag "2021.11". The software is present on github at the
polarfire-soc project. The following conditions must be met:

 1. FPGA programmed with 2021.11 software
 2. HSS (Vendor bootloader) with 2021.11 software
 3. U-boot and Linux kernel from 2011.11 software

Currently the IHC works as a slave only on the hart number 4.

On the NuttX side, this patch uses rptun that incorporates rpmsg and
virtio. If it used only rpmsg and virtio, the future maintenance would
likely be much heavier. Using rptun also simplifies many things.

Upon success, the master side from Linux may issue an example test:

root@icicle-kit-es-amp:/opt/microchip/amp/rpmsg-pingpong# ./rpmsg-pingpong

However, the rpmsg-pingpong.c (compiled on target with gcc), may need to
be modified as seen below to match the device id:
 - char *rpmsg_dev="virtio0.rpmsg-amp-demo-channel.-1.0";
 + char *rpmsg_dev="virtio0.rpmsg-amp-demo-channel.-1.1024";

This work uses a separate linker script. Due to a bug yet unknown to date,
a small NuttX, when loaded by the vendor HSS bootloader, will cause the
Linux kernel to hang at boot. Thus, the binary size is increased with
a section 'filler_area' whose only purpose is to increase the image size
so that the Linux kernel will boot up.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-05-12 22:56:12 +08:00
Xiang Xiao
bbdbca00c1 libc/assert: let CONFIG_NDEBUG default to !CONFIG_DEBUG_ASSERTIONS
so the user could just change CONFIG_DEBUG_ASSERTIONS in most case

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-04 10:07:34 +03:00
Ville Juven
a5d49140ea MPFS: Add dummy rofms image
To allow building with ROMFS enabled
2022-05-02 16:13:15 +08:00