Huang Qi
20c511fcf1
arch/risc-v: Rename up_fpuconfig to riscv_fpuconfig
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Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-03-30 01:33:04 +08:00
ligd
d09be7d658
workqueue: add work_foreach support
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Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-03-29 18:03:08 +08:00
tianxin7
b53bbb15c5
fs:add _POSIX_OPEN_MAX limit to files_extend
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Signed-off-by: 田昕 <tianxin7@xiaomi.com>
2022-03-29 17:51:20 +08:00
zhuyanlin
0460367a70
irq_csection: fix assert warning
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constant 65535 with expression of type 'int16_t' (aka 'short')
is always true
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-03-29 13:44:01 +08:00
ligd
7619d2a6f9
syslog: fix syslog print twice when active assert
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Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-03-29 12:20:37 +08:00
ligd
b6e0614be6
syslog: use & instead of % when calculate offset
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Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-03-29 12:20:37 +08:00
ligd
61cb79d192
syslog_rpmsg: change head & tail NON-wrap
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Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-03-29 12:20:37 +08:00
Petro Karashchenko
f5665db1f2
boards: correct path to RCRAWS files during file copy
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Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-03-29 12:11:09 +08:00
Xiang Xiao
37d7298f34
fs/littlefs: Convert the lfs_file_size error code to POSIX's
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Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2022-03-29 10:11:13 +08:00
Jiuzhu Dong
1146ff2f61
littlefs: unify lfs error code to nuttx
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Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2022-03-29 10:11:13 +08:00
ligd
ed8704d90e
sim/rptun: rsc must set rpmsg_vdev.config_len
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Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-03-29 10:10:33 +08:00
ligd
1796663e08
rpmsg_socket: fix kasan report error
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==1598322==ERROR: AddressSanitizer: heap-use-after-free on address 0xf514f8a8 at pc 0x58ac3898 bp 0xd0b4d488 sp 0xd0b4d478
READ of size 4 at 0xf514f8a8 thread T0
#0 0x58ac3897 in rpmsg_socket_pollnotify rpmsg/rpmsg_sockif.c:211
#1 0x58ac512f in rpmsg_socket_ept_cb rpmsg/rpmsg_sockif.c:312
#2 0x5787881c in rpmsg_virtio_rx_callback open-amp/lib/rpmsg/rpmsg_virtio.c:331
#3 0x57886a67 in virtqueue_notification open-amp/lib/virtio/virtqueue.c:623
#4 0x5786fb89 in rproc_virtio_notified open-amp/lib/remoteproc/remoteproc_virtio.c:340
#5 0x5786bde3 in remoteproc_get_notification open-amp/lib/remoteproc/remoteproc.c:985
#6 0x57755a50 in rptun_worker rptun/rptun.c:303
#7 0x57755e51 in rptun_thread rptun/rptun.c:352
#8 0x57730d4a in nxtask_start task/task_start.c:128
#9 0xdeadbeee (/memfd:pulseaudio (deleted)+0x15dbeee)
Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-03-29 10:09:49 +08:00
ligd
a1eb3f66fa
rexec: fix free error in error handing
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Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-03-29 10:09:04 +08:00
Jiuzhu Dong
66d854371b
fs/files_allocate: assert when fd overflow
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Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2022-03-29 00:19:13 +08:00
ligd
ad9ba8f454
local_socket: default set block mode if accept() a new socket
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reference:
https: //man7.org/linux/man-pages/man2/accept.2.html
1. default set block mode if accept() a new socket
2. local_socket support FIONBIO
Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-03-28 23:26:34 +08:00
ligd
5b027f5260
net: netdev_ioctl handle FIONBIO
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Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-03-28 23:26:34 +08:00
zhuyanlin
d7391bf6bc
xtensa: add xtensa arch oneshot ops
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As xtensa timer is common in all xtensa chips,
Use oneshot ops, implement a common xtensa oneshot timer.
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-03-28 22:55:00 +08:00
ligd
0f02791ae6
armv8-m: add wake_func arm_should_generate_nonsecure_busfault
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Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-03-28 22:52:28 +08:00
ligd
60fc933261
armv8-m: make the securefault handled by non-securefult
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tee is secure cpu and ap is non-secure cpu.
The crash PC can get by IP (R12).
[ EMERG] [tee] arm_hardfault: Hard Fault escalation:
[ EMERG] [tee] arm_securefault: PANIC!!! Secure Fault:
[ EMERG] [tee] arm_securefault: IRQ: 3 regs: 0x2400ff00
[ EMERG] [tee] arm_securefault: BASEPRI: 000000e0 PRIMASK: 00000000 IPSR: 00000003 CONTROL: 0000000c
[ EMERG] [tee] arm_securefault: CFSR: 00000000 HFSR: 40000000 DFSR: 00000000
[ EMERG] [tee] arm_securefault: BFAR: 08006008 AFSR: 00000000 SFAR: 3c049ea0
[ EMERG] [tee] arm_securefault: Secure Fault Reason:
[ EMERG] [tee] arm_securefault: Attribution unit violation
[ EMERG] [tee] arm_securefault_handled_by_ns: Non-sec sp 3c475678
[ EMERG] [ap] arm_busfault: PANIC!!! Bus Fault:
[ EMERG] [ap] arm_busfault: IRQ: 5 regs: 0x3c475608
[ EMERG] [ap] arm_busfault: BASEPRI: 000000e0 PRIMASK: 00000000 IPSR: 00000005 CONTROL: 00000004
[ EMERG] [ap] arm_busfault: CFSR: 00000100 HFSR: 40000000 DFSR: 00000000 BFAR: 08006008 AFSR: 20000000
[ EMERG] [ap] arm_busfault: Bus Fault Reason:
[ EMERG] [ap] arm_busfault: Instruction bus error
[ EMERG] [ap] up_assert: Assertion failed at file:armv8-m/arm_busfault.c line: 105 task: nsh_main
[ EMERG] [ap] backtrace:
[ EMERG] [ap] [ 9] [<0x2c565246>] up_backtrace+0xa/0x168
[ EMERG] [ap] [ 9] [<0x2c550118>] sched_dumpstack+0x1c/0x60
[ EMERG] [ap] [ 9] [<0x2c5645d6>] up_assert+0x4e/0x324
[ EMERG] [ap] [ 9] [<0x2c54a98e>] _assert+0x2/0x10
[ EMERG] [ap] [ 9] [<0x2c5636d4>] arm_busfault+0xc8/0x15c
[ EMERG] [ap] [ 9] [<0x2c523070>] irq_dispatch+0x40/0x11c
[ EMERG] [ap] [ 9] [<0x2c563424>] arm_doirq+0x28/0x3c
[ EMERG] [ap] [ 9] [<0x2c55c892>] exception_common+0x4a/0xac
[ EMERG] [ap] [ 9] [<0x2c58668e>] nsh_parse_command+0x976/0x12b4
[ EMERG] [ap] [ 9] [<0x2c849cee>] write+0x52/0x74
[ EMERG] [ap] [ 9] [<0x2c58c0ac>] nsh_session+0x2c/0x1c8
[ EMERG] [ap] [ 9] [<0x2c58d82c>] nsh_consolemain+0x28/0x54
[ EMERG] [ap] [ 9] [<0x2c590352>] nsh_main+0x2a/0x48
[ EMERG] [ap] [ 9] [<0x2c5500da>] cxx_initialize+0x2a/0x4c
[ EMERG] [ap] [ 9] [<0x2c550090>] nxtask_startup+0x14/0x34
[ EMERG] [ap] [ 9] [<0x2c52966a>] nxtask_start+0x92/0xb8
[ EMERG] [ap] arm_registerdump: R0: 3c049ea0 R1: 00000004 R2: 3c448f98 R3: 00000000
[ EMERG] [ap] arm_registerdump: R4: 3c476a98 R5: 3c049ea0 R6: 00000000 FP: 3c476aac
[ EMERG] [ap] arm_registerdump: R8: 2c5873c9 SB: 3c049ea0 SL: 3c2e98fc R11: 3c284c2c
[ EMERG] [ap] arm_registerdump: IP: 2c58ba4a SP: 3c4756e0 LR: 3c049ea4 PC: 00000000
[ EMERG] [ap] arm_registerdump: xPSR: 610f0000 BASEPRI: 000000e0 CONTROL: 00000004
[ EMERG] [ap] arm_registerdump: EXC_RETURN: ffffffa8
[ EMERG] [ap] arm_dump_stack: IRQ Stack:
[ EMERG] [ap] arm_dump_stack: sp: 3c41c900
Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-03-28 22:52:28 +08:00
Jiuzhu Dong
b03f2e34b8
lseek: use type:off_t for return value
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Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2022-03-28 22:49:37 +08:00
Jiuzhu Dong
a8866132c2
ramlog: support setting threshold value of ramlog for poll waiters
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Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2022-03-28 22:48:56 +08:00
ligd
ed49aa1906
pm: remove unnecessary depends on OSINIT_OS_READY
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Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-03-28 22:48:14 +08:00
Ville Juven
43d5f60a74
MPFS: Fix issue with external interrupt detection
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The bitmask overflow'd. Failing test is at mpfs_irq_dispatch / line 69
2022-03-28 22:40:11 +08:00
Ville Juven
30c25a95f3
MPFS: Fix error in flat build linker script
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Use sram instead of ksram (copy&paste error)
2022-03-28 14:05:51 +03:00
zhuyanlin
c0c0ffdf2f
xtensa: add xtensa_spill_window declaration
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Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-03-28 12:33:07 +02:00
yinshengkai
cdabac7ab1
nuttx/include: fix list.h type error
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Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2022-03-28 12:43:27 +03:00
Huang Qi
ad1098d413
arch/armv7-a: Fix a typo in Toolchain.defs
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Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-03-28 12:42:43 +03:00
Xiang Xiao
7b97b3ad70
input/touchscreen: Fix the typo error
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-03-28 12:33:48 +03:00
Xiang Xiao
3aaa7e8591
arch/sim: Remove "or 480" from Kconfig
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-03-28 09:16:38 +03:00
Xiang Xiao
30e80f2394
arch/sim: Remove the unused SIM_TCNWAITERS from Kconfig
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-03-28 09:16:38 +03:00
lishaoen
aa0c9fd788
nuttx: Add new config ARM_HAVE_MVE for MVE instruction
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Signed-off-by: lishaoen <lishaoen@xiaomi.com>
2022-03-28 08:51:24 +03:00
Huang Qi
83a5e9958f
arch/risc-v: Correct comments for current implementations
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Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-03-28 13:41:57 +08:00
Huang Qi
35f9265483
arch/risc-v: Move fpu [re]store to common place
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Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-03-28 13:41:57 +08:00
Petro Karashchenko
98ba65c422
c89: get rid of designated initializers in common code
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Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-03-28 13:39:27 +08:00
Lee Lup Yuen
c67272f9c8
riscv/bl602: Enable SPI Master in SPI Poll Send
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## Summary
SPI Poll Send `bl602_spi_poll_send()` doesn't send any SPI Data because it doesn't enable SPI Master and it doesn't clear the SPI FIFO. Also it hangs because it loops forever waiting for the FIFO.
We fix this problem by moving the code that enables SPI Master and clears the FIFO, from SPI Poll Exchange `bl602_spi_poll_exchange()` to SPI Poll Send. (Note that SPI Poll Exchange calls SPI Poll Send)
[More Details Here](https://github.com/lupyuen/st7789-nuttx#fix-spi-send )
## Impact
This problem affects all NuttX Drivers that call `SPI_SEND()` on BL602, including the ST7789 Display Driver.
Previously `SPI_SEND()` didn't send any SPI Data and never returns, because it loops forever waiting to receive data.
Now `SPI_SEND()` sends data and returns correctly.
[More Details Here](https://github.com/lupyuen/st7789-nuttx#fix-spi-send )
## Testing
We tested the modified SPI Poll Send with NuttX ST7789 Driver and a Logic Analyser on PineCone BL602:
- [Testing with Logic Analyser](https://github.com/lupyuen/st7789-nuttx#fix-spi-send )
We also tested LVGL with ST7789 on PineCone BL602:
- [Testing with LVGL](https://github.com/lupyuen/st7789-nuttx#run-lvgl-demo )
As for the modified SPI Poll Exchange, we tested with Semtech SX1262 SPI Transceiver on PineCone BL602:
- [Testing SPI Poll Exchange](https://github.com/lupyuen/incubator-nuttx/releases/tag/release-2022-03-25 )
2022-03-28 13:32:27 +08:00
Petro Karashchenko
989e8ac48f
fs/romfs: fix size of pointer during memory allocation
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Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-03-28 10:47:50 +08:00
Xiang Xiao
8c8c60f70a
arch: Add -fsanitize=kernel-address to ARCHCPUFLAGS if CONFIG_MM_KASAN=y
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-03-27 23:01:47 +03:00
ligd
e87d262c7f
arch/Toolchain.defs: add wildcard for EXTRA_LIBS
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VELAPLATFO-1491
Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-03-27 22:53:58 +03:00
Xiang Xiao
a2e079fdd2
arch/arm: Change arm_arch.h to arm_internal.h in arm_perf.c
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-03-27 22:31:43 +03:00
Anthony Merlino
baeb2e9af7
stm32h7: Addresses tickless PR review comments
2022-03-28 00:33:26 +08:00
Anthony Merlino
896435e7c9
Fixes formatting
2022-03-28 00:33:26 +08:00
Anthony Merlino
c3745c8441
Adjust up_timer_getmask to handle 16-bit timers correctly.
2022-03-28 00:33:26 +08:00
Anthony Merlino
30f6dbc613
Throw compile time error if tickless timer is set to TIM6/TIM7
2022-03-28 00:33:26 +08:00
Anthony Merlino
95199f4790
stm32h7 timer: Clean up some bit operations to make them more readable.
2022-03-28 00:33:26 +08:00
Anthony Merlino
e5c8bb9b34
stm32h7: Fix a bunch of tickless issues.
2022-03-28 00:33:26 +08:00
Anthony Merlino
2fad06008a
stm32h7: Adds tickless support.
2022-03-28 00:33:26 +08:00
Petro Karashchenko
c61710c7b8
boards/arm/uid: fix pointer to int compare
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Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-03-28 00:31:27 +08:00
Petro Karashchenko
2ac3e3c793
libs/libc/time: update description of strftime
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Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-03-28 00:30:53 +08:00
zouboan
466063ac9e
sched/sched/sched_timerexpiration: change from sched_time to eventtime
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Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-03-27 18:22:58 +03:00
Xiang Xiao
01cb137277
crypto/random_pool: Remove the unused header file(unistd.h and nuttx/arch.h)
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and include the used header files(nuttx/clock.h and nuttx/semaphore.h)
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-03-27 14:27:11 +03:00