Commit Graph

53110 Commits

Author SHA1 Message Date
YAMAMOTO Takashi
2295fa818d esp32s3: give ESP32S3_APP_FORMAT_LEGACY a prompt
So that users can enable it.
This fixes a regression in "esp32s3: add simple boot support".
2024-04-30 17:26:12 +08:00
Eren Terzioglu
891d67bb5e esp32[c3|h2|c6]: Add support to TWAI/CANBus controller 2024-04-30 10:03:22 +08:00
simbit18
7e30d38558 drivers/sensors/Kconfig: Added if SENSORS_BME680 for common dependency
sensor BME680: Added if SENSORS_BME680
2024-04-30 01:48:53 +08:00
Xu Xingliang
0db7417dc0 esp32/lvgl: fix lvgl v9 configuration error
Signed-off-by: Xu Xingliang <xuxingliang@xiaomi.com>
2024-04-30 01:45:03 +08:00
Rodrigo Sim
6ad202ee4c board/stm32f401rc-rs485: Add support to Mass Storage
Signed-off-by: Rodrigo Sim rcsim10@gmail.com
2024-04-30 00:05:09 +08:00
xuxin19
94d8fba629 cmake:bugfix generate config.h contain ; characters will be handled incorrectly
`;` is treated as a list separator in CMake.
the file(STRING) function will read the wrong .config value
string(REGEX REPLACE) will also incorrectly handle lines containing `;`
so here we can only parse character by character.

Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
2024-04-29 11:14:48 -03:00
Michal Lenc
8f23a2db01 samv7: build sam_qencoder.c only if at least one timer counter is enabled
Option CONFIG_SENSORS_QENCODER might be configured even if SAMv7 qencoder
over timer counter is not used (for example encoder over GPIO is selected
with CONFIG_SAMV7_GPIO_ENC). This can cause compile warnings, also build
of sam_qencoder.c file is unnecessary in that case.

New hidden option CONFIG_SAMV7_QENCODER is added and automatically
selected if at least one timer counter is enabled for qencoder. Build
is triggered on this option.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2024-04-29 19:36:21 +08:00
zhanghongyu
45568229ef tcp: decouple TCP_NODELAY and NET_TCP_KEEPALIVE
TCP_NODELAY is an independent configuration and does not depend on TCP_KEEPALIVE

Signed-off-by: zhanghongyu <zhanghongyu@xiaomi.com>
2024-04-29 17:45:14 +08:00
zhanghongyu
0cd893fb5a icmpv6_neighbor: Simply skip IPv6 conflict detection on L3 Nic
Otherwise, the IP address is always considered to conflict, and the ipv6
address cannot be effectively obtained.
Later we will look at how to perform conflict detection on L3 network cards

Signed-off-by: zhanghongyu <zhanghongyu@xiaomi.com>
2024-04-29 17:44:40 +08:00
zhanghongyu
f739fd010d icmpv6_neighbor: skip neighbor solicitation on L3 Nic
Otherwise, sending will fail because the neighbor table cannot be found

Signed-off-by: zhanghongyu <zhanghongyu@xiaomi.com>
2024-04-29 17:44:40 +08:00
dependabot[bot]
22ffa8ebf1 build(deps): bump github/super-linter from 5 to 6
Bumps [github/super-linter](https://github.com/github/super-linter) from 5 to 6.
- [Release notes](https://github.com/github/super-linter/releases)
- [Changelog](https://github.com/github/super-linter/blob/main/CHANGELOG.md)
- [Commits](https://github.com/github/super-linter/compare/v5...v6)

---
updated-dependencies:
- dependency-name: github/super-linter
  dependency-type: direct:production
  update-type: version-update:semver-major
...

Signed-off-by: dependabot[bot] <support@github.com>
2024-04-29 17:34:32 +08:00
Philippe Leduc
3dc6b4c9bd Add basic support for locales in order to C++ streams to build and work for simple cases (POSIX / C locale).
Fix build with C++ GCC toolchain
2024-04-29 17:34:10 +08:00
Pressl, Štěpán
88fa598ea2 arch/arm/src/samv7/sam_pwm.c: option to enable only the L PWM outputs
PWMx_CHy_LONLY options have been added to Kconfig, too.
If LONLY is selected, it's not possible to use complementary outputs.
If LONLY is not selected, it's possible to use H or complementary
output. If configured correctly with cpol and dcpol attributes,
a H-like behaviour can be achieved. May be useful when you run out
of free MCU pins.

Signed-off-by: Stepan Pressl <pressste@fel.cvut.cz>
2024-04-29 10:09:15 +08:00
Rodrigo Sim
2c0dac8691 board/stm32f401rc-rs485: Add support to RNDIS
Signed-off-by: Rodrigo Sim <rcsim10@gmail.com>
2024-04-29 10:07:56 +08:00
Jorge Guzman
4b3ef4d1fc stm32h7/linum-stm32h753bi: Add support to rndis(etherver over usb)
Signed-off-by: Jorge Guzman <jorge.gzm@gmail.com>
2024-04-29 10:07:20 +08:00
Xu Xingliang
62c2b3e1ec lvgl: update existing config to use lvgl v9
These configs are changed based on below rules.
1. always enable +CONFIG_LV_USE_NUTTX=y
2. If touchpad is used, enable +CONFIG_LV_USE_NUTTX_TOUCHSCREEN=y
3. enable log by +CONFIG_LV_USE_LOG=y
4. If -CONFIG_LV_MEM_CUSTOM=y previously defined, replace it with +CONFIG_LV_USE_CLIB_MALLOC=y +CONFIG_LV_USE_CLIB_SPRINTF=y +CONFIG_LV_USE_CLIB_STRING=y
5. If -CONFIG_LV_PORT_USE_FBDEV=y, default config is for fbdev. If -CONFIG_LV_PORT_USE_LCDDEV=y, +CONFIG_LV_USE_NUTTX_LCD=y
6. Remove all -CONFIG_LV_TICK_CUSTOM=y -CONFIG_LV_TICK_CUSTOM_INCLUDE="port/lv_port_tick.h"
7. If -CONFIG_LV_PORT_LCDDEV_DOUBLE_BUFFER=y, replace it with CONFIG_LV_NUTTX_LCD_DOUBLE_BUFFER=y. For fbdev, double buffer is automatically detected.
8. If -CONFIG_LV_COLOR_16_SWAP=y, need to upgrade the LCD driver to support hardware byte order swap.

Signed-off-by: Xu Xingliang <xuxingliang@xiaomi.com>
2024-04-29 10:06:43 +08:00
Neo Xu
2264638964 sim/lvgl: upgrade to lvgl version v9
Update configuration of sim:lvgl_fb and sim:lvgl_lcd to lvgl v9.
Needs to merge with https://github.com/apache/nuttx-apps/pull/2312

Signed-off-by: Neo Xu <neo.xu1990@gmail.com>
2024-04-29 10:06:43 +08:00
raiden00pl
6621748fe8 sensors/bmi270_uorb.c: move init sequence to register function
otherwise default accel and gyro scale configured during registration is cleared
2024-04-28 21:31:39 +08:00
HeyGoda
6deda9b3d2 boards/stm32f103-minimum: fix i2c driver register 2024-04-28 21:31:28 +08:00
Inochi Amaoto
c148e8f2af arch/risc-v: Fix typo in riscv_set_inital_sp
Set right name for the parameter description of riscv_set_inital_sp.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
2024-04-28 17:24:31 +08:00
raiden00pl
322551b13b sensors/adxl372_uorb: wait for data ready in thread 2024-04-28 13:21:54 +08:00
raiden00pl
a34007b81f sensors/bmi270_uorb.c: fix condition for sensor stop 2024-04-28 13:21:54 +08:00
raiden00pl
1985dcd192 drivers/adxl362_uorb: various fixes
- fix compilation for fetch interface
- for data ready in thread
- add soft reset
2024-04-28 13:21:54 +08:00
raiden00pl
7a789d0775 sensors/bmm150_uorb.c: fix compilation for poll interface 2024-04-28 13:21:54 +08:00
raiden00pl
0f56d1df16 sensors/bh1749nuc_uorb.c: fix compilation when poll interface is disabled 2024-04-28 13:21:54 +08:00
Inochi Amaoto
49b3f52db1 arch/riscv/qemu-rv: replace M-mode init code with SBI in kernel build
The qemu-rv use a small init code for M mode in kernel build.
It is hard-coding and is difficult to change. Due to the fact,
introduce a already mature SBI implement (e.g OpenSBI) to
replace existing code is a better choice.

This patch introduce some change for qemu-rv:
1. use SSTC to provide time interrupt in kernel build
2. remove uncessary M mode trap.

For simplicity, this patch does not add support for booting
nuttx for any core, but force boot core to start core 0 and
let core 0 do the initialization.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
2024-04-27 22:09:22 -03:00
Inochi Amaoto
3cabc92427 arch/risc-v: add risc-v SSTC extension support
SSTC extension allows nuttx to implement S-mode timer directly,
which is useful for starting at S-mode.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
2024-04-27 22:09:22 -03:00
Inochi Amaoto
1d7afb571f arch/risc-v: report correct interrupt stack base
As `up_get_intstackbase` supports per cpu stack base, fix
the report value with the cpu specific one.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
2024-04-27 22:09:22 -03:00
Inochi Amaoto
a33313413d arch/risc-v: introduce dynamic stack allocation.
It is misleading to allocate stack from static array and heap,
make all stack allocated from heap area.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
2024-04-27 22:09:22 -03:00
Inochi Amaoto
1ef3767f85 arch/risc-v: unfiy IPI access
Add ipi process abstract function support.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
2024-04-27 22:09:22 -03:00
raiden00pl
dd611b9c5b arch/nrf91: enable FPU
according to manual:
  The FPU is not affected by any security configuration.
  Thus, it appears as not present in PERIPHID[n].PERM
  register located in the SPU
2024-04-28 08:49:46 +08:00
raiden00pl
07d4316a6f boards/arm/stm32/common/src/stm32_bh1750.c: fix compilation
should include i2c interface, not spi
initialize devpath
2024-04-28 08:46:45 +08:00
Alan Carvalho de Assis
12849b66e6 stm32f777zit6-meadow: Add audio support (CS4344) 2024-04-27 13:12:47 +08:00
Alan Carvalho de Assis
d9148add03 stm32f7/common: Add CS4344 audio codec initialization 2024-04-27 13:12:47 +08:00
Alan Carvalho de Assis
3edda2ab94 stm32f7: Add I2S audio driver 2024-04-27 13:12:47 +08:00
anjiahao
1ea10ddacc mps3:Support NuttX running on qemu cortex-m55
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2024-04-26 18:42:35 -03:00
anjiahao
0040e9a239 drivers/serial:support arm cmsdk drivers
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2024-04-26 18:42:35 -03:00
p-szafonimateusz
f3b7329816 arch/x86_64: enable CUSTOMOPT
enable CUSTOMOPT for x86_64 arch

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-04-26 23:32:58 +08:00
Yanfeng Liu
3822d88669 mm/arch: userspace device mapping support
This patch adds definitions to support user space device mappings
that allows devices like frame buffer to be accessible from user
space in kernel mode.

The are mainly two changes:

- in `mm/`:
  added vm_map_region(), vm_unmap_region() for drivers to do
  device mapping easily.
- in `arch/`:
  extended ARCH_SHM_NPAGES as user-space mapping region size.
  decoupled ARCH_SHM_MAXREGIONS from region size calculations and
  limit its usage only for SysV shm purposes.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-04-26 12:11:35 +08:00
chao an
1f7147129a arch/risc-v: fix break on kernel mode
merge conflicts lead to incorrect ifdef/endif scope

Signed-off-by: chao an <anchao@lixiang.com>
2024-04-26 12:44:57 +09:00
Ville Juven
0d9a3d94eb imx9_clockconfig: Add way to set PLL frequencies
This patch adds a way to configure PLL frequencies. The configuration is
given by board logic.

These values should only be modified by the bootloader, but we don't have
that yet so the flag is never activated.
2024-04-25 19:24:16 -03:00
Ville Juven
e3f4749a3c imx9_clockconfig: Add way to query / calculate PLL frequencies
The frequency LUT idea is not necessary as the PLL output can be calculated
by the CPU. It is better to do this as the clocks are set by the SPL (2nd
stage program loader) which means the NuttX payload would not have access
to such a LUT anyhow.

The mask PLL_DIV_RDIV_MASK is also fixed, as that was simply wrong.

Also add call to imx9_clockconfig (although it does not do anything yet).
2024-04-25 19:24:16 -03:00
zhanghongyu
b934555fd1 mm/iob: Support alloc IOB via malloc
Support the network interface card driver to receive zero copies of packets and send and receive giant frame packets, allowing drivers to initialize the DMA buffer to the iob structure, and we can apply for IOB with large memory

Signed-off-by: zhanghongyu <zhanghongyu@xiaomi.com>
2024-04-26 01:06:21 +08:00
zhanghongyu
00d208baf6 mm/iob: replace CONFIG_IOB_BUFSIZE to IOB_BUFSIZE(iob)
Variable length iob can be supported

Signed-off-by: zhanghongyu <zhanghongyu@xiaomi.com>
2024-04-26 01:06:21 +08:00
chao an
a51ebeab4b arch/risc-v: decouple Per-CPU scratch with ARCH_USE_S_MODE
In some special chipsets, multiple CPUs may be bundled in one hardware
thread cluster, which results in hartid and cpuindex not being exactly
the same. The new option will decouple Scratch-based Per-CPU storage
with S-Mode to distinguish the real cpu index.

Signed-off-by: chao an <anchao@lixiang.com>
2024-04-25 09:48:59 -03:00
chao an
da4c229312 arch/riscv: replace atomic operations to AMO
RISC-V provided fetch-and-op style atomic primitives as they scale
to highly parallel systems better than LR/SC or CAS. A simple
microarchitecture can implement AMOs using the LR/SC primitives,
provided the implementation can guarantee the AMO eventually
completes. More complex implementations might also implement AMOs
at memory controllers, and can optimize away fetching the original
value when the destination is x0.

Signed-off-by: chao an <anchao@lixiang.com>
Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2024-04-25 18:23:58 +09:00
Tiago Medicci Serrano
dab1621442 esp32s3: use common espressif code instead of chip-specific.
Most of the functions used to describe the SoCs capabilities are
available for all Espressif's chips. This commit uses this set of
common functions and remove outdated functions that perform the
same operations in a chip level.
2024-04-25 13:43:15 +08:00
chenwen@espressif.com
9735abab36 xtensa/esp32s3: Fix static_assert compilation error 2024-04-25 13:43:15 +08:00
chenwen@espressif.com
ea5583b112 xtensa/esp32s3: Support ESP32-S3 PM standby and sleep.
1. pm configuration demonstrates the use of power management present on the ESP32-S3.
   2. You can use the pmconfig command to test the power management, for details look at
      ``Documentation/platforms/xtensa/esp32s3/boards/esp32s3-devkit/index.rst``

Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
2024-04-25 13:43:15 +08:00
Tomasz 'CeDeROM' CEDRO
f4e31a6568 Extend default appdir list.
* Extends tools/configure.sh default appdir search paths.
* Search for apps in ../nuttx-apps and ../nuttx-apps.git locations.
* This allows -a parameter skip when nuttx-apps or nuttx-apps.git is used.

Signed-off-by Tomasz 'CeDeROM' CEDRO <tomek@cedro.info>
2024-04-25 13:09:40 +08:00