Gregory Nutt
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f56ed529e5
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Remove prototypes for all user LED interfaces from board.h header files
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2015-11-01 10:53:34 -06:00 |
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Gregory Nutt
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68a97a53ac
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Make some file section headers more consistent with standard
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2015-04-08 09:15:17 -06:00 |
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Gregory Nutt
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084e984efb
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Fix minor typos in C comments
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2014-11-27 07:57:32 -06:00 |
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Gregory Nutt
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16c1405a70
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Convert existing board specific PHY interrupt interfaces to use newly defined standard interface
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2014-08-16 08:35:31 -06:00 |
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Gregory Nutt
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1db7842e2e
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SAMA5 PCK: Add Main clock as an option for the PCK clock source
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2014-08-03 10:17:50 -06:00 |
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Gregory Nutt
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ff0de0d603
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SAMA5D-EK: Correct system timer frequency. Input clock is MCK/2, not MCK
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2014-07-29 07:12:36 -06:00 |
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Gregory Nutt
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f240f7e513
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SAMA5: Add slow clock support
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2014-07-19 13:07:55 -06:00 |
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Gregory Nutt
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5ba0617e9c
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SAMA5D3/4: UPLL divisor to generate 48MHz for OHCI is different from the two families. No idea why.
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2014-07-03 12:28:11 -06:00 |
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Gregory Nutt
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37d6366f08
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SAMA5D4: USART peripheral clock appears to be MCK/2
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2014-06-20 11:40:36 -06:00 |
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Gregory Nutt
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1634a11bd0
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SAMA5D3/4: More renaming. Change SAMA5D3 EMAC to EMACA and SAMA5D4 to EMACB so that the configuration and build system can configure them. I might come up with something better later
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2014-06-10 17:40:25 -06:00 |
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Gregory Nutt
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ae142009da
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SAMA5: Back out most of commit c37b5b7b97d0644743c04f2c3d9e2b7ef9f5d698. Things are going to have to be done differently
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2014-06-09 12:16:16 -06:00 |
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Gregory Nutt
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70207e05e3
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SAMA5: Rename most EMAC definitions to EMAC0 to handle the SAMA5D4 which has to EMAC modules and no GMAC
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2014-06-04 12:04:24 -06:00 |
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Gregory Nutt
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8713ee3428
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SAMA5 board.h files use type xcpt_t and so must include nuttx/irq.h for type xcpt_t
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2014-04-17 10:01:15 -06:00 |
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Gregory Nutt
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cecf3775e2
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SAMA5: The PIO used for the red LED is also used as the camera module reset line: Added a configuration option to suppress use of the red LED if the PIO is used for another purpose. Reported by David Sidrane.
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2014-04-11 15:57:35 -06:00 |
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Gregory Nutt
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22c2ef2abe
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SAMA5 boards: Operation at 528Mhz has been verified
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2014-04-04 10:36:53 -06:00 |
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Gregory Nutt
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52cfdccd7a
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SAMA5 boards: Add set up for 528MHz CPU clock
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2014-04-03 17:12:17 -06:00 |
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Gregory Nutt
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cdcf4f3ad6
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Costmetic fixes to README and some comments
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2014-03-30 11:34:18 -06:00 |
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Gregory Nutt
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c433c684fa
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SAMA5D23 boards: When running out of SDRAM, need to query the PMC to determine operating frequency
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2014-03-29 17:51:06 -06:00 |
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Gregory Nutt
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2a3a6bca97
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configs/sama5d3x-ek: Fix some typos
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2014-03-28 15:18:49 -06:00 |
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Gregory Nutt
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4d2091bdba
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SAMA5D3x-EK: Fix lots of typos in board name
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2014-03-28 09:11:19 -06:00 |
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Gregory Nutt
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8b3934ded8
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SAMA5: Oops. Upper case in include does not match lower case of filename.
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2014-01-30 07:40:10 -06:00 |
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Gregory Nutt
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e5bfdcf36c
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Rename up_buttoninit to board_button_intialize
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2014-01-24 13:50:23 -06:00 |
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Gregory Nutt
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2f8a32a109
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Add board support infrastructure for the pcDuino board. There is not much there on the initial checkin
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2013-12-07 14:25:35 -06:00 |
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Gregory Nutt
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3a26c6cc81
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Further NAND development
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2013-11-16 11:46:35 -06:00 |
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Gregory Nutt
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9cca0778b2
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Add support for ONFI compatible NAND devices (NAND logic still incomplete)
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2013-11-15 14:11:21 -06:00 |
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Gregory Nutt
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90a2679031
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SAMA5 PWM: PWM driver is now functional
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2013-11-07 09:17:46 -06:00 |
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Gregory Nutt
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f9adc35bda
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SAMA5D3x-EK: Add support board-specific PWM testing
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2013-11-06 14:38:19 -06:00 |
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Gregory Nutt
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491ad55b5c
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SAMA5 LCDC: Fixed backlight PWM divider. Backlight no longer flashes
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2013-10-11 17:12:35 -06:00 |
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Gregory Nutt
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6336d79bb3
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SAMA5 LCDC: Wait when the LCDC is resynchronizing (SIF); Try start-up parameters from Barebox (this still don't work)
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2013-10-10 18:44:08 -06:00 |
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Gregory Nutt
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a946a81092
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SAMA5 LCDC: Corrections from first debug sessions. Still a way to go
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2013-10-09 13:21:27 -06:00 |
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Gregory Nutt
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7c32303c6f
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SAMA5: LCDC driver incorporated into the build system.
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2013-10-08 15:30:38 -06:00 |
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Gregory Nutt
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bd91cbc460
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SAMA5: LCDC driver progress
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2013-10-07 12:05:16 -06:00 |
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Gregory Nutt
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b46a8d485f
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SAMA5: ADC and touchscreen drivers now build without errors
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2013-10-03 14:32:21 -06:00 |
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Gregory Nutt
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55b39463ec
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SAMA Touchscreen/ADC: More progress
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2013-10-02 16:55:22 -06:00 |
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Gregory Nutt
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fca0fdb7b2
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SAMA5 ADC/Touchscreen: A little more logic
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2013-10-01 14:40:34 -06:00 |
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Gregory Nutt
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1782cfa61d
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SAMA5D3x-EK: Always use UPLL for USB clocking
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2013-09-21 12:20:11 -06:00 |
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Gregory Nutt
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6b97f797b2
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SAMA5 OHCI: When UPLL drives OHCI the logically correct divider of 10 does not work; But a divider of 5 does. Why?
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2013-09-19 16:10:46 -06:00 |
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Gregory Nutt
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a791ae11ce
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SAMA5 EMAC: Incremental progress. Still not code complete
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2013-09-16 11:36:12 -06:00 |
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Gregory Nutt
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6a01d80bb2
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SAMA5 Ethernet: Add support for PHY interrupts
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2013-09-15 12:24:42 -06:00 |
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Gregory Nutt
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ad6c760522
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SAMA5 UDPHS: Support USPHS clock configuration
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2013-09-01 11:29:51 -06:00 |
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Gregory Nutt
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39052e0ae7
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SAMA5: EHCI now handles low- and full-speed connections by giving them to OHCI; OHCI now uses the work queue to defer interrupt processing; If both OHCI and EHCI are enabled, EHCI is the master of the UHPHS interrupt
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2013-08-24 11:34:24 -06:00 |
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Gregory Nutt
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bc57cd5684
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Beginning of support for SAMA5 EHCI. Not much there yet
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2013-08-20 15:46:36 -06:00 |
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Gregory Nutt
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91a2700f31
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SAMA5: Correct the PLL 48MHz divisor. It was off by a factor of two... no idea why
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2013-08-14 19:38:48 -06:00 |
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Gregory Nutt
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589386a5ce
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SAMA5: ports should not be reset state (seems to make no difference)
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2013-08-14 17:33:31 -06:00 |
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Gregory Nutt
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8686c040ac
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SAMA5: Alternatie clock configuration that yields a perfect 48MHz full speed USB clock and a CPU clock of 384MHz
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2013-08-14 15:16:04 -06:00 |
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Gregory Nutt
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0c1d2ed2b8
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SAMA5: Fix out of range USB PLL divisor
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2013-08-14 14:20:01 -06:00 |
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Gregory Nutt
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6424d0d63a
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Add untested OHCI driver for the SAMA5; structure naming and header files for USB host initialization prototypes
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2013-08-11 17:11:32 -06:00 |
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Gregory Nutt
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b28e8c5dda
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SAMA5: Add PIO interrupt support. Massive name changes for consistency in PIO vs GPIO naming. SAMA5D3x-EK: Add support for SD card detection PIO interrupts
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2013-08-06 10:20:17 -06:00 |
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Gregory Nutt
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b780f672da
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SAMA5: Delay loop calibrated; Correct sense of the RED LED
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2013-07-31 11:44:30 -06:00 |
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Gregory Nutt
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afdd9a7416
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SAMA5: The ostest configuration have been converted to run out of NOR flash. There is more to be done, however
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2013-07-28 15:07:35 -06:00 |
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