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49e4e62aab
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13019 Commits

Author SHA1 Message Date
raiden00pl
49e4e62aab STM32F33: Move DMA logic to a separate files 2017-03-18 16:31:06 +01:00
Gregory Nutt
3f0c4871c8 Merge remote-tracking branch 'origin/master' into xmc4 2017-03-18 06:48:37 -06:00
David Cabecinhas
148e74fd10 Merged in dcabecinhas/nuttx/fix_intstack_allocation (pull request #270) 
ARM: Fix off-by-one interrupt stack allocation (revert missed change in up_initialize.c)

Approved-by: Gregory Nutt <gnutt@nuttx.org>
 2017-03-18 12:25:18 +00:00
Gregory Nutt
c6d5d3bded XMC4xxx: All register definition files need to include memorymap.h 2017-03-17 16:44:26 -06:00
Gregory Nutt
7bde01df98 XMC4C: Clean up some naming, fix some comments, add empty PINMUX header file. 2017-03-17 16:40:29 -06:00
Gregory Nutt
5ae9564b7d XMC4xxx: GPIO write should use OMR, not OUTPUT register. 2017-03-17 16:26:11 -06:00
Gregory Nutt
8bfb735351 XMC4xxx: Finishes implementation of GPIO support. 2017-03-17 13:02:07 -06:00
Gregory Nutt
41758d8e4c XMC4xxx: minor update to GPIO definitions. 2017-03-17 11:22:42 -06:00
Gregory Nutt
d2d54b4ae7 XMC4xxx: Add framework and definitions for GPIO support 2017-03-17 11:18:24 -06:00
Gregory Nutt
042b33414a XMC4xxx: Missing OMR field in PORT register definition header file. 2017-03-17 08:28:40 -06:00
Gregory Nutt
f672478e7e XMC4xxx: Completes the PORT register definition header file. 2017-03-17 08:12:21 -06:00
Gregory Nutt
6b167122c0 XMC4xxx: Move clock utility functions from xmc4_clocconfig.c to new xmc4_clockutils.c 2017-03-16 14:26:22 -06:00
Gregory Nutt
e30e47683b XMC4xxx: Add partial PORTS header file. 2017-03-16 13:24:32 -06:00
Gregory Nutt
e67baffc15 XMC4xxx: Add partial USIC header file. 2017-03-16 13:04:01 -06:00
Gregory Nutt
5693f26a5e XMC4xx: Fix several early compilation problems. 2017-03-16 11:30:02 -06:00
Gregory Nutt
fe610e7a1d XMC4500 Relax: Add basic board support infrastructure of Infineon XMC4500 Relax Lite v1 2017-03-16 10:52:01 -06:00
Gregory Nutt
66d001d0e1 XMC4xxx: Initial clock configuration logic. 2017-03-16 09:48:57 -06:00
no1wudi
812578c066 Merge branch 'master' of https://bitbucket.org/nuttx/nuttx 2017-03-16 23:07:38 +08:00
no1wudi
c613a360a3 Merge branch 'master' of https://bitbucket.org/no1wudi/nuttx 2017-03-16 23:06:54 +08:00
no1wudi
1280c91564 fixed descritpions of NUC100/120 2017-03-16 23:04:52 +08:00
David Cabecinhas
4b65817e99 ARM: Set EABI stack alignment for all ARM architectures (remove OABI code) 2017-03-16 19:58:50 +08:00
David Cabecinhas
08e92abb0b ARM: Remove redundant interrupt stack coloring 2017-03-16 19:13:39 +08:00
Gregory Nutt
059e398185 XMC4xxx: A few more SCU register bit definitions. 2017-03-15 18:50:48 -06:00
Gregory Nutt
450d747265 Merge remote-tracking branch 'origin/master' into xmc4 2017-03-15 13:10:17 -06:00
Gregory Nutt
519f14fbb5 XMC4xxx: A few more SCU register bit definitions. 2017-03-15 11:43:58 -06:00
Gregory Nutt
77f244ed7b XMC4xx: Add logic to get the CPU frequency. 2017-03-15 10:22:24 -06:00
Gregory Nutt
772b3cf21b XMC4xxx: Add Peripheral Memory Map header file. 2017-03-14 19:07:19 -06:00
Gregory Nutt
a635e7df7a XMC4xxx: Add SCU header file. 2017-03-14 16:19:30 -06:00
Gregory Nutt
2430049e3b arch/arm/include/xmc4: More support for Infineon XMC4xxx arch. Still incomplete. 2017-03-14 13:04:09 -06:00
Gregory Nutt
dc4ac48aad arch/arm/src/xmc4: Initial, partial support for Infineon XMC4xxx 2017-03-14 11:56:29 -06:00
Gregory Nutt
240d1e9b3b Update some comments 2017-03-14 11:39:10 -06:00
Gregory Nutt
c97581e99b Update some comments 2017-03-14 11:16:35 -06:00
Gregory Nutt
4a93b0dc0c Update comments. 2017-03-14 08:44:56 -06:00
David
33f7bfa351 ARM: Fix off-by-one interrupt stack allocation (revert missed change in up_initialize.c) 2017-03-14 21:01:44 +08:00
David Cabecinhas
86400a252d ARM: Fix off-by-one interrupt stack allocation in 8-byte aligned architectures 2017-03-14 20:01:45 +08:00
Gregory Nutt
4d33f26717 Update some comments 2017-03-12 12:33:44 -06:00
Gregory Nutt
d9cdb6c383 STM32; OTG host implementations of stm32_in_transfer() must obey the polling interval for the case of isochronous and itnerrupt endpoints. 2017-03-12 08:39:30 -06:00
Gregory Nutt
98a98a0c8b Minor change for consistency with a previous commit. 2017-03-12 07:20:10 -06:00
Gregory Nutt
9b11187b2a STM32 OTG HS: A little research reveals that only the F2 RCC initialization set the OTGHSULPIEN bit and Photon is the only F2 board configuration that uses OTG . Therefore, we can simplify the conditional logic of the last PR. Negative logic was used (#ifndef BOARD_DISABLE_USBOTG_HSULPI) to prevent bad settings in other configurations. But give these facts, the preferred positive logic now makes more sense (#ifdef BOARD_ENABLE_USBOTG_HSULPI). 2017-03-11 18:00:38 -06:00
Gregory Nutt
e0f7b9582a STM32: Review of last STM32 F2 PR. Progate changes to STM32 F4 and F7 OTGHS. Rename some configs/photon/src files. Naming can be either photon_ or stm32_ but must be consistent. 2017-03-11 16:31:11 -06:00
Simon Piriou
11876dc090 Merged in spiriou/nuttx/usb_fix (pull request #265) 
stm32f20xxx: add BOARD_DISABLE_USBOTG_HSULPI flag

Approved-by: Gregory Nutt
 2017-03-11 22:04:51 +00:00
Simon Piriou
70d8f0189d stm32f20xxx: add BOARD_DISABLE_USBOTG_HSULPI flag 2017-03-11 18:15:18 +01:00
David Sidrane
cdfc158f90 up_initialize.c edited online with Bitbucket 2017-03-11 15:40:48 +00:00
David Sidrane
c9ecb3c378 As discovered by dcabecinhas. This fix assume the 8 byte alignment options for size stack size or this will overwrite the first word after TOS 
See https://github.com/PX4/Firmware/issues/6613#issuecomment-285869778
 2017-03-11 15:35:03 +00:00
Gregory Nutt
aadf6c6e16 STM32 F33: Fix another error in ADC base address usage. 2017-03-10 17:49:32 -06:00
Gregory Nutt
852b189910 STM32 F33 ADC: Correct bad definitions of base addresses; Fix naming collision by changing colliding STM32_ADC12_BASE to STM32_ADC12_CMN_BASE 2017-03-10 17:46:19 -06:00
Gregory Nutt
24816cb08b All STM32 host drivers. In IN endpoint retry, delay for a clock tick to give some breathing space for the CPU. EXPERIMENTAL change. 2017-03-10 10:25:43 -06:00
David Sidrane
2baffab16e WS 2017-03-10 15:42:59 +00:00
David Sidrane
acaebb361b STM32, STM32 F7, and STM32 L4: Clone Freddie Chopin's I2C change to similar STM32 I2C drivers. 
Save elapsed time before handling I2C in stm32_i2c_sem_waitstop()
   This patch follows the same logic as in previous fix to
   stm32_i2c_sem_waitdone().
   It is possible that a context switch occurs after I2C registers are read
   but before elapsed time is saved in stm32_i2c_sem_waitstop(). It is then
   possible that the registers were read only once with "elapsed time"
   equal 0. When scheduler resumes this thread it is quite possible that
   now "elapsed time" will be well above timeout threshold. In that case
   the function returns and reports a timeout, even though the registers
   were not read "recently".
   Fix this by inverting the order of operations in the loop - save elapsed
   time before reading registers. This way a context switch anywhere in the
   loop will not cause an erroneous "timeout" error.
 2017-03-10 05:07:39 -10:00
Freddie Chopin
3cd66af889 ave elapsed time before handling I2C in stm32_i2c_sem_waitstop() 
This patch follows the same logic as in previous fix to
stm32_i2c_sem_waitdone().

It is possible that a context switch occurs after I2C registers are read
but before elapsed time is saved in stm32_i2c_sem_waitstop(). It is then
possible that the registers were read only once with "elapsed time"
equal 0. When scheduler resumes this thread it is quite possible that
now "elapsed time" will be well above timeout threshold. In that case
the function returns and reports a timeout, even though the registers
were not read "recently".

Fix this by inverting the order of operations in the loop - save elapsed
time before reading registers. This way a context switch anywhere in the
loop will not cause an erroneous "timeout" error.
 2017-03-10 07:35:10 -06:00