Commit Graph

301 Commits

Author SHA1 Message Date
p-szafonimateusz
53d112fa95 x86_64: add ELF support
add arch_elf64.c for x86_64, ported from sim/x86

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-07-03 17:40:53 +08:00
p-szafonimateusz
bd73a915bd arch/x86_64: add support for FMA, AVX-2 and AVX-512
add support for FMA, AVX-2 and AVX-512 instruction sets for x86_64

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-07-01 13:27:33 +08:00
p-szafonimateusz
2192d83200 arch/x86_64: add support for XSAVE/XRSTOR
Add support for XSAVE/XRSTOR to handle x86_64 procesor extended states.
Support for these instructions is required to support AVX instruction set

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-07-01 13:27:33 +08:00
p-szafonimateusz
66516918ce x86_64/irq.h: use 32bit operations in up_cpu_index()
Use 32bit operations for id field in intel64_cpu_s which is int type.

This fixes an error that appears when enabling some debug options:
  `Error: operand size mismatch for `movq'``

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-06-30 21:40:50 +08:00
xuxingliang
c6d712df0e sched: move nxsched_dumponexit() to task_exithook
So the tcb->group still exists to dump files.

Signed-off-by: xuxingliang <xuxingliang@xiaomi.com>
2024-06-30 17:30:42 +08:00
p-szafonimateusz
8220b169f3 arch/intel64: add SMP support
modified various intel64 files to support SMP

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-06-29 22:37:48 +08:00
p-szafonimateusz
8d4681a190 arch/intel64: add support for AP cores boot
Intel64 can now boot application cores which is needed for SMP

IMPORTANT: CONFIG_BOARD_LOOPSPERMSEC must be properly configured,
otherwise AP boot sequence can fail due too short delays during the AP startup

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-06-29 22:37:48 +08:00
p-szafonimateusz
961ade88fe arch/intel64: add support for inter-processor signaling
Add support for inter-processor signaling in x86_64 based on up_trigger_irq() interface.
Preparations for SMP.

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-06-29 12:57:37 +08:00
p-szafonimateusz
c6170286ca arch/intel64: add cpu specific data and per-cpu interrupt stacks
Use GS base regsiter to store reference to CPU private data.
Then we can easily refer to private CPU data using the GS segment.

Required for SMP support.

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-06-28 09:40:32 -03:00
p-szafonimateusz
97726d9747 arch/x86_64/intel64/intel64_rtc.c: fix compilation
fix missing reference to comm_region->tsc_khz and
fix 'defined but not used' warnings in arch/x86_64/intel64_rtc.c

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-06-28 09:47:46 +02:00
p-szafonimateusz
09146beee9 x86_64: hide --whole-archive behind Kconfig option
Hide --whole-archive behind Kconfig option for x86.
This option is not needed and breaks ELF modules build.

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-06-28 02:31:53 +08:00
p-szafonimateusz
7afee44c22 arch/x86_64: addrenv should add offset only for RAM region
addrenv should add LOAD offset only for RAM region, the rest of memory is maped 1:1

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-06-28 02:31:09 +08:00
p-szafonimateusz
c5d1eaae72 arch/intel64: get TSC frequency only when not provided from Kconfig
on ACRN hypervisor obtaining frequency from CPUID seems to be broken,
so we have to specify this value from Kconfig.

If frequency autodetection is enabled but the returned data are
incorrect - crash early.

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-06-27 11:49:50 -03:00
xuxin19
275ec7102c cmake:bugfix CMake compilation options settings should not use strings
when repeatedly enabling and disabling string-controlled configurations,
the generated toolchain configuration may be incorrect.

Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
2024-05-30 10:02:10 -03:00
Philippe Leduc
3dc6b4c9bd Add basic support for locales in order to C++ streams to build and work for simple cases (POSIX / C locale).
Fix build with C++ GCC toolchain
2024-04-29 17:34:10 +08:00
p-szafonimateusz
9a6fa489d8 x86_64_acpi.c: avoid debug messages in acpi_init()
acpi_init() must be called early during boot, some system components may be
unavailable at this stage, so debug messages won't work

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-04-24 12:55:58 -03:00
p-szafonimateusz
37a6806bb4 x86_64_acpi.c: cosmetic changes
cosmetic changes after review

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2024-04-24 12:04:08 +08:00
p-szafonimateusz
d484e85bb9 x86_64_acpi.c: make sure that RSDP is mapped
rsdp memory may be not mapped when provided from multiboot2 header.
For some reason the previous code worked on some machines.

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-04-23 11:29:21 +02:00
p-szafonimateusz
530f5cd324 arch/intel64: add cache support
Add dcache and icache support for intel64

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-04-22 23:13:44 +02:00
p-szafonimateusz
30226901c0 arch/x86_64: add simple ACPI parser
add simple ACPI parser for intel64.

For now RSDP signature can be found in BIOS legacy region or can be provided by multiboot2

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-04-22 23:47:09 +08:00
p-szafonimateusz
0aac7d929d intel64/arch.h: fix ist_t structure, there is no reserved5 field
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-04-22 23:46:10 +08:00
p-szafonimateusz
8b09118350 intel64/intel64_handlers.c: cosmetic changes
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-04-22 23:46:10 +08:00
p-szafonimateusz
71987be7ef intel64: add header for intel64_lowsetup
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-04-22 23:46:10 +08:00
p-szafonimateusz
f8ec274749 intel64/intel64_irq.c: cosmetic change
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-04-22 23:46:10 +08:00
ligd
3844efb5b8 stack: update up_get_intstackbase API to support cpu id
For crash dump all the CPU intstack

Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-04-09 16:59:00 -03:00
simbit18
9967989b02 Fix Kconfig style
Remove spaces from Kconfig files
Remove TABs
Add comments
2024-04-09 10:49:23 +08:00
xuxin19
2c9d46f176 cmake:enable libxx for CMake build
distinguish whether to add the CXX header file search path
according to the target Language.

Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
2024-03-15 01:28:53 +08:00
p-szafonimateusz
768c5a28a1 arch/x86_64: move common Make.defs to common
cosmetic change to simplify intel64 Make.defs

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-03-12 08:30:37 -03:00
p-szafonimateusz
0fe777abd4 arch/intel64: move timer frequency configuration to common files
this logic can be common for intel64 chips

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-03-09 11:52:29 +08:00
p-szafonimateusz
636b2309e4 arch/intel64: cosmetic changes for TSC
cosmetic changes for TSC:
- remove unused variables
- add g_ prefix to global variables

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-03-09 11:52:29 +08:00
p-szafonimateusz
0a24f60e1b arch/intel64: select the system clock source with choice option
this will make it easier to add other sources as system clock

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-03-09 11:52:29 +08:00
p-szafonimateusz
b1fd3da0f6 intel64/intel64_irq.c: support interrupts up to 255
From now all intel64 interrupts are supported.
Required step towards MSI/MSI-X

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-03-08 20:18:39 -03:00
p-szafonimateusz
2d3c9e00ab intel64/intel64_irq.c: check if IRQ is busy before using
check if interrupt is busy when IRQCHAIN is disabled

this allows user to catch configuration errors and fail early when the
already busy vector is reused

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-03-08 20:18:39 -03:00
p-szafonimateusz
53aef8e93d arch/x86_64: add SSE instruction support
at default x86_64 supports SSE, SSE2, this commit adds support for
SSE3, SSSE3, SSE41, SSE42 and SSE4A

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-03-08 08:51:20 +08:00
p-szafonimateusz
8fe76e1271 x86_64/x86_64_initialzie.c: remove up_calibratedelay
This function is not used anywhere.
For udelay calibration we have the calib_udelay app

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-03-08 08:50:35 +08:00
p-szafonimateusz
83abf9bd27 arch/x86_64: add addrenv support
this commit adds simple addrenv support for x86_64

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-03-08 08:50:35 +08:00
p-szafonimateusz
7d95bec148 qemu-intel64: move PCI initialization back to board logic
this partly revert 4123615621 which works OK for PCI serial and network cards
but breaks QEMU EDU due to usage of sem and usleep in IDLE thread context.
Another solution will be provided later.

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-03-07 15:03:40 -03:00
Yanfeng Liu
a66c7c3ee1 comments/docs: fix typos in comments
This fix some typos in comments.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-03-06 13:31:50 +08:00
trns1997
54e9e582d5 Use C++ standard lib from toolchain
Signed-off-by: trns1997 <trns1997@gmail.com>
2024-03-06 08:42:44 +08:00
p-szafonimateusz
d4b17f963d arch/intel64: add HPET timer support as oneshot timer
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-03-03 02:24:40 +08:00
Marco Casaroli
447cc9698f use apps-or-nuttx-Make.defs for archs
This will allow apps to tweak build configuration of NuttX
2024-03-01 12:59:16 -03:00
p-szafonimateusz
4123615621 x86_64: move PCI bus initialization from qemu-intel64 to common x86_64 and initialize PCI in up_initialize()
many PCI devices must be initialized early during boot process (e.g. PCI serial port)

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-02-27 10:30:54 -03:00
p-szafonimateusz
cdfce8a055 arch/x86_64: add spinlock support
Add spinlock support for x86_64, needed for SMP

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-02-27 10:27:34 -03:00
p-szafonimateusz
b3c4f3afc3 x86_64/common/Toolchain.defs: change optimization to -Os for CONFIG_DEBUG_FULLOPT
change optimization to -Os for CONFIG_DEBUG_FULLOPT to be compatible with other architectures
and add an option to select CONFIG_DEBUG_CUSTOMOPT

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-02-26 18:18:20 -03:00
p-szafonimateusz
3a3341ba0e arch/intel64: enable FPU and implement up_fpucmp to pass ostest
enable FPU and implement up_fpucmp to pass ostest

With aggressive optimization enabled (-O2/-O3), ostest FPU test will fail.
This is because the compiler will generate additional vector
instructions between subsequent up_fpucmp() calls (loop vectorization
somewhere in usleep() call), which will consequently overwrite
the expected FPU context (XMM registers).

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-02-26 18:17:37 -03:00
p-szafonimateusz
5288e063ec newlib: fix support for x86
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-02-26 23:56:47 +08:00
p-szafonimateusz
b14c3e1e2e arch/intel64: add software reset support
This adds a software reset for intel64, enables the use of
the reboot command from NSH
2024-02-26 23:55:14 +08:00
p-szafonimateusz
743bbfcd7e arch/intel64/Kconfig: add chip choice option
this will be useful for auto selecting CPU features
2024-02-26 20:06:35 +08:00
p-szafonimateusz
39c7ae683f arch/x86_64/Kconfig: remove unused QEMU options
boards definition should be in /boards
2024-02-26 20:06:35 +08:00
p-szafonimateusz
5c85b8618c arch/intel64: prase multiboot2 header before revoking the lower memory
__revoke_low_memory() is called in intel64_lowsetup()

fixes b4b96a6435 (PR #11758) in which the multiboot2 header was accessed
after revoking the low memory which caused page fault.

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-02-24 09:21:04 -08:00
p-szafonimateusz
8c4612be50 arch/intel64: add g_ prefix to global data
to follow NuttX coding standard

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-02-23 18:16:10 -08:00
p-szafonimateusz
8a43bf1b50 arch/intel64: clear BSS in __nxstart
BSS nulling can now be optimized by the compiler, so it is necessary
to enable SSE instructions early in __nxstart

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-02-23 18:16:10 -08:00
p-szafonimateusz
b4b96a6435 arch/intel64: convert __nxstart to C function and move appropriate functions there
to follow the approach in other architectures

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-02-23 18:16:10 -08:00
p-szafonimateusz
f76017ca8a arch/intel64: format asm files, remove unused debug macros
use tab at the beginning of lines, remove C++ comments, fix some tabs to spaces

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-02-23 18:16:10 -08:00
p-szafonimateusz
16e47d6c8b arch/intel64: fix stack alignment
The stack pointer must be aligned to 16 bytes, otherwise the system crash on the first unaligned data access with vector instruction.
The problem is only observable with optimization enabled, when vector instructions are generated.

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-02-23 12:04:54 -03:00
p-szafonimateusz
c3d41195c7 arch/intel64/stackframe.c: fix memset size
this is a follow up to the change from 2335b69120 which missed
updating stack frame length for this memset

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-02-23 12:04:54 -03:00
p-szafonimateusz
9b0017659c arch/x86_64: add cmake support
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-02-23 07:45:57 +08:00
Bowen Wang
de61a8e009 intel64/Toolchain.defs: move toolchain releated option to Toolchain.defs
Follow other arch does, move common toolchain option to Toolchain.defs

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-02-18 05:34:53 -08:00
Bowen Wang
415f13372d x86_64_netinitialize: support CONFIG_NETDEV_LATEINIT for x86_64
Now x86_64 can use config CONFIG_NETDEV_LATEINIT

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-02-18 05:34:53 -08:00
raiden00pl
a12fdd8876 cosmetic changes after pci code rebase 2024-01-25 09:09:30 -08:00
raiden00pl
2e758f33ee fix various compilation errors after pci code rebase 2024-01-25 09:09:30 -08:00
Brennan Ashton
0ed4123326 x86_64: Early framebuffer console
This adds support for creating an early frame buffer and primatives for
writing to this frame buffer as a console. This does require the font
infrastructure as well as multiboot2.

Additionally this can now be used with a UEFI bootloader long as it
boots NuttX via Multiboot2.  There does seem to be a PCI interrupt
issue when running in UEFI mode.

I was able to boot my laptop using this and see PCI devices enumerate.

Signed-off-by: Brennan Ashton <bashton@brennanashton.com>

x86_64: Add conditionals around the multiboot framebuffer
2024-01-25 09:09:30 -08:00
Yanfeng Liu
1e9434e2db arch/: remove duplicated task exit logs
Newly added logging in `sched/task_exit.c` obsoletes the existing
ones in `arch/up_exit()`, thus remove the latter to reduce duplications.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-01-17 09:18:17 -08:00
anjiahao
749655d785 tcbinfo:remove total_num form tcbinfo.
total_num is not required
test:

make -f tools/Makefile.host
cp tools/jlink-nuttx /opt/SEGGER/JLink_V786a/libnuttxplugin.so
JLinkGDBServer -if SWD -speed 5000 -device STM32F429ZI -NoGui 1 -rtos libnuttxplugin

can run normally

Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2023-11-21 21:52:24 -08:00
chao an
64cf63475c arch/dumponexit: unify dump on exit to common code
remove arch implement and move to common code

Signed-off-by: chao an <anchao@xiaomi.com>
2023-11-15 08:28:25 -08:00
raiden00pl
5b87fdfb9d Documentation: remove all migrated READMEs 2023-10-29 21:03:54 -03:00
Simon Piriou
c166c98e0c arch: x86_64: Fix idle stack assignment 2023-10-12 10:08:58 +08:00
Xiang Xiao
cb11747f36 arch: add use_data to g_tcbinfo
to avoid compiler/linker remove it from the final image

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-09-29 08:00:18 +03:00
zhangyuan21
8f39ba6ae4 arch: update g_running_tasks when context switch occurred
When supporting high-priority interrupts, updating the
g_running_tasks within a high-priority interrupt may be
cause problems. The g_running_tasks should only be updated
when it is determined that a task context switch has occurred.

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-08-01 09:35:18 -07:00
Xiang Xiao
46b25b3849 arch: Compute the array size by nitems
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-07-26 09:33:38 +02:00
Xiang Xiao
94f273130e arch/x86_64: Add g_tcb_info
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-07-26 09:33:38 +02:00
Xiang Xiao
427f8a1624 arch: Fix the mismath in comment
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-07-16 14:39:20 -03:00
Xiang Xiao
7990f90915 Indent the define statement by two spaces
follow the code style convention

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-05-21 09:52:08 -03:00
Xiang Xiao
7dc0d70092 arch: Save sigdeliver into xcp in the case of signal self delevery
to avoid the infinite recusive dispatch:
*0  myhandler (signo=27, info=0xf3e38b9c, context=0x0) at ltp/testcases/open_posix_testsuite/conformance/interfaces/sigqueue/7-1.c:39
*1  0x58f1c39e in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:167
*2  0x58fa0664 in up_schedule_sigaction (tcb=0xf4e20f40, sigdeliver=0x58f1bab5 <nxsig_deliver>) at sim/sim_schedulesigaction.c:88
*3  0x58f19907 in nxsig_queue_action (stcb=0xf4e20f40, info=0xf4049334) at signal/sig_dispatch.c:115
*4  0x58f1b089 in nxsig_tcbdispatch (stcb=0xf4e20f40, info=0xf4049334) at signal/sig_dispatch.c:435
*5  0x58f31853 in nxsig_unmask_pendingsignal () at signal/sig_unmaskpendingsignal.c:104
*6  0x58f1ca09 in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:199
*7  0x58fa0664 in up_schedule_sigaction (tcb=0xf4e20f40, sigdeliver=0x58f1bab5 <nxsig_deliver>) at sim/sim_schedulesigaction.c:88
*8  0x58f19907 in nxsig_queue_action (stcb=0xf4e20f40, info=0xf4049304) at signal/sig_dispatch.c:115
*9  0x58f1b089 in nxsig_tcbdispatch (stcb=0xf4e20f40, info=0xf4049304) at signal/sig_dispatch.c:435
*10 0x58f31853 in nxsig_unmask_pendingsignal () at signal/sig_unmaskpendingsignal.c:104
*11 0x58f1ca09 in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:199
*12 0x58fa0664 in up_schedule_sigaction (tcb=0xf4e20f40, sigdeliver=0x58f1bab5 <nxsig_deliver>) at sim/sim_schedulesigaction.c:88
*13 0x58f19907 in nxsig_queue_action (stcb=0xf4e20f40, info=0xf40492d4) at signal/sig_dispatch.c:115
*14 0x58f1b089 in nxsig_tcbdispatch (stcb=0xf4e20f40, info=0xf40492d4) at signal/sig_dispatch.c:435
*15 0x58f31853 in nxsig_unmask_pendingsignal () at signal/sig_unmaskpendingsignal.c:104
*16 0x58f1ca09 in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:199
*17 0x58fa0664 in up_schedule_sigaction (tcb=0xf4e20f40, sigdeliver=0x58f1bab5 <nxsig_deliver>) at sim/sim_schedulesigaction.c:88
*18 0x58f19907 in nxsig_queue_action (stcb=0xf4e20f40, info=0xf40492a4) at signal/sig_dispatch.c:115
*19 0x58f1b089 in nxsig_tcbdispatch (stcb=0xf4e20f40, info=0xf40492a4) at signal/sig_dispatch.c:435
*20 0x58f31853 in nxsig_unmask_pendingsignal () at signal/sig_unmaskpendingsignal.c:104
*21 0x58f1ca09 in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:199
*22 0x58fa0664 in up_schedule_sigaction (tcb=0xf4e20f40, sigdeliver=0x58f1bab5 <nxsig_deliver>) at sim/sim_schedulesigaction.c:88
*23 0x58f19907 in nxsig_queue_action (stcb=0xf4e20f40, info=0xf4049274) at signal/sig_dispatch.c:115
*24 0x58f1b089 in nxsig_tcbdispatch (stcb=0xf4e20f40, info=0xf4049274) at signal/sig_dispatch.c:435
*25 0x58f31853 in nxsig_unmask_pendingsignal () at signal/sig_unmaskpendingsignal.c:104
*26 0x58f1ca09 in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:199
*27 0x58fa0664 in up_schedule_sigaction (tcb=0xf4e20f40, sigdeliver=0x58f1bab5 <nxsig_deliver>) at sim/sim_schedulesigaction.c:88
*28 0x58f19907 in nxsig_queue_action (stcb=0xf4e20f40, info=0xf4049244) at signal/sig_dispatch.c:115
*29 0x58f1b089 in nxsig_tcbdispatch (stcb=0xf4e20f40, info=0xf4049244) at signal/sig_dispatch.c:435
*30 0x58f31853 in nxsig_unmask_pendingsignal () at signal/sig_unmaskpendingsignal.c:104
*31 0x58f1ca09 in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:199

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-05-17 11:53:18 -06:00
Xiang Xiao
7a8cf7ff70 Indent the include statement by two spaces
follow the coding style

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-05-16 12:34:32 -03:00
zhangyuan21
841b178782 assert: show stacks with the sp from regs
1. Get the value of sp from dump regs when an exception occurs,
   to avoid getting the value of fp from up_getsp and causing
   incomplete stack printing.
2. Determine which stack the value belongs to based on the value
   of SP to avoid false reports of stack overflow

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-05-05 13:40:04 +08:00
simbit18
79574c18d8 arch: Fix nxstyle errors
error: Long line found
2023-05-02 18:31:40 -06:00
Xiang Xiao
bc3e6c84e1 arch: Rename up_[early]serialinit to [arm64|riscv|x86_64][early]serialinit
The naming standard at:
https://cwiki.apache.org/confluence/display/NUTTX/Naming+of+Architecture%2C+MCU%2C+and+Board+Interfaces
requires that all MCU-private function begin with the name of the architecture, not up_.

follow the change from: https://github.com/apache/nuttx/pull/930

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-03-27 12:35:04 +03:00
Xiang Xiao
8b4ecac6c2 libc: Move math library from libs/libc/math to libs/libm/libm
to prepare the support of other implementation e.g.:
https://github.com/JuliaMath/openlibm
https://gitlab.com/gtd-gmbh/libmcs

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-02-23 10:40:07 +02:00
Fotis Panagiotopoulos
85ceb7920e Typo fixes. 2023-02-17 11:17:11 -03:00
Ville Juven
9ac3e841da group_addrenv: Fix call to group_addrenv for targets that don't need it 2023-02-09 00:14:52 +08:00
Xiang Xiao
ac3a667860 Fix chip/intel64_handlers.c:136: error: "SIGFPE" redefined [-Werror]
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-01-27 13:21:49 -03:00
Xiang Xiao
779a610ca3 Remove the unnecessary NULL fields in global instance definition of file_operations
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-01-04 00:32:13 +02:00
zhangyuan21
45394eb6dc arch: save user context in assert common code
This is the work continue with #7875

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2022-12-24 13:02:56 +08:00
zhangyuan21
453a1a7332 arch: move stack and task dump to common code
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2022-12-17 01:59:35 +08:00
zhangyuan21
632d87ee71 arch: remove up_release_pending function
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2022-12-16 21:29:57 +08:00
田昕
0382b63f5d move common assert logic together.
Signed-off-by: 田昕 <tianxin7@xiaomi.com>
2022-12-12 17:05:02 +08:00
Xiang Xiao
6d30726a1b Remove the unnecessary "return;" at the end of function
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-11-27 22:23:50 +01:00
zhangyuan21
d8051ba979 nuttx/sched: merge up_block_task and up_unblock_task 2022-11-22 22:59:08 +08:00
zhangyuan21
a8fa51e6bf arch: rename arch special function name 2022-11-22 16:27:56 +08:00
zhangyuan21
5c1b518314 nuttx/sched: move reprioritize process to public function 2022-11-22 15:29:00 +09:00
zhangyuan21
08f7152d9f nuttx/sched: remove nxsched_remove_readytorun from up_block_task
It takes about 10 cycles to obtain the task list according to the task
status. In most cases, we know the task status, so we can directly
add the task from the specified task list to reduce time consuming.
2022-11-22 15:29:00 +09:00
zhangyuan21
e54b602208 nuttx/sched: remove nxsched_remove_blocked from up_unblock_task
It takes about 10 cycles to obtain the task list according to the task
status. In most cases, we know the task status, so we can directly
delete the task from the specified task list to reduce time consuming.
2022-11-22 15:29:00 +09:00
anjiahao
d07792a343 Initialize global mutext/sem by NXMUTEX_INITIALIZER and SEM_INITIALIZER
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-11-14 09:34:04 +09:00
yinshengkai
85f727f232 tools: replace INCDIR to Makefile variable
In the past, header file paths were generated by the incdir command
Now they are generated by concatenating environment variables

In this way, when executing makefile, no shell command will be executed,
it will improve the speed of executing makfile
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2022-11-03 19:59:55 +08:00
Xiang Xiao
942513cd37 time: Typedef time_t to int64_t if CONFIG_SYSTEM_TIME64 is defined
to handle 2038 problem correctly

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-10-20 22:17:52 +02:00
anjiahao
d1d46335df Replace nxsem API when used as a lock with nxmutex API
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-10-17 15:59:46 +09:00
Xiang Xiao
70290b6e38 arch: Change the linker generated symbols from uint32_t to uint8_t *
and remove the duplicated declaration

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-09-24 21:26:56 +02:00
Xiang Xiao
3c1c29f2c4 arch: move non arm g_current_regs defintion to common place
to avoid the code duplicaiton

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-09-21 22:23:11 +02:00
wangbowen6
b15d38246c up_nputs: fix AddressSanitizer: global-buffer-overflow problem
==2117790==ERROR: AddressSanitizer: global-buffer-overflow on address 0x64d9e3c0 at pc 0x59ac4e16 bp 0xcefe8058 sp 0xcefe8048
READ of size 1 at 0x64d9e3c0 thread T0
    #0 0x59ac4e15 in up_nputs sim/up_nputs.c:54
    #1 0x59a67e4c in syslog_default_write syslog/syslog_channel.c:220
    #2 0x59a67823 in syslog_default_write syslog/syslog_write.c:101
    #3 0x59a67f10 in syslog_write syslog/syslog_write.c:153
    #4 0x59a651c3 in syslogstream_flush syslog/syslog_stream.c:60
    #5 0x59a6564e in syslogstream_addchar syslog/syslog_stream.c:104
    #6 0x59a6576f in syslogstream_putc syslog/syslog_stream.c:140
    #7 0x5989fc4d in vsprintf_internal stdio/lib_libvsprintf.c:952
    #8 0x598a1298 in lib_vsprintf stdio/lib_libvsprintf.c:1379
    #9 0x59a64ea4 in nx_vsyslog syslog/vsyslog.c:223
    #10 0x598a601a in vsyslog syslog/lib_syslog.c:68
    #11 0x59b0e3dc in AIOTJS::logPrintf(int, char const*, ...) src/ajs_log.cpp:45
    #12 0x59b03d56 in jse_dump_obj src/jse/quickjs/jse_quickjs.cpp:569
    #13 0x59b03ea1 in jse_dump_error1(JSContext*, unsigned long long) src/jse/quickjs/jse_quickjs.cpp:602
    #14 0x59b03dd9 in jse_dump_error(JSContext*) src/jse/quickjs/jse_quickjs.cpp:591
    #15 0x59bed615 in ferry::DomComponent::callHook(char const*) src/framework/dom/component.cpp:65
    #16 0x59bfe0ff in ferry::DomComponent::initialize() src/framework/dom/component.cpp:645
    #17 0x59bb141d in dom_create_component(JSContext*, unsigned long long, unsigned long long, unsigned long long) (/home/wangbowen/project/central/vela_miot_bes_m0/bin/audio+0x365c41d)
    #18 0x59b4c0d3 in AIOTJS::__createComponent(JSContext*, unsigned long long, int, unsigned long long*) (/home/wangbowen/project/central/vela_miot_bes_m0/bin/audio+0x35f70d3)
    #19 0x5a56ec17 in js_call_c_function quickjs/quickjs.c:16108

Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
2022-09-01 11:51:48 +08:00