Commit Graph

15826 Commits

Author SHA1 Message Date
Neale Ferguson
5033966d8c Add flags for building shared objects for architectures supporting dynamic loading
* arch/arm/src/common/Toolchain.defs
  arch/risc-v/src/common/Toolchain.defs
  boards/sim/sim/sim/scripts/Make.defs
  - Add SHCCFLAGS and SSHLDFLAGS
2024-06-12 23:21:16 -03:00
jfbblue0922
73949ac223 add stm32h755II chip 2024-06-12 16:22:52 +08:00
adriendesp
6f49637e23 Added xmc4_vadc.c to Make.defs 2024-06-11 20:19:49 +08:00
Matheus Catarino
c6eea4ad8b add LDC2 (dlang) support
*Note:* ldmd2 is ldc2-wrapper, allow using dmd frontend flags.
      This support may be extended to gdc (gnu) if nuttx developers demand it
  or are interested in it.
2024-06-06 09:32:56 +08:00
Takuya Miyashita
072890c1bf arch/arm/src/armv7-m/arm_vectors.c : Add the address alignment.
Add the address alignment to keep the constraint of ARMv7-M architecture same as RAM vector.

ARMv7-M architecture describes the vector table address alignment as following.
The Vector table must be naturally aligned to a power of two
whose alignment value is greater than or equal to (Number of Exceptions supported x 4),
with a minimum alignment of 128 bytes.

I wonder why the implementation of arm_vectors.c does not follow
this constraint of address alignment about ARMv7-M architecture.
Although RAM vector is taken care about it.

I think, as the result it was done by linker script on each board.
At our system, NuttX will be started by bootloader.
To fix the address of entry point(__start) I set the address of entry point to beginning of binary,
so the beginning of binary is not a vector table.
At this case, keeping the address alignment constraint of arm_vectors.c is needed.
2024-06-05 21:47:57 +08:00
Takuya Miyashita
146975d069 arch: cxd32xx: Add cxd32xx SoC support
Supported drivers
 - Serial(PL011), Timer, NVIC
2024-06-04 22:21:56 +08:00
adriendesp
6f50847278 arch/xmc4 Add partial vadc support : Background request source 2024-06-04 09:42:54 -03:00
xuxin19
275ec7102c cmake:bugfix CMake compilation options settings should not use strings
when repeatedly enabling and disabling string-controlled configurations,
the generated toolchain configuration may be incorrect.

Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
2024-05-30 10:02:10 -03:00
simbit18
fde641fac9 Fix Kconfig style
correct block name board
Remove extra TABs
Add comments
2024-05-29 17:15:57 -03:00
hujun5
c06c10f6f3 armv6/7/8-m: use ISB instruction immediately after the MSR instruction
when changing the stack pointer, software must use an
ISB instruction immediately after the MSR instruction.
This ensures that instructions after the ISB instruction
execute using the new stack pointer.

https://developer.arm.com/documentation/101928/0101/The-Cortex-M85-Processor--Reference-Material/Programmer-s-model/Core-registers/CONTROL-register?lang=en

" When changing the stack pointer, software must use an ISB instruction immediately after the MSR instruction. This ensures that instructions after the ISB instruction execute using the new stack pointer."

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-05-29 14:16:55 -03:00
Michal Lenc
649ccb2d45 samv7: add support for user signature area in embedded flash
Embedded flash can have user signature area on SAMv7. This is a 512
bytes large page whose data are not erased by asserting ERASE pin or by
software ERASE command.

This commit adds arch to board interface for this area. It is possible
to perform read, write and erase operation. SAMV7_USER_SIGNATURE option
has to be set in the configuration.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2024-05-28 16:28:33 -03:00
David Sidrane
e0396327a2 armv7-r:MPU fix CONFIG naming to include ARM 2024-05-25 12:06:52 +08:00
David Sidrane
602e69a810 armv8-m:MPU fix CONFIG naming to include ARM 2024-05-25 12:06:52 +08:00
David Sidrane
53307ea9b2 armv7-m:MPU fix CONFIG naming to include ARM 2024-05-25 12:06:52 +08:00
Petro Karashchenko
d144a2a80b arch/arm/samv7: enforce compilation error for incompatible configuration options
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2024-05-23 15:16:00 +08:00
Petro Karashchenko
357f8093ac arch/arm/samv7: fix U(S)ART clock enable for 1-wire
By default U(S)ART clocks are enabled in sam_lowput.c but
configuration check from sam_config.h may override USART configuration
and prevent clocks from been enabled.

This commit fix inconsistency in U(S)ART pinmux and clock configuration

Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2024-05-23 15:15:46 +08:00
Petro Karashchenko
59a23768c5 arch/arm/samv7: remove duplicated prototypes
sam_lowputc.h is almost identical to sam_start.h so remove
one of the headers

Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2024-05-23 15:15:21 +08:00
yinshengkai
20ebe0e64c Replace all asserts in kernel code with ASSERT
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2024-05-17 10:18:16 -03:00
jfbblue0922
72c1f779d1 add stm32h755II chip 2024-05-17 10:16:39 -03:00
Peter van der Perk
015e7cd607 imxrt: 1170 MPU config ensure no lockups can occur 2024-05-17 19:09:09 +08:00
Rdk-T
63294c5da2 add Port selection on xmc4800
Base ecat option on chip instead of board (allow custom boards to use the ecat)

add GPIO_ECAT alternative configs
2024-05-15 11:57:57 -03:00
simbit18
d1789d84e8 fix nxstyle
fix Relative file path does not match actual file.
2024-05-13 22:24:36 +02:00
Peter van der Perk
a8f81e4051 imxrt: lpuart singlewire transfer support 2024-05-10 20:00:24 +08:00
hujun5
ace5dde1a9 arm/imx6: we use spin_lock_irqsave replace enter_critical_section to protect gpio init
,because enter_critical_section may be called before os initialized

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-05-09 13:45:02 +08:00
hujun5
5cee996588 up_putc: int up_putc, enter_critical_section may be called
before kernel has been iniitialized,we use spin_lock_irqsave to replace.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-05-09 13:45:02 +08:00
Pressl, Štěpán
297b3b0209 arch/arm/src/samv7/sam_pwm.c: option to make channels synchronous
Make channels synchronous (i.e. share the same timebase) with the help
of SAMV7_PWMx_CHy_SYNC defines. All the channels share the same
timebase of channel 0, so this channel must be defined too.

Signed-off-by: Stepan Pressl <pressste@fel.cvut.cz>
2024-05-08 23:45:40 +08:00
hujun5
32d3dc4a9f arch: armv7-a: Disable IRQ to make the A core
policy consistent with the M core for TEE

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-05-06 15:05:07 -03:00
simbit18
0e67a79b94 fix nxstyle
corrected comments in C89 style
2024-05-03 14:15:56 -03:00
David Sidrane
4482d7b882 imxrt:Add DMA preflight Support
With CONFIG_MMCSD_MULTIBLOCK_LIMIT not set. (No limit)
   The DMA driver would overwrite the internal buffer.

   By adding CONFIG_ARCH_HAVE_SDIO_PREFLIGHT and
   CONFIG_FAT_DMAMEMORY we can insure alignment and
   maximize performance using no CONFIG_MMCSD_MULTIBLOCK_LIMIT
2024-04-30 15:48:20 -03:00
Andre Heinemans
4f1ac5160c arch/mx8mp: add rptun/rpmsg client support
New target mx8mp:rpsmsg has been added which enables
a virtual tty and can be accessed from the A53 core
running linux-imx
2024-04-30 11:30:02 -03:00
Michal Lenc
8f23a2db01 samv7: build sam_qencoder.c only if at least one timer counter is enabled
Option CONFIG_SENSORS_QENCODER might be configured even if SAMv7 qencoder
over timer counter is not used (for example encoder over GPIO is selected
with CONFIG_SAMV7_GPIO_ENC). This can cause compile warnings, also build
of sam_qencoder.c file is unnecessary in that case.

New hidden option CONFIG_SAMV7_QENCODER is added and automatically
selected if at least one timer counter is enabled for qencoder. Build
is triggered on this option.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2024-04-29 19:36:21 +08:00
Philippe Leduc
3dc6b4c9bd Add basic support for locales in order to C++ streams to build and work for simple cases (POSIX / C locale).
Fix build with C++ GCC toolchain
2024-04-29 17:34:10 +08:00
Pressl, Štěpán
88fa598ea2 arch/arm/src/samv7/sam_pwm.c: option to enable only the L PWM outputs
PWMx_CHy_LONLY options have been added to Kconfig, too.
If LONLY is selected, it's not possible to use complementary outputs.
If LONLY is not selected, it's possible to use H or complementary
output. If configured correctly with cpol and dcpol attributes,
a H-like behaviour can be achieved. May be useful when you run out
of free MCU pins.

Signed-off-by: Stepan Pressl <pressste@fel.cvut.cz>
2024-04-29 10:09:15 +08:00
raiden00pl
dd611b9c5b arch/nrf91: enable FPU
according to manual:
  The FPU is not affected by any security configuration.
  Thus, it appears as not present in PERIPHID[n].PERM
  register located in the SPU
2024-04-28 08:49:46 +08:00
Alan Carvalho de Assis
3edda2ab94 stm32f7: Add I2S audio driver 2024-04-27 13:12:47 +08:00
anjiahao
1ea10ddacc mps3:Support NuttX running on qemu cortex-m55
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2024-04-26 18:42:35 -03:00
Fotis Panagiotopoulos
b2659424d5 lpc17_40 i2c: Fix I2C driver state desynchronization. 2024-04-25 01:24:40 +08:00
Yanfeng Liu
5c3fc2796b tools/export: fix names for app linker script and program entry.
This fixes names of program entry and linker script files so that to
support building kernel mode apps using CMake and export package.

flat and protected mode should be the same as before.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-04-24 11:40:16 +08:00
chao an
e863e3dd37 arch/risc-v: add LLVM clang support
Verified on LLVM-Metal:
$ riscv64-unknown-elf-clang --version
(LLVM-Metal 15.9.0-2023.03.0) clang version 15.9.0
Target: riscv64-unknown-unknown-elf
Thread model: posix

Signed-off-by: chao an <anchao@lixiang.com>
2024-04-19 12:27:56 +08:00
Pressl, Štěpán
1a2e752ea7 arch/arm/src/samv7/sam_qencoder.c: add support for GETINDEX ioctl call
The SAMV7's qencoder driver now supports the GETINDEX ioctl call
which does not reset the internal Timer/Counter and returns
the current position, position of the last index and the number
of captured indexes to a struct qe_index_s pointer. Because the
SAMV7's timers are 16bit, the extension to 32 bits must be done.

Select CONFIG_SAMV7_QENCODER_ENABLE_GETINDEX in the Kconfig to
enable this functionality.

This driver does not obey the instructions given in the ATSAMV7
2023 datasheet because the recommended trigger resets the internal
counter which is not desired. Instead, a capture into capture A
and capture B registers is used. This way if an event happens
(the rising edge of the index signal), the current counter's value
is captured.

Signed-off-by: Stepan Pressl <pressste@fel.cvut.cz>
2024-04-17 19:44:34 +08:00
simbit18
b0504f1e5e fix nxstyle
fix Relative file path does not match actual file.
2024-04-15 15:33:17 -03:00
Jorge Guzman
5e3cbd1165 stm32h7/linum-stm32h753bi: Add support to littlefs and nxffs with flash mem. via quadspi
Signed-off-by: Jorge Guzman <jorge.gzm@gmail.com>
2024-04-15 13:24:55 +08:00
hujun5
f41f0324a5 qemu/trustzone: add secure memory config
According to the qemu source code, hw/arm/virt.c.
The secure memory of the ARM Virt board is [0xe000000~0xf000000]
and the non-secure memory is configured as [0x40000000~0xffffffff].
We made the following adjustments based on the above virt board configuration

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-04-14 12:07:59 -03:00
TimJTi
df7650af71 Improvements relating to SAMA5 TSD driver 2024-04-14 14:47:53 +08:00
Xiang Xiao
4ea2aeff6b arch: Remove xxx_intstack_top and xxx_intstack_alloc
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2024-04-09 16:59:00 -03:00
ligd
4e725ecd44 arch: color the intstack for all the CPUs
Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-04-09 16:59:00 -03:00
ligd
3844efb5b8 stack: update up_get_intstackbase API to support cpu id
For crash dump all the CPU intstack

Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-04-09 16:59:00 -03:00
simbit18
9967989b02 Fix Kconfig style
Remove spaces from Kconfig files
Remove TABs
Add comments
2024-04-09 10:49:23 +08:00
Alan Carvalho de Assis
67dbdb18e3 stm32f76xx77xx_rcc: Fix PLLI2S factor divisors
Value was set with PLLSAI factor divisors instead of
PLLI2S factor divisors.

Signed-off-by: Alan C Assis <acassis@gmail.com>
2024-04-09 10:45:13 +08:00
Jorge Guzman
f7a98db234 stm32h7/fdcan: fixed kconfig and debug register
Signed-off-by: Jorge Guzman <jorge.gzm@gmail.com>
2024-04-07 14:56:58 -03:00