Commit Graph

11 Commits

Author SHA1 Message Date
raiden00pl
f4caf4b3ec Merged in raiden00/nuttx_pe (pull request #877)
Improvements for STM32 PWM

arch/arm/src/stm32/stm32_pwm: add support for all PWM modes

arch/arm/src/stm32/stm32_pwm: add interface to change PWM mode

arch/arm/src/stm32/stm32_pwm: refactor pwm_mode_configure()

arch/arm/src/stm32/stm32_pwm: STM32_PWM_CHANx corresponds to the timer channel and STM32_PWM_OUTx corresponds to the timer channel output

arch/arm/src/stm32/stm32_pwm: add CHAN5 and CHAN6 to PWM_TIMx_NCHANNELS

arch/arm/src/stm32/stm32_pwm: calculate the PWM_TIMx_NCHANNELS if CONFIG_STM32_PWM_MULTICHAN is selected

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-05-28 15:07:43 +00:00
Mateusz Szafoni
4c601faf6f Brings in initial WIP support for the STML0. This initial commit is in pretty bad shape and, hence it it marked EXPERIMENTAL."
Squashed commit of the following:

    arch/arm/src/stm32f0l0:  Various changes for a clean compilation.  Still does not compile correctly due to missing FLASH latency definitions.

    arch/arm/src/stm32f0l0/hardware:  Add framework for the STM32 L0.  Currently set to same as the STM32F0.

    arch/arm/src/stm32f0l0/hardware:  Very fragmentary FLASH header register definitions for the STM32 L0.

    arch/arm/src/stm32f0l0:  Bring in DMA v1.  Cannot possibly be functionaly yet due to the limited number for M0 interrupts.

    arch/arm/src/stm32f0l0:  Add STM32 F0/L0 LSE and backup power domain controls.

    arch/arm/src/stm32f0l0/hardware/stm32l0_pwr.h:  Add STM32L0 PWR header file.

    arch/arm/include/stm32f0l0/chip.h: Clean up WIP chip header file.

    arch/arm/include/stm32f0l0/chip.h: WIP.

    arm/src/stm32f0l0: Resolve some small differences between F0 and L0 GPIO pin options.

    arch/arm/src/stm32f0l0: Better integrate STM32L0 header files.

    nuttx/arch/arm/include/stm32f0l0:  Add STM32L0 IRQ number definition file.

    arch/arm/src/stm32f0l0:  Add STM32L0 RCC driver.

    arch/arm/src/stm32f0l0/hardware:  Adds basic STM32L0 header files.

    arch/arm/src/stm32f0l0:  Add STM32L0 chip selections.

    configs/:  Hook new STM32L0 boards into the configuration system.

    configs: nucleo boards use as default ST LINK MCO as clock input from MCU and for this HSEBYP must be enabled

    configs: add basic support for nucleo-l073rz

    configs: add basic support for b-l072z-lrwan1
2018-12-19 12:36:35 -06:00
Mateusz Szafoni
b3b53a6dd4 Merged in raiden00/nuttx_pe (pull request #779)
Master

configs/nucleo-f334r8: add example for the SPWM generation (custom STM32 PWM usage)

arch/arm/src/stm32/stm32_pwm: fix compilation errors if the upper-half PWM logic is not enabled

include/nuttx/drivers/pwm.h: remove dependency on CONFIG_PWM for the upper-half PWM header. This allows compilation for the lower-level PWM drivers even if the upper-half PWM logic is not used.

arch/arm/src/stm32/stm32_tim.c: fix compilation error if there is no TIM8

configs/nucleo-f334r8/highpri: remove the upper-half ADC from configuration

configs/nucleo-f302r8/highpri: remove the upper-half ADC from configuration

configs/stm32f429i-disco/highpri: remove the upper-half ADC from configuration

Approved-by: GregoryN <gnutt@nuttx.org>
2018-12-09 16:31:57 +00:00
Mateusz Szafoni
83d297038a Merged in raiden00/nuttx_pe (pull request #768)
configs/nucleo-f334r8, configs/stm32f334-disco: cosmetics

Approved-by: GregoryN <gnutt@nuttx.org>
2018-11-30 12:09:00 +00:00
Mateusz Szafoni
fc46135ebc Merged in raiden00/nuttx_pe (pull request #767)
Improvements in STM32 ADC, minor changes in STM32 PWM, DMA, HRTIM and add some highpri ADC examples

arch/arch/src/stm32/stm32_adc: fix RCC reset logic

arch/arch/src/stm32/stm32_adc: move sample time change functions to low-level ADC ops

arch/arch/src/stm32/stm32_adc: configurable ADC DMA mode (one shot mode, circular mode)

arch/arch/src/stm32/stm32_pwm: remove llops_get interface. We can use structure casting to get pwm low-level ops

arch/arch/src/stm32/stm32_pwm: add timer enable/disable and frequency update to low-level ops

arch/src/arm/stm32: remove redundant stm32f33xxx_dma.c

arch/arm/src/stm32/stm32f40xxx_dma.c: add interfaces to interact with highp priority DMA interupts

arch/src/arm/stm32/stm32_hrtim: do not enable timers on startup if option from Kconfig selected and add interface to enable/disable timers

arch/src/arm/stm32/stm32_hrtim: fix some warnings

configs/nucleo-f334r8/highpri: update configuration due to changes in stm32_adc

configs/stm32f334-disco/buckboost: update configuration due to changes in stm32_adc

configs/nucleo-f334r8/highpri: add support for ADC injected sequence, add triggering from TIM1

configs/nucleo-f302r8/highpri: add high priority ADC interrupts example

configs/stm32f429i-disco/highpri: add high priority ADC interrupts example

Approved-by: GregoryN <gnutt@nuttx.org>
2018-11-23 23:33:45 +00:00
Gregory Nutt
0f10f6bdec configs/*/include; Remove prototype of stm32_boardinitialize() from board.h files. The authorative prototype is in arch/arm/src/stm32*/stm32*_start.h 2017-12-16 20:02:03 -06:00
Mateusz Szafoni
9105ac3e98 Merged in raiden00/nuttx (pull request #516)
Master

* stm32_hrtim: fix warnings related with RCC

* stm32f33xxx_adc: add some publicly visable interfaces and some code to support injected channels

* stm32f33xxx_dma: add public interface to handle with DMA interrupts

* stm32_hrtim: change some names and add some coments

* chip/stm32f33xxx_adc.h: cosmetics

* nucleo-f334r8: add logic for zero latency high priority interrupts example

* stm32: update some ADC-related configuration in Kconfig

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2017-10-22 15:46:13 +00:00
raiden00pl
3d5c98e217 nucleo-f334r8: UART2 is default serial port (STLINK Virtual Port) 2017-07-22 15:05:47 +02:00
raiden00pl
c3109acb29 nucleo-f334r8: Add OPAMP support 2017-04-30 11:13:13 +02:00
raiden00pl
8491cd65bc configs/nucleo_f334r8: add ADC example 2017-03-18 16:39:40 +01:00
raiden00pl
0188bc49ce Add Nucleo F334R8 board configuration 2017-02-26 12:42:43 +01:00