Gregory Nutt
7467329a98
Eliminate CONFIG_NO_NOINTS. Lots of files changed -> lots of testing needed.
2016-12-03 16:28:19 -06:00
Janne Rosberg
a03d26e88d
stm32_otghshost: if STM32F446 increase number of channels to 16
2016-11-30 12:17:12 -06:00
Gregory Nutt
934aded293
arch/: Adapt all Ethernet drivers to work as though CONFIG_NET_MULTIBUFFER were set. Remove all references to CONFIG_NET_MULTIBUFFER
2016-11-29 16:06:48 -06:00
Marc Rechté
3f91bd6056
STM32 DAC: Fix shift value whenever there are is a DAC2 and, hence, up to three interfaces.
2016-11-29 07:03:54 -06:00
Maciej Wójcik
0d0b1b64e2
Fix for F1 RTC Clock, tested on F103
2016-11-25 06:17:18 +01:00
Gregory Nutt
0804286ad3
arch/: Add option to use low-priority work queue to all Ethernet drivers in arch that support CONFIG_NET_NOINTS.
2016-11-19 09:20:01 -06:00
Paul A. Patience
8d9804d57b
STM32: STM32F303xB and STM32F303xC chips have 4 ADCs
2016-11-18 19:28:09 -05:00
Gregory Nutt
19c1c9d78b
All timer lower half drivers. Port Sebastien's changes to all all other implementations of the timer lower half. Very many just and untested. Expect some problems.
2016-11-17 15:03:31 -06:00
Marc Rechté
eb9a8ed790
STM37xx PWM: Add PWM driver support for STMF37xx. The changes have been tested successfuly for TIM4 and TIM17 (different IPs).
2016-11-07 09:35:48 -06:00
Gregory Nutt
8bd8ab1a45
configs/nucleo_f303re: Various fixes to get the adc configuration building again after PR. Refresh all configurations.
2016-11-04 06:59:28 -06:00
Gregory Nutt
0a5b4f684a
arch: Disable priority inheritance on all semaphores used for signaling in the rest of the MCU drivers
2016-11-03 17:38:26 -06:00
Gregory Nutt
d28181da10
arch: Disable priority inheritance on all semaphores used for signaling in all USB host drivers
2016-11-03 17:05:53 -06:00
Gregory Nutt
bb6bfa633e
arch: Disable priority inheritance on all semaphores used for signaling in all SD card drivers
2016-11-03 15:13:27 -06:00
Gregory Nutt
8b07aa6f7c
arch: Disable priority inheritance on all semaphores used for signaling in all SPI drivers
2016-11-03 14:51:44 -06:00
Gregory Nutt
e1cd9febbf
arch: Disable priority inheritance on all semaphores used for signaling in all I2C/TWI drivers
2016-11-03 14:23:42 -06:00
Paul A. Patience
93e9387689
STM32 ADC: Fix compilation error when DMA isn't enabled
2016-11-02 12:52:19 -04:00
David Sidrane
d870f4ab29
I think, that Size is (highest address+1 - Base address)
...
Base address has been removed and if address+count >= size we are outside of the Flash
2016-11-01 22:27:35 +00:00
Aleksandr Vyhovanec
2bb15fe789
Minor changes
2016-11-01 23:48:44 +03:00
Aleksandr Vyhovanec
20a1642552
To write the last page
2016-11-01 23:34:30 +03:00
Gregory Nutt
3bacda1565
STM32 Serial: Trivial removal of an extra space in a comment
2016-10-28 07:16:52 -06:00
Marc Rechte
483f012600
Initial implemention of the STM32 F37xx SDADC module. There are also changes to ADC, DAC modules. SDADC has only been tested in DMA mode and does not support external TIMER triggers. This is a work in progress.
2016-10-25 14:14:10 -06:00
Max Kriegleder
1d50259358
STM32 F4 I2c: A new implementation of the STM32 F4 I2C bottom half. The commin I2C as this did not handled correctly in the current implementation (see also https://github.com/PX4/NuttX/issues/54 ). The changes almost exclusively affect the ISR.
2016-10-24 16:32:10 -06:00
Maciej Wójcik
c719a32a40
add tim8 to stm32f103v pinmap
2016-10-19 16:34:07 +02:00
Gregory Nutt
30598c005f
Cosmetic changes from review of last PR
2016-10-15 08:56:11 -06:00
David Sidrane
909ea5e8ef
F4 Support versampling by 8
2016-10-15 03:56:07 -10:00
Jens Gräf
1d3abd17cc
dma2d: fix an error in up_dma2dcreatelayer where an invalid pointer was returned when a certain underlying function failed.
2016-10-07 13:42:24 +02:00
Gregory Nutt
d61239e38f
stm32_modifycr2 should be available on all platforms is DMA is enabled.
2016-10-06 08:50:52 -06:00
Sebastien Lorquet
9dcecd4b15
Add support for qencoders on various nucleo boards
2016-10-03 16:07:20 +02:00
Neil Hancock
ef475eb6a9
STM32 Ethernet: Correct typo in conditional logic
2016-10-01 07:32:41 -06:00
Mateusz Szafoni
9742757f26
Remove GPIO_ETH_RMII_TX_CLK. TX_CLK is not present in RMII
2016-09-22 10:05:45 +02:00
Pierre-noel Bouteville
829de7d5bd
Set USB address to avoid a failed assertion
2016-09-15 08:36:45 -06:00
Gregory Nutt
9c3bade7b4
net/tcp: tcp_ipvX_bind() not actually using the ported selected with port==0. Also removes duplicate call to pkt_input(). Issues noted by Pascal Speck.
2016-08-30 07:59:57 -06:00
David Sidrane
f2809d52d3
stm32_otgfsdev.c edited online with Bitbucket
...
dup SOF removed as noted by Sébastien Lorquet
2016-08-26 17:20:38 +00:00
David Sidrane
87f4a8033a
BugFix:Lost first word from FIFO
...
1) Do not overwrite Reserved Bits in GINTSTS (per ref manual)*
2) Acknowledge all pending int on entry to ISR that are Only rc_w1*
3) Do not disable RXFVL*
4) Loop until RXFVL is cleared*
5) Only clear the NAK on the endpoint on the OTGFS_GRXSTSD_PKTSTS_SETUPDONE to
not loose the first WORD of FIFO all the data (Bug Fix)
Changed marked *are just driver clean up and ensure ints are not lost.
The bug fix is #5
Test case open putty and observer the Set/Get LineCoding
Without this fix #5 the Get will not match the Set, and
infact the data might be skewed by 4 bytes, that are lost
from the FIFO if the OTGFS_DOEPCTL0_CNAK bit is set in the
OTGFS_GRXSTSD_PKTSTS_SETUPRECVD as opposed to the OTGFS_GRXSTSD_PKTSTS_SETUPDONE
Set Line Coding DATA1: 4B | 00 c2 01 00 00 00 08 | c8 1B
Get Line Coding DATA1: 4B | .. .. .. .. 00 00 08 c8 .. 00 00 07 | 7a 72
2016-08-25 06:51:52 -10:00
Aleksandr Vyhovanec
6bc952a2cc
STM32: Add IAR-style STM32F1xx vectors. Tested on STM32F103RB and STM32F107RC.
2016-08-24 10:10:33 -06:00
Gregory Nutt
ae37c9859f
Cosmetic changes from review of PR 120
2016-08-19 06:32:28 -06:00
Michał Łyszczek
0f175039ad
Fix compilation warnings for stm32 eth with certain configs
2016-08-19 09:18:18 +02:00
Gregory Nutt
c0074fd6b8
Merged in mlyszczek/nuttx/stm32butterfly2_board (pull request #118 )
...
add stm32butterfly2 development board
2016-08-18 11:14:10 -06:00
Alan Carvalho de Assis
a3e1bdde14
STM32 SPI: Fix STM32F3XXX SPI driver to read 8-bit correctly.
2016-08-18 08:38:49 -06:00
Gregory Nutt
d369eeec95
Remove a misleading comment
2016-08-18 07:13:04 -06:00
Gregory Nutt
01ae660c6c
Merged in K-man23/nuttx/stm32_adc_fix (pull request #117 )
...
Change stm32 adc dma callback to send channel number instead of index
2016-08-17 14:05:37 -06:00
Konstantin Berezenko
9b3bbc0f09
Change stm32 adc dma callback to send channel number instead of index
2016-08-17 13:02:36 -07:00
Michał Łyszczek
a05d9c18da
Add connectivity line stm32 to be able to compile SYSCFG, add definitions for
...
usb clock divs
2016-08-17 20:11:15 +02:00
Konstantin Berezenko
42ee88fe89
STM32F411 and STM32F446 map i2c2_sda_4 to different alternate function numbers
2016-08-17 11:01:44 -07:00
Gregory Nutt
8052dc4955
STM32 SPI: nbits should be unsigned. Valid range is 4-16 for F3 and L4. 8 or 16 for others.
2016-08-13 16:01:50 -06:00
Gregory Nutt
1a10518dae
Update ChangeLog
2016-08-13 12:03:12 -06:00
Gregory Nutt
eed5e41626
Add some comments
2016-08-13 10:24:40 -06:00
Gregory Nutt
172761163b
STM32F3 SPI: Cannot write 16-bit value to DR register because of how the F3 implements data packing.
2016-08-13 10:11:23 -06:00
Gregory Nutt
51fcd89b98
Add and fix some SPI debug output
2016-08-13 08:31:37 -06:00
Gregory Nutt
42202c6365
STM32 and STM32L4: Enabling DMA loses other bits in CR2
2016-08-13 08:01:41 -06:00