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Author SHA1 Message Date
Gregory Nutt
99639f2d48 SAM3/4 Interrupt initialization. Default interrupt priority not being set correctly 2014-04-17 14:02:22 -06:00
Gregory Nutt
a61c58d50a STM32 OTGFS Host: If OTGFS_HCCHAR_ODDFRM is not goint to be set, then it should be cleared 2014-04-17 11:16:58 -06:00
Gregory Nutt
6492446ac8 STM32 OTGFS Host: Changes from Leo for low-speed devices and interrupt endpoints 2014-04-17 10:52:27 -06:00
Gregory Nutt
0954437084 SAMA5 EMAC: Missing right parens from last change. Noted by Luciano Neri 2014-04-17 09:02:55 -06:00
Gregory Nutt
ebf221945c Move the un-definitions of __ramfuncs__ from the sam_clockconfig.c to the common up_internal.h header file so that the attribute will be applied the same to function definitions and prototypes. 2014-04-17 08:56:20 -06:00
Gregory Nutt
edc022ff1a Costmetic: Replace spaces with tabs 2014-04-16 16:26:46 -06:00
Gregory Nutt
cb802b02e1 STM32 OTGFS Host: Additional trace points from Leo 2014-04-16 12:56:21 -06:00
Gregory Nutt
b4f11306d3 STM32 F2: Fix SPI2 MOSI pin mapping. From dlsitzer 2014-04-16 12:35:33 -06:00
Gregory Nutt
044f7209f6 SAMA5 TWI: If running from SDRAM, BOARD_MCK_FREQUENCY is not a constant and cannot be used in pre-processor conditionals 2014-04-16 12:09:55 -06:00
Gregory Nutt
67bea2d342 SAMA5 SSC: If running from SDRAM, BOARD_MCK_FREQUENCY is not a constant and cannot be used in pre-processor conditionals 2014-04-16 10:58:23 -06:00
Gregory Nutt
be1bd45076 SAMA5 EMAC/GMAC: If running from SDRAM, BOARD_MCK_FREQUENCY is not a constant and cannot be used in pre-processor conditionals 2014-04-16 10:13:08 -06:00
Gregory Nutt
e654036b5a SAMA5 CAN: If running from SDRAM, BOARD_MCK_FREQUENCY is not a constant and cannot be used in pre-processor conditionals 2014-04-16 10:00:32 -06:00
Gregory Nutt
9d12aa82fe Sourceforge Patch #37: Missing semicolon 2014-04-16 09:43:34 -06:00
Gregory Nutt
a049b6a4c7 SAMA5 ADC: If running from SDRAM, BOARD_MCK_FREQUENCY is not a constant and cannot be used in pre-processor conditionals 2014-04-16 09:42:07 -06:00
Gregory Nutt
e26466e6e4 Updates to the STM32 OTGFS host logic from Leo 2014-04-15 08:49:33 -06:00
Gregory Nutt
fd08872892 Costmetic changes to some comments 2014-04-14 16:36:07 -06:00
Gregory Nutt
d4fc5ec41c examples/touchscreen: Add a configuration option to indicate that there is or is not an architecture-specific initialization function 2014-04-14 12:26:49 -06:00
Gregory Nutt
9d2ce57650 Removing more trailing whitespace 2014-04-13 17:54:59 -06:00
Gregory Nutt
25d4ff745b More trailing whilespace removal 2014-04-13 16:22:22 -06:00
Gregory Nutt
b7c65adeca Cosmetic changes for coding style; removal of dangling spaces at the end of lines 2014-04-13 13:18:06 -06:00
Gregory Nutt
c708eff608 Make sure that there is one space after for 2014-04-12 13:28:22 -06:00
Gregory Nutt
33d5d24964 Make sure that there is one space between while and condition 2014-04-12 13:09:48 -06:00
Gregory Nutt
eee82879cb Make sure that there is one space between if and condition 2014-04-12 12:53:19 -06:00
Gregory Nutt
65c6c071ff STM32 OTF FS host: Use of OTGFX_VTRACEn_ macros must match use of usbhost_tracen() interface 2014-04-12 10:09:37 -06:00
Gregory Nutt
bc144ad5d0 STM32 OTG FS Hose and others: Remove some warnings 2014-04-12 09:58:23 -06:00
Gregory Nutt
7bf7d8ebf6 STM32 OTGFS Host: Fix a logic error introduced in the last check-in 2014-04-12 09:33:52 -06:00
Gregory Nutt
aefb741a6a STM32 OTGFS: Host USB tracing instrumentation added by Leo 2014-04-12 08:44:22 -06:00
Gregory Nutt
27a7636440 SAMA5 TWI: Number of bytes transferred not be incremented on the first byte. From David Sidrane 2014-04-10 18:19:03 -06:00
Gregory Nutt
66df3afd46 mv ramlog.h and syslog.h to new include/nuttx/syslog 2014-04-10 09:29:30 -06:00
Gregory Nutt
1fa5d28754 Add logic for TM4C125GXL clocking based on prototype from from Daniel Carvalho with modifications. I think the LM4F120 may have broken before as well(?). In any event, the LM4F120 also works well with this chanage 2014-04-07 15:32:13 -06:00
Gregory Nutt
2a1212bf48 Cosmetic changes to comments and README 2014-04-07 15:28:04 -06:00
Gregory Nutt
43abe85674 Updated README files and comments 2014-04-07 07:43:28 -06:00
Gregory Nutt
398bf81c18 SAMA5 UDPHS: Fix error where bit was not cleared to acknowledge receipt of data and to setup for the next incoming data 2014-04-06 13:13:31 -06:00
Gregory Nutt
3e710c0080 SAMA5 clocking: USB clock setup needs to be done no matter the state of BMS and not matter how we are booting 2014-04-05 11:53:20 -06:00
Gregory Nutt
4993dd6ed3 Cosmetic update to comments 2014-04-05 11:35:05 -06:00
Gregory Nutt
77c968e36a Kconfig: Remove warnings. ARCH_RAMFUNCS depends on ARCH_HAVE_RAMFUNCS, so it is not possible to select ARCH_RAMFUNCS wihtout ARCH_HAVE_RAMFUNCS 2014-04-04 16:26:24 -06:00
Gregory Nutt
78607a7ea9 SAMA5: Don't use MMU PMD bufferable bit to try to control write-through vs write-back. It does not work that way 2014-04-04 16:05:20 -06:00
Gregory Nutt
0b014faa75 SAMA5 boards: Operation at 528Mhz has been verified 2014-04-04 10:36:53 -06:00
Gregory Nutt
e78f36e229 SAMA5: Update from David Sidrane to last RAM function change: Apparently inline functions need to placed into the same RAM section, or they do not get inlined. From David Sidrane 2014-04-04 08:59:39 -06:00
Gregory Nutt
724d2de086 Fix a build error when only USB device tracing is enabled (from David Sidrane). Also an update to the USB tracing document 2014-04-04 08:56:10 -06:00
Gregory Nutt
38e49b48c5 SAMA5: On some hardware, reconfiguring the PLL while executing out of NOR FLASH causes crashes. This was fixed by David Sidrane by implementing RAM functions. The killer code is copied and executed from ISRAM and the crash is avoided. 2014-04-03 16:08:18 -06:00
Gregory Nutt
e92eaabb3e SAMA5: Fix SAMA5 so that interpretation of BMS bit is correct. From David Sidrane 2014-04-03 15:47:34 -06:00
Gregory Nutt
489651d041 ARMv7-A: Typo fix from David Sidrane 2014-04-03 15:43:13 -06:00
Gregory Nutt
774a24a2c2 SAMA5: Cosmetic updates to comments and README files 2014-04-03 15:30:00 -06:00
Gregory Nutt
c00a3ce914 SAMA5: When booting from SDRAM, don't copy vectors to ISRAM. Instread just set the VBAR register to add address of the vectors in SDRAM 2014-04-03 14:09:11 -06:00
Gregory Nutt
362d539914 If LOWVECTORS is selected, then we need to clear the VBAR register. A bootloader may have left the VBAR in an bad state 2014-04-03 13:09:30 -06:00
Gregory Nutt
e3d2117b29 SAMA5: Make sure the MMU and caches are disabled on power up; flush the vector region D-Cache after copying interrupt vectors; make sure that D-Cache, I-Cache, and TLBs are invalidated after modifying the AXI MATRIX remapping 2014-04-02 16:27:00 -06:00
Gregory Nutt
3a1e08bc3c SAMA5: When running from SRAM, vectors must lie in ISRAM 2014-04-02 12:54:15 -06:00
Gregory Nutt
7372485e16 Updated comments and README 2014-04-02 09:03:29 -06:00
Gregory Nutt
df7429add0 SAMA5 DBGU: Add logic to suppress DBGU reconfiguration when started from a bootloader 2014-04-02 09:03:27 -06:00