arch/arm/src/stm32/lowputc: fix uart glitch when lowputc is enabled
Calling up_lowputc() when a character is in the shift register results
in corrupted character on stm32f1xx and stm32f205 cores.
TC status bit ensures that up_lowputc() waits for an on-going
transmission to complete before writing in TDR.
Approved-by: Gregory Nutt <gnutt@nuttx.org>
stm32f33xxx_adc.c: fix bug in RCC reset logic that resets ADC1 configuration when both ADC1 and ADC2 are in use
Approved-by: Gregory Nutt <gnutt@nuttx.org>
lc823450 dvfs auto
* arch/arm/src/lc823450: Fix up_enable_irq() timing for I2S.
In previous commit, I2S IRQ might be sometimes assigned to CPU1
when CONFIG_SMP=y. This change fixes this issue.
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
* arch/arm/src/lc823450: Refactor timer driver.
Introduce lc823450_timer.h and move lc823450_timerisr.c to
lc823450_timer.c Add MTM timer APIs for DVFS. Introduce
up_rtc_gettime() for CONFIG_RTC_HIRES.
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
* arch/arm/src/lc823450: Introduce idle time calculation in DVFS
Also, DVFS autonomous mode based on CPU idle time is supported.
NOTE: voltage control is still disabled.
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
* configs/lc823450-xgevk: Update defconfigs
Enable RTC_HIRES instead of RTC_DATETIME (audio/rndis)
Disable TCP_WRITE_BUFFERS and change SCHED_LPWORKPRIORITY (rndis)
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
* configs/lc823450-xgevk: Update README.txt
Update SMP and DVFS related part
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
Author: Juha Niskanen <juha.niskanen@haltian.com>
Date: Mon Feb 19 15:03:17 2018 -0600
drivers/mtd: mtd_config.c: Add still more error handling (to detect bad underlying flash implementations)
drivers/mtd: mtd_config.c: Remove MTD_ERASE that was erasing data block instead of erase block. This is a partial revert of 4f18b4. Reported-by: Pascal Speck <iktek01@yahoo.com>
arch/arm/src/stm32l4: stm32l4_flash: change flash programming to use page buffer for unaligned writes.
is not done or done after PLL configuration, the STM32 fail to continue boot
operation if the frequency if greater than 24MHz. This common t add this operation according to the board variable STM32_SYSCLK_FREQUENCY. Tested on stm32f334-disco board.
Fix signal handing for smp
* sched/signal: Remove SMP related logic in sig_dispatch.c
This change prevents from a deadlock in up_schedulesigaction.c
where inter-CPU signal handling is actually implemented.
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
* arch/arm/src/armv7-m: Fix signal handling for SMP
In previous implementation, signal handling for SMP was incorrect.
Thus, for example, if an inter-CPU signal happened an incorret tcb
was signaled and caused ASSERT().
This change fixes the issues and works for both inter-CPU signal
handling and signal handling on the same CPU.
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
SAMDL DMA fixes and experimental SPI support
* SAMDL: Fix DMA controller support
* SAMDL: Added experimental DMA support to SPI driver. spi_exchange() uses a pair of DMA channels for TX and RX
Approved-by: Gregory Nutt <gnutt@nuttx.org>
disable LPC17 FDR when not used (second fix)
if a boot loader sets the fractional divider (FDR) the baud rate in
nuttx will be wrong (multiplied by this fraction).
This also has to be added to lpc17_lowputc.c
Unfortunately the constant used for shifting the bits was wrong in the header file, so it took some time to realize this...
Approved-by: Gregory Nutt <gnutt@nuttx.org>
configs/flipnclick-pic32mz: Add an nxlines configuration for use in testing the custom HiletGo Click board.
arch/mips/src/pic32mz: Correct some SPI-related typos. configs/flipnclick-pic32mz: Finishes integration of HiletGo OLED. drivers/lcd: Finish support for HiletGo OLED.
drivers/lcd: Add configuration support for HiletGo OLED. configs/flipnclick-pic32mz: Add board support for HiletGo OLED.
arch/mips/src/pic32mz: Fix some typos in debug instrumentation in pic32mz-gpio.c; fix some types releated to UART5 configuration in pic32mz-serial.c.
configs/flipnclick-pic32mz/nsh: Switch serial console to UART3. There is some problem with the UART4 RX pin documentation or configuration.
disable LPC17 FDR when not used
* disable LPC17 FDR when not used
if a boot loader set the fractional divider (FDR) the baud rate in
nuttx will be wrong (multiplied by this fraction).
So if it is not used, it should be disabled.
LPC176x docs say:
"
DIVADDVAL Baud-rate generation pre-scaler divisor value.
If this field is 0, fractional baud-rate generator will
not impact the UARTn baudrate.
MULVAL Baud-rate pre-scaler multiplier value.
This field must be greater or equal 1 for UARTn to operate properly,
regardless of whether the fractional baud-rate generator is used or not.
"
So DIVADDVAL is set to 0 and MULVAL is set to 1.
* symbols found and added
Approved-by: Gregory Nutt <gnutt@nuttx.org>
