Commit Graph

13849 Commits

Author SHA1 Message Date
Gregory Nutt
5beab6fbf0 spin_lock_irqsave() and spin_unlock_irqrestore() are only valid if the CPU supports global disabling of interrupts. 2018-02-04 15:41:22 -06:00
Gregory Nutt
5c5d19f1c8 Some ommissions from previous commit. 2018-02-04 12:36:51 -06:00
Gregory Nutt
1e59d9dd14 armv7-a, armv7-r, armv7-m: Add atomic read-add-write and read-subtract-write functions. 2018-02-04 12:22:03 -06:00
Gregory Nutt
2683f713ab Make sure that labeling is used consistently in all function headers (part 3). 2018-02-01 12:17:03 -06:00
Gregory Nutt
1567b82429 Make sure that labeling is used consistently in all function headers (part 2). 2018-02-01 12:03:55 -06:00
Gregory Nutt
7cf88d7dbd Make sure that labeling is used consistently in all function headers. 2018-02-01 10:00:02 -06:00
Stewart
be81893b55 arm/src/kinetis: Correct some Ethernet PHY register bit tests for the KSZ8081 PHY. 2018-02-01 07:24:36 -06:00
Gregory Nutt
1550ef2f54 arch/arm/src/lpc43xx: Correct a typo introduced in last large set of changes 2018-01-31 11:32:43 -06:00
Gregory Nutt
da50646bcf sched/wdog: wd_start() is an internal OS function and should not set the errno value. Reviewed and updated every call to wd_start() to verify if return value is used and if so if the errno value is accessed. 2018-01-31 10:09:14 -06:00
Matt Thompson
1f10a9c576 Merged in extent3d/nuttx/i2c (pull request #588)
SAMDL: Added I2S register definitions

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2018-01-31 13:29:23 +00:00
Gregory Nutt
3521aaf944 Squashed commit of the following:
binfmt/, configs/, grahics/, libc/, mm/, net/, sched/:  OS references to the errno variable should always use the set_errno(), get_errno() macros
    arch/arm/src/stm32 and stm32f7:  Architecture-specific code is not permitted to modify the errno variable.  drivers/ and libc/:  OS references to the errno variable should always use the set_errno(), get_errno() macros
2018-01-30 17:57:36 -06:00
Gregory Nutt
82982f7972 sched/: Fix several inappropriate accesses to get_errno() that were missed in previous changes (some going back to nuttx-.23). Add new nxsched_setscheduler() and nxsched_getaffinity() which are equivalent to their counterparts without the nx on front. These versions do not modify the errno value. Changed all calls within the OS to use these newer versions of the functions. 2018-01-30 16:16:41 -06:00
Gregory Nutt
170a50c690 Squashed commit of the following:
sched/sched:  Correct some build issues introduced by last set of changes.
    sched/sched:  Add new internal OS function nxsched_setaffinity() that is identical to sched_isetaffinity() except that it does not modify the errno value.  All usage of sched_setaffinity() within the OS is replaced with nxsched_setaffinity().
    sched/sched:  Internal functions sched_reprioritize() and sched_setpriority() no longer movidify the errno value.  Also renamed to nxsched_reprioritize() and sched_setpriority().
    sched/sched:  Add new internal OS function nxsched_getscheduler() that is identical to sched_getscheduler() except that it does not modify the errno value.  All usage of sched_getscheduler() within the OS is replaced with nxsched_getscheduler().
    sched/sched:  Add new internal OS function nxsched_setparam() that is identical to sched_setparam() except that it does not modify the errno value.  All usage of sched_setparam() within the OS is replaced with nxsched_setparam().
    sched/sched:  Add new internal OS function nxsched_getparam() that is identical to sched_getparam() except that it does not modify the errno value (actually, the previous value erroneously neglected to set the errno value to begin with, but this fixes both issues).  All usage of sched_getparam() within the OS is replaced with nxsched_getparam().
2018-01-30 11:08:18 -06:00
Matt Thompson
20016b841a Merged in extent3d/nuttx (pull request #587)
SAMDL: Added Timer Compare for Control registers header

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2018-01-29 19:20:00 +00:00
Bob Feretich
a0cd711334 I have a SPI bus with both Mode 0 and Mode 3 devices on it. After performing SPI I/O to a Mode 0 device, switching to a Mode 3 device locked up the SPI interface. Only zeroes would be read. I traced the reason for the lock-up to arm/arm/src/stm32f7/stm32_spi.c function spi_setmode(). Changing the mode causes a spurious SPI clock transmission that confuses the stm32f7 SPI input hardware. This problem is solved by (1) changing the SPI mode with SPI (and perhaps DMA) disabled, and (2) flushing the receive FIFO if the mode change results in garbage in the FIFO. 2018-01-29 07:23:52 -06:00
Matt Thompson
c5e231bedd SAMDL: Added Analog Comparator headers and basic initialization 2018-01-28 21:11:37 -08:00
Mateusz Szafoni
0afbcb0bab Merged in raiden00/nuttx (pull request #585)
Master

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2018-01-28 13:46:17 +00:00
raiden00pl
cec8709ec1 stm32/Kconfig: fix COMP7 dependency
stm32_hrtim: add HRTIM push-pull mode configuration

stm32f334-disco: add buck-boost converter mode
2018-01-28 11:06:08 +01:00
Gregory Nutt
67d09e831b Fix recurring typo: *tino->*tion 2018-01-27 13:34:58 -06:00
Gregory Nutt
12e3e47d3c Update comments, mostly spelling errors. 2018-01-27 09:37:46 -06:00
Gregory Nutt
49d07162bf arch/arm/src/stm32: stm32_rtcc.h should be used to access BKP registers on F2, F3, and F4. 2018-01-26 11:34:48 -06:00
Gregory Nutt
bffa425233 arch/arm/src/stm32: stm32_bkp.h should only be used for STM32 F1 2018-01-26 11:26:40 -06:00
Gregory Nutt
fc387b9aa0 arch/arm/src/stm32: Remove bogus definitions of STM32_BKP_BASE from the F2, F3, and F4 memory maps. Unlike the F1, these parts do not have a separate BKP address region. The BKP registers are with the RTCC address regions. 2018-01-26 11:18:46 -06:00
Gregory Nutt
9e60dffc5a arch/srm/src/stm32f7: Remove confusing, redundant, and misleading STM32_BKP_BASE definitions. 2018-01-26 08:50:21 -06:00
Frank Benkert
e15fc0b65a arch/arm/src/samv7/sam_lowputc.c: Fix undefined variable when using USART1 for other purposes than UART (e.g. SPI). 2018-01-26 07:52:45 -06:00
Matt Thompson
2bc4967c0f Merged in extent3d/nuttx (pull request #583)
SAMDL: Added DMAC header for SAMD, fixed up sam_dmac to compile with debugging enabled
2018-01-25 20:15:58 +00:00
Matt Thompson
d314feab82 Merged in extent3d/nuttx (pull request #582)
SAMDL: Added SAMD DAC header file. Fixed SAMD EVSYS header. Added SAMD TC header file. Fixed some minor typos

* SAMD External Interrupt Controller (EIC) support

* removed comment

* SAMDL: SPI must be disabled before changing the mode bits in CTRLA register

* arch/arm/src/lc823450: Assign I2S IRQ handling to CPU0

    Previous commit assumed that the caller is running on CPU0.
    However, the caller sometimes runs at CPU1.  This patch will
    assign the caller to CPU0 explicitly.

    Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>

* arch/arm/src/lc823450: Change irqwarn() to ASSERT() in up_ack_irq()

    Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>

* configs/lc823450-xgevk: Update README.txt and defconfigs

    Update comments on SMP in README.txt
    Enable SYSTEM_TIME64 in defconfigs.
    Enable INSTRUMENTATION in rndis configuration.

    Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>

* configst/stm3240g-eval:  Remove only bogus logic to start the NX server.  That was there only to support the knxwm configuration and was implemented priorit to boardctl(BOARCIOC_NX_START).

* drivers/input/ft5x06.c:  Remove cool logic to disable polling when there there is no client waiting for read data.  That was a great idea to save CPU cycles when there is nothing reading from the touchscrren but, unfortunately, does not work with readers that open the driver in non-blocking mode.  So I think we just have to eat the CPUs even when there is nothing waiting for touchscreen input.

* configs/lpcxpresso-lpc54628/lvgl:  Add LittlevGL graphics demo configuration.

*  configs/lpcxpresso-lpc54628: Update README

* include/termios.h:  Update comments; fix long lines.

* sched/semaphore: Add ASSERT(false) in nxsem_post() if no waiting task is found.

    Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>

* sched/sched/sched_sporadic.c: fix compiler error when priority inheritance is enabled.  Noted by eunb.song@samsung.com

* Change ASSERT(false) to DEBUGPANIC().

* Documentation: Fix copy/paste error in NX graphics document.  Noted by Henjiu Kang.

* sched/sched:  Fix some priority inheritance related issues noted during review of logic.  Also add some REVISIT comments for some issues noted in the design.

* Update README and some comments

* Issue #85: /dev/userleds is not working for nucleo-l432kc fixed

* configs/nucleo-l432kc: Fix numerous cloning errors/typos.

* Update TODO list

* NUCLEO F432KC typo fixed, correct name is L432KC

    Just README.txt and comments affected, no changes in the code

* Merged in raiden00/nuttx (pull request #579)

    Master

    * stm32_hritm: add interface to get timer clock frequency

        stm32_hrtim: fix timer freq calculation

        stm32_hrtim: add compar/capture registers significant bits checking

        stm32_hrtim: minor changes

    * stm32f334-disco: add buck converter and boost converter logic

    Approved-by: Gregory Nutt <gnutt@nuttx.org>

* fs/userfs: use correct req type in userfs_truncate, remove use of undeclared buf

* Merged in david_alessio/nuttx/refactor-pll-setup (pull request #581)

    Refactor pll setup

    * fix typo in #def

    * refactor PLL setup code...

    * refactored PLL/CLK config, easier, checks for correctness

    * call go_os_start if STACK_COLORIZED

    * smarter config of EXTCLK output freq

    * cosmetic

    Approved-by: Gregory Nutt <gnutt@nuttx.org>

* The existence of the network driver ioctl() method should depend on CONFIG_NETDEV_IOCTL rather than CONFIG_NETDEV_PHY_IOCTL.  The former enables the method, the later enables a subset of possible driver IOCTLs.  This change should be basically a no-operation.  The affected ioctl methods only support those subset of driver IOCTLs selected by CONFIG_NETDEV_PHY_IOCTL and the network logic will tolerate a nul ioctl method.

* net/tcp:  Write buffering logic should not wait for a free buffer if the socket was opened non-blocking.  Also, rename the TCP write buffering macros from WRB_* to TCPWB_* to make room in the namespace for write buffering with other protocols.

* net/udp:  Remove some conditional logic that was true if there is only a single network device, but not true in the multi-device context.

* This commit adds an as-of-yet untested implemented of UDP write buffering.

    Squashed commit of the following:

        net/udp:  Address most of the issues with UDP write buffering.  There is a remaining issue with handling one network going down in a multi-network environment.  None of this has been test but it is certainly ready for test.  Hence, the feature is marked EXPERIMENTAL.
        net/udp:  Some baby steps toward a corrected write buffering design.
        net/udp:  Remove pesky write buffer macros.
        Eliminate trailing space at the end of lines.
        net/udp:  A little more UDP write buffering logic.  Still at least on big gaping hole in the design.
        net/udp:  Undefined CONFIG_NET_SENDTO_TIMEOUT.
        net/udp:  Crude, naive port of the TCP write buffering logic into UDP.  This commit is certainly non-functional and is simply a starting point for the implementatin of UDP write buffering.
        net/udp:  Rename udp/udp_psock_sendto.c udp/udp_psock_sendto_unbuffered.c.

* net/udp:  In sendto(), return EHOSTUNREACH if if the network is down.

* net/udp:  Resolves final design issues with UDP write buffering.  100% code complete but also 100% untested.

* net/udp and tcp:  Yet another (cosmetic) change to UDP and TCP write buffer macro naming.

* net/udp:  UDP write buffering is basically functional but needs a lot more verification.

* net/udp:  Fix memory leak with UDP + write buffer is closed.  Also update TODO and comments and refresh a configuration.

* Update some comments.

* drivers/mtd/at24xx.c: Correct page size for AT24C02 part.

* arch/arm/src/stm32:  Make STM32 usable with an external RTC.   drivers/timers/ds3231.c:  Correct some debug statments.

* arch/arm/src/stm32/stm32_spi.c: Removed unnecessary (and incorrect) speed limitation

* arch/arm/src/stm32/stm32f40xxx_i2c.c:  Correct some recent changes to STM32F4 I2C that broke poll mode of operation.

* configs/flipnclick-sam3x:  Using JTAG (vs. Bossac) I was finally able to load code and verify the basic NSH configuration.  Updated READMEs.  Also switched to USART0 (vs UART0) for the serial console because I was not getting bi-directional communication on the VCOM.

* SAMDL: Added SAMD DAC header file. Fixed SAMD EVSYS header. Added SAMD TC header file. Fixed some minor typos

* fix typo

* added missing EVCTRL register bits in TC

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2018-01-25 11:55:40 +00:00
Alexander Oryshchenko
d1cfcabb1f arch/arm/src/stm32/stm32f40xxx_i2c.c: Correct some recent changes to STM32F4 I2C that broke poll mode of operation. 2018-01-24 06:58:47 -06:00
Alexander Oryshchenko
a7e56359a4 arch/arm/src/stm32/stm32_spi.c: Removed unnecessary (and incorrect) speed limitation 2018-01-24 06:57:17 -06:00
Alexander Oryshchenko
dd4fc9f5c3 arch/arm/src/stm32: Make STM32 usable with an external RTC. drivers/timers/ds3231.c: Correct some debug statments. 2018-01-24 06:55:14 -06:00
Gregory Nutt
a8b6be4aaf The existence of the network driver ioctl() method should depend on CONFIG_NETDEV_IOCTL rather than CONFIG_NETDEV_PHY_IOCTL. The former enables the method, the later enables a subset of possible driver IOCTLs. This change should be basically a no-operation. The affected ioctl methods only support those subset of driver IOCTLs selected by CONFIG_NETDEV_PHY_IOCTL and the network logic will tolerate a nul ioctl method. 2018-01-22 08:17:45 -06:00
David Alessio
6ae6ecc958 Merged in david_alessio/nuttx/refactor-pll-setup (pull request #581)
Refactor pll setup

* fix typo in #def

* refactor PLL setup code...

* refactored PLL/CLK config, easier, checks for correctness

* call go_os_start if STACK_COLORIZED

* smarter config of EXTCLK output freq

* cosmetic

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2018-01-22 13:20:35 +00:00
Mateusz Szafoni
5af7e3de2a Merged in raiden00/nuttx (pull request #579)
Master

* stm32_hritm: add interface to get timer clock frequency

    stm32_hrtim: fix timer freq calculation

    stm32_hrtim: add compar/capture registers significant bits checking

    stm32_hrtim: minor changes

* stm32f334-disco: add buck converter and boost converter logic

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2018-01-21 18:28:09 +00:00
Matt Thompson
1ec8a6f34c Merged in extent3d/nuttx (pull request #575)
SAMDL: SPI must be disabled before changing the mode bits in CTRLA register

* SAMD External Interrupt Controller (EIC) support

* removed comment

* SAMDL: SPI must be disabled before changing the mode bits in CTRLA register

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2018-01-18 12:33:41 +00:00
Masayuki Ishikawa
0184f8818a Merged in masayuki2009/nuttx.nuttx/lc823450_fixes (pull request #576)
lc823450 fixes

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2018-01-18 12:32:41 +00:00
Masayuki Ishikawa
a3ed16dd30 arch/arm/src/lc823450: Change irqwarn() to ASSERT() in up_ack_irq()
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2018-01-18 14:02:24 +09:00
Masayuki Ishikawa
d43c52cf03 arch/arm/src/lc823450: Assign I2S IRQ handling to CPU0
Previous commit assumed that the caller is running on CPU0.
However, the caller sometimes runs at CPU1.  This patch will
assign the caller to CPU0 explicitly.

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2018-01-18 13:55:12 +09:00
Gregory Nutt
3ff30608ef arch/arm/src/samdl: Mostly cosmetic improvements to previous commit. 2018-01-17 11:39:43 -06:00
Gregory Nutt
2d95fa6d2a arch/arm/src/samdl: Correct a link time error if CONFIG_SAMDL_EIC is not enabled. 2018-01-17 11:16:21 -06:00
Evgeniy Bobkov
7d36a81806 Fixes two bugs in multi-block SD-card operations on the STM32F7 platform. arch/arm/src/stm32f7: DBLOCKSIZE must be the size of SD-card block, not the total amount of transferred bytes. drivers/mmcsd: respect SDIO_CAPS_DMABEFOREWRITE on CMD25. 2018-01-16 12:41:02 -06:00
Mateusz Szafoni
fd5d811b0a Merged in raiden00/nuttx (pull request #569)
Master

* stm32f33xxx_hrtim.h: fix some definitions

* stm32_hrtim: fix some bugs

    stm32_hrtim: fix deadtime configuration

    stm32_hrtim: add interface to change outputs SET/RST configuration

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2018-01-14 19:00:18 +00:00
Gregory Nutt
8f94ce46f9 arch/arm/src/lpc54xx: The basic SPI driver is code complete but still untested. This driver is 'basic' in that in only supports polled mode operations. 2018-01-14 12:09:26 -06:00
Gregory Nutt
134bac3810 arch/arm/src/lpc54xx: Add configuration logic to the empty SPI driver. Still missing all data tranfer logic. 2018-01-13 15:38:55 -06:00
Matt Thompson
48355b32dc Merged in extent3d/nuttx (pull request #568)
SAMD External Interrupt Controller (EIC) support

* SAMD External Interrupt Controller (EIC) support

* removed comment

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2018-01-12 13:11:58 +00:00
Matt Thompson
f5cac7c45a SAMDL fix g_spi2ops and g_spi2dev using incorrect values 2018-01-11 13:00:08 -08:00
Matt Thompson
537c9a27d1 arch/arm/src/samdl: In sam_spibus_initialize(), the pinmux configuration was smashing the previous CTRLA register configuration. There are also some typos in samd_spi.h 2018-01-11 07:34:56 -06:00
Masayuki Ishikawa
7460773d7b arch/arm/src/lc823450: Introduce DVFS
This version only supports manual mode and Vdd1 is fixed to 1.2V.

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2018-01-10 16:13:00 +09:00
Gregory Nutt
7d4451ee86 Squashed commit of the following:
configs/flipnclick-pic32mz:  Switch the serial console to UART4.  Clean up some minor issues the LED options.
    configs/flipnclick-pic32mz:  Add support for two on-board buttons:  T1 and T2.
    configs/flipnclick-pic32mz:  Adds basic board support for the Mikroe Flip&Click PIC32MZ board.  Initial commit is just the configs/pic32mz-starterkit with some name chanages.
2018-01-08 14:21:49 -06:00
Gregory Nutt
6fe1f5a96c Squashed commit of the following:
arch/mips/src/pic32mz:  Commits the basic architecture port for the PIC32MZEF.
    arch/mips/src/pic32mz:  Begin adding PIC32MZEF files. Initial commit are simply PIC32MZEC files with name changes.
    arch/mips/include/pic32mz:  Add support for the PIC32MZEF family.
2018-01-08 10:01:23 -06:00
raiden00pl
01dc86da3d stm32/chip.h: minor fixes for STM32F334 2018-01-03 19:07:51 +01:00
Gregory Nutt
e7db11fc55 arch/arm/src/lpc54xx: LPC54xx Ethernet driver no long depends on EXPERIMENTAL. 2018-01-02 11:17:25 -06:00
Gregory Nutt
d04f166d84 arch/arm/src/lpc54xx: Add some hooks for future 802.1q VLAN support. configs/lpcxpresso-lpc54628: Automatically bring up network in the netnsh configuration. 2018-01-02 08:49:09 -06:00
Gregory Nutt
c3d3e91a3f arch/arm/src/lpc54xx: Correct handling of the Ethernet RBU error. With this fix, Ethernet now appears to be fully functional although still undertested. 2018-01-01 15:08:19 -06:00
Gregory Nutt
24b594cbc4 arch/arm/src/lpc54xx: Back out address filtering change in commit 3c65be8c1a 2018-01-01 11:17:32 -06:00
Gregory Nutt
3c65be8c1a arch/arm/src/lpc54xx: Fix a few more Ethernet issues related to buffer management and address filtering. 2018-01-01 08:54:31 -06:00
Gregory Nutt
fd10eaf1fb arch/arm/src/lpc54xx: Fix several more issues in bring-up of Ethernet driver. Still not fully functional. 2017-12-31 17:16:21 -06:00
Gregory Nutt
f624c504d1 arch/arm/src/lpc54xx: Fixes a few more Ethernet bring up bugs. Rx seems to work; Tx does not. 2017-12-31 14:49:13 -06:00
Gregory Nutt
b2adb4917f arch/arm/src/lpc54xx: Add register level debug output for Ethernet testing. Fixed a few start up problems. Still hangs on start-up, however. 2017-12-31 11:11:57 -06:00
Gregory Nutt
63c055e1ee arch/arm/src/lpc54xx: Ethernet. Remove last of #warning issues. No compiles with no warnings/errors. 2017-12-30 19:46:37 -06:00
Gregory Nutt
2de08627e0 arch/arm/src/lpc54xx: Finishes open design issues with AVBTP multi-channel operation. 2017-12-30 19:05:39 -06:00
Gregory Nutt
13b5d4de96 arch/arm/src/lpc54xx: Resolves some design issues with multicast address filtering and also with AVBTP multi-channel operation (the latter design is still incomplete). 2017-12-30 17:19:37 -06:00
Gregory Nutt
f23fb9dd14 arch/arm/src/lpc54xx: Completes basic packet transfer logic for Ethernet drivers. Still some unfinished logic for IPv6 multicast logic and for various non-mainstream configurations. But it is ready for tested. configs/lpcxpresso-lpc54628: Add a netnsh configuration that will be used to test the Ethernet driver. Untested on initial commit. 2017-12-30 12:51:57 -06:00
Gregory Nutt
2fb441b145 arch/arm/src/lpc54xx: Adds Ethernet Tx done handling. 2017-12-29 17:28:38 -06:00
Gregory Nutt
6315f6468d arch/arm/src/lpc54xx: Adds basic Ethernet interrupt handling. Still missing all of the descriptor and packetk buffer handling logic. 2017-12-29 14:29:52 -06:00
Gregory Nutt
5146725edc arch/arm/src/lpc54xx: Addes packet buffer and DMA descriptor logic 2017-12-29 13:17:43 -06:00
Gregory Nutt
5394681dea arch/arm/src/lpc54xx: Finishes basic MAC configruation. Began adding DMA descriptor definitions. 2017-12-29 10:27:20 -06:00
Gregory Nutt
ebdc3b9b58 arch/arm/src/lpc54xx: Continuing with Ethernet initializatino logic. Added MTL initialization and partial MAC initialization. 2017-12-28 11:44:02 -06:00
Gregory Nutt
66f632c3a3 arch/arm/src/lpc54xx: Add some Ethernet DMA initialization logic. 2017-12-27 13:54:59 -06:00
Gregory Nutt
cb9e1e7716 arch/arm/src/lpc54xx: Add some Ethernet PHY initialization logic. 2017-12-27 12:01:24 -06:00
Gregory Nutt
31330b2479 arch/arm/src/lpc54xx: Add a little -- very little -- Ethernet initialization logic. 2017-12-26 16:30:57 -06:00
Gregory Nutt
f5c5f89592 arch/arm/src/lpc54xx: Add (incomplete) Ethernet register definition file. Add framework for an Ethernet driver. Initial commit is just the drivers/skeleton.c with naming updated for the LPC54. 2017-12-26 12:55:58 -06:00
Gregory Nutt
edef041f93 arch/arm/src/lpc54xx: Add support for a random number generator. 2017-12-26 10:20:41 -06:00
Gregory Nutt
0b91074850 arch/arm/src/lpc54xx: Add an RTC driver and a RTC character driver lower half. configs/lpcxpresso-lpc54628: Add logic to register the RTC character driver if it is enabled. Enable the RTC and RTC character driver in the NSH configuration. 2017-12-25 13:56:06 -06:00
Gregory Nutt
7e7bdd181f Cosmetic fixes to comments, README, and other trivial corrections. 2017-12-25 10:45:47 -06:00
Gregory Nutt
458f9f4e67 arch/arm/src/lpc54xx: More WDT-related changes. 2017-12-24 15:40:46 -06:00
Gregory Nutt
3119629ff0 arch/arm/src/lpc54xx: Bring in WWDT driver from LPC43. 2017-12-24 15:00:20 -06:00
Gregory Nutt
382989a1b9 arch/arm/src/lpc54xx: DMA driver is code compelete. Untested and still needs more review. 2017-12-24 14:28:39 -06:00
Gregory Nutt
321c524c5f arch/arm/src/lpc54xx: Add DMA register definition file and skeletal DMA driver. The initial commit of the DMA driver is simply the LPC43xx GPDMA driver with name changes and all all register access removed. 2017-12-24 10:55:46 -06:00
Gregory Nutt
7ce881051a lpc43/lpc54 SDMMC: Add missing test for response errors in interrupt handler. 2017-12-23 18:13:53 -06:00
Gregory Nutt
0a5d9af33c lpc43/54 SDMMC: Remove some useless code. lpc54: Fix typos in the IOCON register definition file. Lpcxpresso-Lpc54628: Fix typols in board.h file 2017-12-23 14:25:21 -06:00
Gregory Nutt
b329b8c1e4 Squashed commit of the following:
lpc43/54 SDMMC:  Wading through bits trying to make sense out of what is a event want interrupt which deal mostly with commands+responses and what is a data transfer event.  DTO is the only wildcard.  I think this clear now but DMA transfers will fail with CRC error.
    lpc43/54 SDMMC:  DTO is a wait event, not a transfer event.
    lpc43/54 SDMMC:  Significant simplication to previous design.  More debug output.
    lpc43/54 SDMMC:  Don't allow duplicate events in waitmask and xfrmask.
    lpc43/54 SDMMC:  Not all interrupts were being disabled at the end of a transfer.
    lpc43/54 SDMMC:  Defer enabling DMA transfer interrupts until after command has been sent.
2017-12-23 11:42:04 -06:00
Gregory Nutt
6fa734457d lpc43/lpc54 SDMDC: Don't enable internal DMA in the control register if not doing internal DMA. Clear pending DMA-related interrupts before enabling them. 2017-12-22 15:16:14 -06:00
Gregory Nutt
1117a6e8ce Revert "lpc43xx and lpc54xx: No handling the wide bus MMC/SD interface correctly."
This reverts commit 4d6bf46480.
2017-12-22 14:39:59 -06:00
Gregory Nutt
9994bacf7e Revert "Fix some missing semicolons in conditional logic of last commit."
This reverts commit f0d36ebf1f.
2017-12-22 14:39:47 -06:00
Alan Carvalho de Assis
fa234a7026 configs/bambino-200e: Add LPC43 SDMMC board support to Bambino-200E and fix errors/warns 2017-12-22 12:30:36 -06:00
Gregory Nutt
f0d36ebf1f Fix some missing semicolons in conditional logic of last commit. 2017-12-22 12:28:17 -06:00
Gregory Nutt
4d6bf46480 lpc43xx and lpc54xx: No handling the wide bus MMC/SD interface correctly. 2017-12-22 11:59:45 -06:00
Gregory Nutt
bfb3eb38be LPC54/43: SDMMC driver: Need to disable DMA interrupts at completion of DMA. 2017-12-22 11:03:54 -06:00
Alan Carvalho de Assis
3ce21c5fe1 arch/arm/src/lpc43xx: Fix some small issues on LPC43 SDMMC driver 2017-12-22 10:23:09 -06:00
Gregory Nutt
6ed875a63b Leverage the LPC54xx back to the LPC43xx (where it came from originally)
Squashed commit of the following:

    arch/arm/src/lpc43xx:  SDMMC driver now builds for the LPC43 (provided that the proper definitions appear in the board.h file).
    arch/arm/src/lpc43xx:  Update basic changes to the ported lpc54xx driver for lpc43xx clocking and GPIOs.
    arch/arm/src/lpc43xx:  Brings in the LPC54xx SD/MMC driver with absolutely no changes other than changing all occurences of 54 to 43.
    arm/arm/src/lpc43xx:  Add build support for the lpc54 SDMMC driver.
    lpc54 SDMMC:  Check for successful data transfer last.  Checking first means that we miss errors.
2017-12-22 08:16:19 -06:00
Gregory Nutt
7add46bab5 lpc54 SDMMC. Some trivial naming improvements. 2017-12-22 07:19:13 -06:00
Michael Jung
cd48087c58 arch/arm/src/arm/up_cache.S: Fix cp15_invalidate_dcache. In cases where more than one dcache line was to be invalidated, a missing branch label would result in a false branch target into cp15_flush_idcache. Also the .size macro was fixed for both cp15_invalidate_dcache. 2017-12-22 06:54:37 -06:00
Gregory Nutt
c431177c0f LPC54xx: Update a README; fix a error in a DEBUGASSERTION in the SDMMC driver. 2017-12-21 12:19:15 -06:00
Gregory Nutt
d9f58fad39 Which these changes DMA now works on the LPC54xx
Squashed commit of the following:

    arch/arm/src/lpc54xx:  SDMMC fixes.. DMA should not be enabled on non-DMA transfers, the burst setting in FIFOTH is supposed to match the burst setting in the BMOD reseters, Add DMA error interrupt support.
    arch/arm/src/lpc54xx:  Mostly costmetic changes to the SDMMC driver.
2017-12-21 09:35:36 -06:00
Masayuki Ishikawa
4e64e6b3c3 Merged in masayuki2009/nuttx.nuttx/smp_fixes (pull request #561)
SMP fixes

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2017-12-21 12:31:04 +00:00
Gintaras Drukteinis
52fccefe4f arch/arm/src/lpc43xx: Add Windowed Watchdog Timer (WWDT) driver. Tested on LPC4357 but should be
compatible for all LPC43xx MCUs.
2017-12-21 06:23:48 -06:00
Masatoshi.Tateishi
5414d68161 arch/arm/src/lc823450: Add SP_DMB() into lc823450_testset.c
In lc823450, ldrex and strex are not supported. So we implemented
up_testset() with H/W Mutex. However, there was a bug in memory
access order. This change ensures correct memory access order in
up_testset() for lc823450.

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2017-12-21 17:39:19 +09:00
Gregory Nutt
b26c70b11f arch/arm/src/lkpc54xx: In SDMMC driver, fix an error which was clobbering the interrupt mask register (xfrmask). Also, add a kludge for the missing DTO interrupt. 2017-12-20 18:39:10 -06:00
Gregory Nutt
eef12f1f91 arch/arm/src/lpc54xx: In SDMMC driver, add logic to transfer data when TXDR or RXDR interrupts occur. Also, add logic to set the RX watermark to 2 when receiving short, non-DMA data transfers. 2017-12-20 17:27:52 -06:00
Gregory Nutt
8938550072 arch/arm/src/lpc54xx: In SDMMC driver, don't do DMA if the entire transfer will fit in the FIFO. 2017-12-20 14:38:09 -06:00