Commit Graph

19919 Commits

Author SHA1 Message Date
Xiang Xiao
27a7ff41b5 Fix Error: chip/lpc54_serial.c:1199:24: error: use of logical '&&' with constant operand
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-11-06 21:18:31 +01:00
Xiang Xiao
69dea8d329 Fix Error: chip/lpc43_usb0dev.c:905:20: error: unused function 'lpc43_abortrequest'
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-11-06 21:18:31 +01:00
Xiang Xiao
6063749a3c Fix Error: chip/lpc43_usb0dev.c:905:20: error: unused function 'lpc43_abortrequest'
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-11-06 21:18:31 +01:00
Xiang Xiao
7c88ef1e6a Fix lc823450_i2s.c:277:7: error: variable 'n' is used uninitialized whenever switch default is taken
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-11-06 21:18:31 +01:00
Xiang Xiao
bc04edecc1 Fix undefined reference to tmp' in function load_kernel.constprop.0':
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-11-06 21:18:31 +01:00
Xiang Xiao
206e2a8eec arm/lc823450: Fix error: unknown pragma ignored
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-11-06 21:18:31 +01:00
Xiang Xiao
819eeefc60 Fix chip/lc823450_sdc.c:282:33: error: format specifies type 'long' but the argument has type 'uint32_t' (aka 'unsigned int')
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-11-06 21:18:31 +01:00
Xiang Xiao
fbd886deb5 arch/arm: Fix types.h:61:9: error: unknown type name '__UINT32_TYPE__'
regressed by: https://github.com/apache/incubator-nuttx/pull/7476

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-11-06 07:14:39 +01:00
Eero Nurkkala
b7d2b38700 risc-v/mpfs: opensbi: fix random boot failures
After the commit b8b541f, the system would not start up properly
with certain coldboot conditions. For example, if the OpenSBI picked
hart4 as the coldboot hart in preference to hart3, the system would
get stuck due to stack corruption. OpenSBI uses a lottery mechanism
to pick the coldboot hart.

Also fix g_scratches area in such a manner than it will not get
initialized to zero. If several harts initialize the area to zero, there's
danger the stack pointer gets wiped out.

Now any coldboot hart works.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-11-05 00:37:51 +08:00
Tiago Medicci Serrano
20d8a55181 esp32/i2s: replace nxsem when used as a lock to nxmutex 2022-11-05 00:37:00 +08:00
Tiago Medicci Serrano
9ecc345c02 esp32/i2s: use internal buffer to handle multiple audio formats 2022-11-05 00:37:00 +08:00
Ville Juven
e239cd942e mpfs/mpfs_mm_init: Fix the section align mask checks
The boundary-1 mask needs to be tested, not the alignment boundary
2022-11-04 23:03:10 +08:00
anjiahao
be670c40d6 fix a mistake about nxmutex & sem
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2022-11-03 23:42:55 +08:00
chao an
b8d7194e66 renesas/rx65n: ram lock should in pair
Signed-off-by: chao an <anchao@xiaomi.com>
2022-11-03 14:43:12 +01:00
Xiang Xiao
116ba80ad5 Fix lpc17_40_spi.c:341:12: error: variable 'regval' set but not use
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-11-03 14:41:14 +01:00
Xiang Xiao
923c779c83 Fix lpc17_40_serial.c:935:20: error: unused function 'lpc17_40_uart3config'
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-11-03 14:41:14 +01:00
raiden00pl
ef517ed05c stm32/stm32_adc.c fix clang warning
chip/stm32_adc.c:2529:32: warning: shifting a negative signed value is undefined [-Wshift-negative-value]
setbits = ADC_CCR_DUAL_IND | ADC_CCR_DELAY(0) | ADC_CCR_MDMA_DISABLED |
^~~~~~~~~~~~~~~~
2022-11-03 10:15:39 -03:00
yinshengkai
85f727f232 tools: replace INCDIR to Makefile variable
In the past, header file paths were generated by the incdir command
Now they are generated by concatenating environment variables

In this way, when executing makefile, no shell command will be executed,
it will improve the speed of executing makfile
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2022-11-03 19:59:55 +08:00
zhangyuan21
cdeddcb028 arch/armv7-ar: add isb after CACHE and TLB operations. 2022-11-03 19:49:24 +08:00
Eero Nurkkala
3afc83abc7 risc-v/mpfs: ihc: reorganize ihc
Currently the IHC (Inter Hart Communication) depends on OpenAMP and
rptun.  However, the bootloader portion of the IHC doesn't need
either of them.  Now they are wasting a lot of bootloader space.

Reorganize the bootloader portion into a separate file 'mpfs_ihc_sbi.c'.
This file contains the OpenSBI vendor extensions, or the only required
functionalities for the bootloader.  On the other hand, 'mpfs_ihc.c'
contains the non-bootloader code.

This patch also makes it possible to utilize 2 RPMSG channels.  This
has been tested so that 2 separate NuttXs on harts 1 and 2 communicate
with Linux kernel that runs on harts 3 and 4.

New configuration files are added as well:
  - rpmsg-ch1:  sample config for RPMSG
  - rpmsg-ch2:  sample config for another RPMSG channel
  - rpmsg-sbi:  sample bootloader config for RPMSG/OpenSBI

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-11-02 21:44:52 +08:00
Eero Nurkkala
e50db35dc4 Revert "mpfs/mpfs_ddr.c: Stop the DDR training once it is completed"
This reverts commit ea9144bda8.

The commit made Icicle MPFS DDR useless. Revert the change for now.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-11-02 21:44:52 +08:00
Gustavo Henrique Nihei
f5c77933cb arch: Fix linking of multiple preprocessed linker script files
Only the last item from the ARCHSCRIPT list was being suffixed with
".tmp".

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-11-02 09:15:27 +08:00
Xiang Xiao
12926ee864 arch/arm: Document the clever trick of PRI?32 macros
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-11-01 23:11:16 +01:00
Xiang Xiao
93895c42a7 arch/arm: Typedef _[u]int32_t to __[U]INT32_TYPE__
if __INT32_TYPE__ is defined

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-11-01 19:58:20 +01:00
Xiang Xiao
4578df5cbb Fix lpc17_40_serial.c:705:24: error: unused function 'lpc17_40_uartcclkdiv'
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-11-01 17:12:42 +01:00
Xiang Xiao
7daacec1fa Fix lpc17_40_serial.c:510:20: error: unused function 'up_restoreuartint'
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-11-01 17:12:42 +01:00
Xiang Xiao
5948dc8c8f Fix lpc17_40_sdcard.c:614:24: error: unused function 'lpc17_40_getpwrctrl'
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-11-01 17:12:42 +01:00
Xiang Xiao
09997c6546 Fix lpc17_40_serial.c:814:20: error: unused function 'lpc17_40_uart0config'
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-11-01 17:12:42 +01:00
Xiang Xiao
ae9ff3bc67 Fix lpc176x_clockconfig.c:213:16: error: variable 'regval' set but not used
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-11-01 17:12:42 +01:00
zhangyuan21
b118083c35 arch_timer: adjust timer/arch_timer to support tick
Enable CONFIG_SCHED_TICKLESS_TICK_ARGUMENT in tickless mode
to improve the performance.
2022-11-01 21:53:08 +08:00
Fotis Panagiotopoulos
189aa0292f arm: Added breakpoint in stack overflow trap. 2022-11-01 21:42:25 +08:00
SPRESENSE
3379fc96fc arm/backtrace_sp: fix build warning
common/arm_backtrace_sp.c: In function 'up_backtrace':
common/arm_backtrace_sp.c:253:15: warning: assignment to 'long unsigned int' from 'uint8_t *' {aka 'unsigned char *'} makes integer from pointer without a cast [-Wint-conversion]
  253 |           top = g_intstacktop;
      |
2022-11-01 13:49:56 +01:00
Fotis Panagiotopoulos
e89432b563 Added DHCSR definitions for ARMv7 & ARMv8. 2022-11-01 09:22:07 +08:00
Xiang Xiao
3e3364d1a9 Fix the format string mismatch warning
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-10-31 11:20:56 +01:00
zhangyuan21
18266c1012 nuttx/sched: use pid to check idle task
Pid is more appropriate than the flink pointer to determine idle task,
when we want to use other data structure to optimize the task list.
2022-10-31 17:53:08 +09:00
Julian Oes
227218659b stm32h7: Add missing time.h include
This is required for me when building within CLion.

Without it, I get the error:

error: field 'lastwrite' has incomplete type
2022-10-31 10:22:27 +08:00
Xiang Xiao
5d7f1d5020 Fix chip/stm32_sdio.c:749:24: error: unused function 'stm32_getpwrctrl' [-Werror,-Wunused-function]
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-10-30 16:03:35 +01:00
Xiang Xiao
940ee2c8b1 Fix Error: chip/efm32_clockconfig.c:109:20: error: unused function 'efm32_synchronize' [-Werror,-Wunused-function]
static inline void efm32_synchronize(uint32_t bitset)
                   ^
Error: chip/efm32_clockconfig.c:185:20: error: unused function 'efm32_enable_auxhfrco' [-Werror,-Wunused-function]
static inline void efm32_enable_auxhfrco(void)

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-10-30 16:03:35 +01:00
Xiang Xiao
c6ae5e42c0 Fix chip/cxd56_farapi.c:285:14: error: format specifies type 'int' but the argument has type 'unsigned long' [-Werror,-Wformat]
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-10-30 16:03:35 +01:00
Xiang Xiao
7ad74c413a Fix chip/cxd56_icc.c:498:18: error: overlapping comparisons always evaluate to false [-Werror,-Wtautological-overlap-compare]
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-10-30 16:03:35 +01:00
Xiang Xiao
eeefc4a516 Fix chip/cxd56_usbdev.c:675:20: error: unused function 'cxd56_iscableconnected' [-Werror,-Wunused-function]
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-10-30 16:03:35 +01:00
Xiang Xiao
c701d1c6ec Fix error: variable 'lfbclk' is used uninitialized whenever switch case is taken [-Werror,-Wsometimes-uninitialized]
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-10-30 16:03:35 +01:00
Xiang Xiao
d1a3f5e47f arch/arm: Replace xxx_[bus|usage]fault with arm_[bus|usage]fault
to fix the following clang warning:
Error: chip/eoss3_irq.c:138:47: error: format specifies type 'unsigned int' but the argument has type 'uint32_t' (aka 'unsigned long') [-Werror,-Wformat]
  _err("PANIC!!! Bus fault received: %08x\n", getreg32(NVIC_CFAULTS));
                                     ~~~~     ^~~~~~~~~~~~~~~~~~~~~~
                                     %08lx
/github/workspace/sources/nuttx/include/debug.h:126:57: note: expanded from macro '_err'
   __arch_syslog(LOG_ERR, EXTRA_FMT format EXTRA_ARG, ##__VA_ARGS__)
                                    ~~~~~~              ^~~~~~~~~~~
/github/workspace/sources/nuttx/arch/arm/src/common/arm_internal.h:134:24: note: expanded from macro 'getreg32'
                       ^~~~~~~~~~~~~~~~~~~~~~~~~~~
Error: chip/eoss3_irq.c:146:49: error: format specifies type 'unsigned int' but the argument has type 'uint32_t' (aka 'unsigned long') [-Werror,-Wformat]
  _err("PANIC!!! Usage fault received: %08x\n", getreg32(NVIC_CFAULTS));
                                       ~~~~     ^~~~~~~~~~~~~~~~~~~~~~
                                       %08lx

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-10-30 16:03:35 +01:00
Xiang Xiao
ad35572751 Fix Error: chip/gd32f4xx_spi.c:924:20: error: unused function 'spi_putreg16' [-Werror,-Wunused-function]
static inline void spi_putreg16(struct gd32_spidev_s *priv,
                   ^
Error: chip/gd32f4xx_spi.c:945:23: error: unused function 'spi_getreg8' [-Werror,-Wunused-function]
static inline uint8_t spi_getreg8(struct gd32_spidev_s *priv,
                      ^
Error: chip/gd32f4xx_spi.c:967:20: error: unused function 'spi_putreg8' [-Werror,-Wunused-function]
static inline void spi_putreg8(struct gd32_spidev_s *priv,

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-10-30 16:03:35 +01:00
Xiang Xiao
202408c6e7 Fix gd32f4xx_syscfg.c:137:5: error: variable 'regaddr' is used uninitialized whenever switch default is taken [-Werror,-Wsometimes-uninitialized]
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-10-30 16:03:35 +01:00
Xiang Xiao
513904d1df Fix gd32f4xx_dma.c:223:26: error: unused function 'gd32_dma_channel_get' [-Werror,-Wunused-function]
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-10-30 16:03:35 +01:00
anjiahao
d7b4e91dda Call nxsem_destroy or nxmutex_destry in the error path
1.Don't check the return value of nxsem_init or nxmutex_init
2.Fix some style issue

Signed-off-by: anjiahao <anjiahao@xiaomi.com>
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-10-30 13:56:52 +01:00
Roberto Bucher
944bb6164d Files for pysimCoder on nucleo-h743zi2 2022-10-29 18:03:37 -03:00
Roberto Bucher
793f37c007 Files for pysimCoder on nucleo-h743zi2 2022-10-29 18:03:37 -03:00
Xiang Xiao
b607f80cf3 arch: Remove the unnecessary nosanitize_address from backtrace source code
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-10-29 08:26:04 +02:00
Jukka Laitinen
b2e239784f arch/risc-v/src/mpfs/hardware/mpfs250t_484_pinmap.h: Lower the default drive strength for MSSIO GPIOS
The default drive strength was way too high for normal GPIO usage, causing overshoots & clitches

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2022-10-28 22:42:17 +08:00
Jukka Laitinen
67a60d77dd arch/risc-v/src/mpfs: Add a configuration flag for SD-card card detect line
Make existence of the card detect line configurable

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2022-10-28 22:42:05 +08:00
zouboan
868de3ca4b arch/sparc add initial support for S698PM 2022-10-28 17:26:24 +09:00
zouboan
b3ff4ce301 arch/sparc change common file to support SMP 2022-10-28 17:26:24 +09:00
chao an
a8d3286258 net: move device buffer define to common header
Signed-off-by: chao an <anchao@xiaomi.com>
2022-10-28 00:32:16 -04:00
Gustavo Henrique Nihei
2a20db7697 xtensa: Define COMMON_CTX_REGS for chips without FPU (e.g. ESP32-S2)
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-10-27 23:28:47 +08:00
anjiahao
2156a102cf fix bl602 i2c sem init mistake
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2022-10-27 21:21:01 +08:00
Gustavo Henrique Nihei
facdd4f2b9 esp32[-s2/-s3/-c3]: Re-sort SPI Flash configs
- Reduce "SPI Flash configuration" menu dependency on SPI Flash driver
  just to MTD-related configs.
- Move SPI Flash Mode and Frequency configs to SPI Flash configuration
  menu.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-10-27 10:07:40 +08:00
Tiago Medicci Serrano
0bf7afad25 xtensa/esp32: add i2s_mclkfrequency to set master clock on I2S 2022-10-27 00:09:01 +08:00
Xiang Xiao
739210708a arch: Replace __builtin_bswapxx with bswapxx
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-10-25 20:24:19 -03:00
David Sidrane
f3256e5668 stm32fh7:Allow the use of the Network Monitor via polling
Not all boards have an interrupt line from the phy to
   the Soc. This commit allows the phy to be polled for
   link status.

   This may not work on all MAC/PHY combination that
   have mutually exclusive link management and operating
   modes. The STM32H7 and LAN8742AI do not have such a
   limitation.

Fix typos
2022-10-25 21:52:14 +08:00
Petro Karashchenko
4c71075ea5 arch/arm/stm32h7: multiple fixes for stm32h7 flash interface
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-10-25 05:37:08 -04:00
chao an
86e3bd9d75 arm/toolchain: update toolchain comment to avoid confusion
1. add 'ARM' prefix to choice menu
2. rename 'Generic Clang toolchain' to 'LLVM Clang toolchain'
   to avoid confuse with CONFIG_ARM_TOOLCHAIN_ARMCLANG

Signed-off-by: chao an <anchao@xiaomi.com>
2022-10-25 12:33:46 +08:00
chao an
9804320cae arm/armv6-m: fix build break if enable syntax unified
armv6-m/arm_exception.S: Assembler messages:
armv6-m/arm_exception.S:171: Error: cannot honor width suffix -- `lsl r7,r7,#2'

Signed-off-by: chao an <anchao@xiaomi.com>
2022-10-25 12:32:06 +08:00
chao an
09cc29af4d arch/armv6-m: fix compile error on LLVM clang
armv6-m/arm_exception.S:139:2: error: invalid instruction, any one of the following would fix this:
 sub r1, #(4 * (10))
 ^
armv6-m/arm_exception.S:139:2: note: instruction requires: thumb2
 sub r1, #(4 * (10))
 ^
armv6-m/arm_exception.S:139:10: note: invalid operand for instruction
 sub r1, #(4 * (10))
         ^
armv6-m/arm_exception.S:139:2: note: no flag-preserving variant of this instruction available
 sub r1, #(4 * (10))
 ^
armv6-m/arm_exception.S:139:10: note: operand must be a register in range [r0, r7]
 sub r1, #(4 * (10))
         ^
-----------------------------------------

bringup.c:125:18: warning: variable 'ret' is uninitialized when used here [-Wuninitialized]
          return ret;
                 ^~~
bringup.c:73:10: note: initialize the variable 'ret' to silence this warning
  int ret;
         ^
          = 0

Signed-off-by: chao an <anchao@xiaomi.com>
2022-10-25 00:52:00 +08:00
chao an
539f9a862e arm/cache: fix build warning on LLVM clang
armv7-m/arm_cache.c:93:24: warning: unused function 'arm_clz' [-Wunused-function]
static inline uint32_t arm_clz(unsigned int value)
                       ^

Signed-off-by: chao an <anchao@xiaomi.com>
2022-10-24 23:37:30 +08:00
chao an
c629fd1b00 arm/phy62xx: fix compile warning ('while' clause does not guard)
chip/flash.c: In function '_spif_read_status_reg_x':
chip/flash.c:46:9: warning: this 'while' clause does not guard... [-Wmisleading-indentation]
   46 |         while ((AP_SPIF->fcmd &0x02)==0x02);         \
      |         ^~~~~
chip/flash.c:128:3: note: in expansion of macro 'SPIF_STATUS_WAIT_IDLE'
  128 |   SPIF_STATUS_WAIT_IDLE(SPIF_WAIT_IDLE_CYC);
      |   ^~~~~~~~~~~~~~~~~~~~~

Signed-off-by: chao an <anchao@xiaomi.com>
2022-10-24 20:23:59 +08:00
SPRESENSE
a4df3c0330 arch: cxd56xx: Fix deadlock by using GNSS CEP file on SPI-Flash
If you specify a file path on SPI-Flash in CONFIG_CXD56_GNSS_CEP_FILENAME,
it causes a deadlock issue in the inter-CPU communication. To resolve it,
introduce a new CONFIG_CXD56_GNSS_CEP_ON_SPIFLASH and then use pre-read
buffers during checking CEP file. So this needs the large of free memory.
2022-10-24 19:19:44 +08:00
SPRESENSE
22a29fdc97 arch: cxd56xx: Fix stall bulk xfer when sending 512 byte data
Remove hardware zero length packet enhancement because of driver
logic already processed the ZLP correctly. It is unnecessary and cause
of IN interrupt lost.
2022-10-24 09:02:39 +02:00
Petro Karashchenko
a74dddd2ff arch/risc-v/src/mpfs/hardware: fix alignment in comment
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-10-24 12:59:24 +08:00
Xiang Xiao
4aad964d48 Fix sam4s_nand.c:152:3: error: this 'while' clause does not guard... [-Werror=misleading-indentation]
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-10-23 22:44:35 +02:00
raiden00pl
f1277a2233 stm32/socketcan: fix the EFF flag for received frames 2022-10-22 17:28:55 +08:00
Tiago Medicci Serrano
16b99ee013 xtensa/esp32s2: add initial support for I2S
Add initial support for the I2S peripheral on ESP32S2.
Add I2S character driver and generic I2S audio driver.
Include i2schar defconfig for ESP32-S2-Saola-1 board.
2022-10-22 15:18:35 +08:00
anjiahao
e1ca516488 use SEM_INITIALIZER inside of NXSEM_INITIALIZER
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2022-10-22 14:50:48 +08:00
anjiahao
5724c6b2e4 sem:remove sem default protocl
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2022-10-22 14:50:48 +08:00
Michael Jung
ec3805721c armv8-m: Fix MPU Region Limit Address config
On armv8-m the MPU region limits are inclusive.  Thus, we must substract
one byte of size from (base + limit).

Signed-off-by: Michael Jung <michael.jung@secore.ly>
2022-10-21 16:23:49 -03:00
Michael Jung
d4cbb4f5b8 armv8-m: Fix MPU Attribute Indirection reg offsets
Both MPU_MAIR0 and MPU_MAIR1 were off by 0x10.

Signed-off-by: Michael Jung <michael.jung@secore.ly>
2022-10-21 16:23:49 -03:00
raiden00pl
36ae5316b7 include/nuttx/can.h: make error definitions compatible with Linux 2022-10-21 18:47:29 +08:00
Zhe Weng
4ac44bc8b5 arch/sim: fix MTU mismatch on TAP device in host route mode
In host route mode (bridge mode disabled), the d_pktsize of TAP device is not initialized and will be set to CONFIG_NET_ETH_PKTSIZE in netdev_register, while the MTU on host side keeps at 1500. Input packets larger than CONFIG_NET_ETH_PKTSIZE will be dropped because 'IP packet shorter than length in IP header'.
This patch fix this issue by reading MTU from host side and set as d_pktsize, just the same as what is done in bridge mode.

Signed-off-by: Zhe Weng <wengzhe@xiaomi.com>
2022-10-21 16:57:36 +08:00
xiangdong6
924c3d8b5f arch/armv7-r: Fix armclang build warning: L6306W
When a function is known to preserve eight-byte alignment of the stack, armclang assigns the build
attribute Tag_ABI_align_preserved to that function. However, the armclang integrated assembler does
not automatically assign this attribute to assembly code.

Signed-off-by: xiangdong6 <xiangdong6@xiaomi.com>
2022-10-21 13:58:23 +08:00
Gustavo Henrique Nihei
ae8ea29379 xtensa: Save SCOMPARE1 on context switches
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-10-21 11:10:51 +08:00
Xiang Xiao
942513cd37 time: Typedef time_t to int64_t if CONFIG_SYSTEM_TIME64 is defined
to handle 2038 problem correctly

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-10-20 22:17:52 +02:00
SPRESENSE
0d87694024 arch: cxd56xx: Fix duplicate definitions in battery_ioctl.h
Fix duplicate definitions of arch/arm/include/cxd56xx/battery_ioctl.h
with include/nuttx/power/battery_ioctl.h.
2022-10-20 21:49:07 +02:00
SPRESENSE
2060f7be60 arch: cxd56xx: hostif: Remove -Wformat-truncation warnings
Remove -Wformat-truncation warnings in cxd56_hostif.c.
2022-10-20 21:49:07 +02:00
SPRESENSE
52cbfcf3bd arch: cxd56xx: Remove -Wmissing-braces warning
Remove -Wmissing-braces warning in cxd56_cpu1signal.c.
2022-10-20 21:49:07 +02:00
SPRESENSE
d3ed469f00 arch: cxd56xx: Fix compile warning in cxd56_pwm.c 2022-10-20 21:49:07 +02:00
Javier Casas
663bf4d968 Add support for stm32h7b3xx MCU's flash 2022-10-21 01:37:23 +08:00
Alan Carvalho de Assis
0e4c2fed93 esp32s2: Add DMA support to SPI 2022-10-20 10:11:26 +08:00
Alan Carvalho de Assis
a0a7375911 Fix esp32s2_spi.h offset 2022-10-20 10:11:26 +08:00
Lucas Saavedra Vaz
b0f96fc204 esp32/i2c: Add macros to conform with other peripherals and fix typos
Fix coding style

Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-10-19 20:31:29 -03:00
Hidenori Matsubayashi
544552c305 arch/arm64/arm64_arch_timer: delete unused includes
Delete unnecessary includes.

Signed-off-by: Hidenori Matsubayashi <hidenori.matsubayashi@gmail.com>
2022-10-19 23:15:00 +02:00
Lucas Saavedra Vaz
cc04e2137a esp32/i2s: Reduce MCLK multiple to support existing boards 2022-10-20 00:40:24 +08:00
raiden00pl
a3db5fe24b stm32f7: add SocketCAN support 2022-10-20 00:08:36 +08:00
SPRESENSE
c48feac0e9 arch: cxd56xx: gnss: Fix compile error
Fix a compile error caused by
d1d4633 Replace nxsem API when used as a lock with nxmutex API
2022-10-19 14:10:51 +02:00
Fotis Panagiotopoulos
f9fd53cda1 gmtimer: Fixed range of tm_yday. 2022-10-19 12:39:04 +08:00
Xiang Xiao
774648de0f risc0v/bl602: Call kthread_create instead of nxtask_create in bl_os_task_create
since the kernel component should use the kernel thread instead the normal task

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-10-19 08:22:56 +09:00
raiden00pl
27db9558de stm32/socketcan: fixes for arm_netinitialize 2022-10-18 15:35:21 -03:00
Xiang Xiao
d200cacc49 arch/armv7-r: Fix typo error in commit 4fab2b9501
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-10-18 10:31:07 -03:00
Xiang Xiao
6b31918b42 Remove the unnecessary cast for main_t, NULL and argv
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-10-18 08:51:45 +02:00
Zhe Weng
d8f35cf1b6 arch/sim: calling txdone callback after devif_loopback in netdriver
When devif_loopback handles a packet (like a ping targeting at this dev), it does not call the txdone callback, breaking the tx pipeline and may left some packets unhandled, delayed until next transmit on the network interface.

Signed-off-by: Zhe Weng <wengzhe@xiaomi.com>
2022-10-18 11:16:33 +08:00
Zhe Weng
cb25a9dee3 arch/sim: change g_avail_work and g_recv_work to array in netdriver
Share one worker between multiple simulated network devices may work most of the time, but sometimes breaks the tx pipeline when sending packets on more than one interface at the same time, and leaves some packets unprocessed in network stack, delayed until next transmit on the network interface. The rx process is likely delayed in packet processing under similar situation, so keep g_avail_work and g_recv_work the same number as interfaces.

dev0 tx1 avail              tx1 done
        v                      v
work dev0 tx1 -> dev0 tx1 -> empty -> dev1 tx2 -> dev1 tx3 -> empty
                    ^                    ^           ^          ^
dev1     tx2 avail (failed to queue)  tx3 avail   tx2 done   tx3 done

Signed-off-by: Zhe Weng <wengzhe@xiaomi.com>
2022-10-18 11:16:33 +08:00
Xiang Xiao
4fab2b9501 arch/armv7-[a|r]: Don't define fiq stack if CONFIG_ARMV7A_DECODEFIQ=n
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-10-18 08:01:52 +09:00
Alan Carvalho de Assis
0e091b2486 esp32_qencoder: Fix small issues and typos reported by Tiago Medicci 2022-10-18 03:03:28 +08:00
zouboan
ba2b37e23f Update arch/sparc/include/spinlock.h
Co-authored-by: Alan Carvalho de Assis <alan.carvalho@espressif.com>
2022-10-18 00:55:30 +08:00
zouboan
d51d109d0a arch/sparc build CMN_SRC in common dir to keep up with other arch 2022-10-18 00:55:30 +08:00
zouboan
9b55b0af63 arch/sparc add support of spinlock for LEON3 and LEON4 2022-10-18 00:55:30 +08:00
anjiahao
dee38ce3e8 arch: Replace critical section with nxmutex in i2c/spi/1wire initialization
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-10-17 15:59:46 +09:00
anjiahao
d1d46335df Replace nxsem API when used as a lock with nxmutex API
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-10-17 15:59:46 +09:00
Alan Carvalho de Assis
655faa33d4 ESP32: Add support to Quadrature Encoder
Reviewed-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-10-17 00:30:53 +02:00
Bernd Walter
947e771c41 fix typo big letter 'o' in hex value for zero. 2022-10-17 02:55:21 +08:00
Hidenori Matsubayashi
ffe8dd39c6 arch/arm64: update for coding style
Replace "unsigned char" with "bool".

Signed-off-by: Hidenori Matsubayashi <hidenori.matsubayashi@gmail.com>
2022-10-16 17:20:14 +08:00
Bernd Walter
432c438c76 Use the correct marcro name for RP2040_UART0_BASE 2022-10-16 11:26:27 +08:00
chao an
4e3aa83706 arm/backtrace_fp: fix build warning
common/arm_backtrace_fp.c: In function 'up_backtrace':
common/arm_backtrace_fp.c:126:23: warning: assignment to 'void *' from 'uintptr_t' {aka 'unsigned int'} makes pointer from integer without a cast [-Wint-conversion]
  126 |           istacklimit = arm_intstack_top();
      |                       ^

Signed-off-by: chao an <anchao@xiaomi.com>
2022-10-15 03:09:55 +08:00
Hidenori Matsubayashi
28180b49d1 arm64: add Cortex-A57 and Cortex-A72 configurations
This change adds the following:
- Rename the board configuration name from qemu-a53 to qemu-v8a.
- Add the configurations for Cortex-A57 and Cortex-A72.

Signed-off-by: Hidenori Matsubayashi <hidenori.matsubayashi@gmail.com>
2022-10-14 09:27:35 +08:00
Hidenori Matsubayashi
06cf41901f arch/arm64: cleanup defconfigs
Use CONFIG_ARCH_CHIP_QEMU instead of CONFIG_ARCH_CHIP_QEMU_A53. This is because these configurations depend on the hardware configuration of qemu (memory map, irq numbers, etc.).

Signed-off-by: Hidenori Matsubayashi <hidenori.matsubayashi@gmail.com>
2022-10-13 19:26:26 +08:00
Alan Carvalho de Assis
c297ecaa5d esp32s2: Add missing ESP32S2 SPIRAM config 2022-10-13 01:41:47 +08:00
zouboan
d3f84ba724 arch/sparc dismiss non-Unicode characters issue 2022-10-12 11:36:14 -03:00
zhangyuan21
7d34ebdd4e armv7-a: add l2 page mapping interface 2022-10-12 22:00:06 +08:00
zhangyuan21
466635a5e0 armv7-a: set normal memory shareable in smp mode 2022-10-12 19:54:09 +08:00
zhangyuan21
750007ded9 sched: use tick count for sched timer expiration 2022-10-12 11:55:46 +08:00
Zhe Weng
7225e44725 arch/sim: support multiple tapdev for sim
Support more than one TAP device for debugging (future) NAT and FORWARD, left WPCAP and VPNKit unchanged (force number to 1).
Although we can support at most 31 interfaces, limit to 8 like CONFIG_TUN_NINTERFACES.

Signed-off-by: wengzhe <wengzhe@xiaomi.com>
2022-10-12 01:57:21 +08:00
chao an
bcdd03cdf3 arm/backtrace: rename arm_backtrace_thumb.c to arm_backtrace_sp.c
1. rename arm_backtrace_thumb.c to arm_backtrace_sp.c
2. use EHABI stack unwinder instead of instruction unwind

Signed-off-by: chao an <anchao@xiaomi.com>
2022-10-12 01:55:48 +08:00
Brennan Ashton
4ce8cf7bdc bl602/dma: Fix possible call of null pointer to function 2022-10-11 14:34:52 +08:00
Xiang Xiao
1cd9fa25cd arm/tlsr82xx: Don't select ARCH_HAVE_BACKTRACE
since it's already selected by ARCH_ARM

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-10-11 00:01:35 +02:00
chao an
24129e4ba7 arm/backtrace: add support for EHABI(Exception Handling ABI) stack unwinder
Reference:
https://github.com/ARM-software/abi-aa/blob/main/ehabi32/ehabi32.rst
https://github.com/ARM-software/abi-aa/releases/download/2022Q1/ehabi32.pdf

Signed-off-by: chao an <anchao@xiaomi.com>
2022-10-11 03:11:37 +08:00
Jukka Laitinen
e793207bb6 arch/risc-v/src/mpfs: Add a config option for enabling L2 cache
Make a separate config flag for enabling L2 cache. This is on by
default when compiling a standalone/bootloader configuration, but
can also be disabled for special cases, such as memory testing

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2022-10-11 00:59:48 +08:00
liangchaozhong
cc426f8539 usrsock:add done flag in usrsock_iovec_do
set done to true if all data in iovec array is copied

Signed-off-by: liangchaozhong <liangchaozhong@xiaomi.com>
2022-10-11 00:57:49 +08:00
Andrés Sánchez Pascual
c28b05efd3 arch: stm32h7: Add support for dual bank flash
memory

Signed-off-by: Andrés Sánchez Pascual <tito97_sp@hotmail.com>
2022-10-10 01:07:45 +08:00
Brennan Ashton
8b7d2d3da4 bl602: Fix bug in lli functionality for dma. 2022-10-09 12:06:15 +02:00
Hidenori Matsubayashi
b0f9241ec1 arch/arm64: update to follow NuttX C Coding Standard
This change moves the static vars to the appropriate place to follow the coding standard. It also adds comments as sections and `static` where necessary.

Signed-off-by: Hidenori Matsubayashi <hidenori.matsubayashi@gmail.com>
2022-10-09 17:38:31 +08:00
Hidenori Matsubayashi
0b03a2316f arch/arm64/qemu/qemu_boot: fix wrong memory size
The default size in QEMU system is 128MB, and the size specified in chip.h is also 128MB. However, the region size for MMU was 512MB, so fixed it.

Signed-off-by: Hidenori Matsubayashi <hidenori.matsubayashi@gmail.com>
2022-10-09 17:18:26 +08:00
Masayuki Ishikawa
cb73e9a67d arch: qemu-rv: Refactor the entry point name for BUILD_KERNEL
Summary:
- This commit refactors the entry point name for BUILD_KERNEL
  to avoid misunderstanding the name

Impact:
- None

Testing:
- Tested with rv-virt:ksmp64

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-10-09 14:08:47 +08:00
Hidenori Matsubayashi
1297c23e7d arch/arm64/arm64_mmu: add mmu_nxrt_config
This change is a refactoring to match the userspace mmu_regions implementation.

Signed-off-by: Hidenori Matsubayashi <hidenori.matsubayashi@gmail.com>
2022-10-09 12:52:40 +09:00
Masayuki Ishikawa
4b6c9915fe arch: qemu-rv: Fix timer and IPI handling for BUILD_KERNEL+SMP
Summary:
- I noticed that the OS timer sometimes proceeds fast when
  a task is scheduled to run on CPUO via IPI.
- Actually, qemu-rv implementation shares supervisor software
  interrupt for both timer and IPI on CPU0.
- This commit fixes this issue.

Impact:
- qemu-rv only

Testing:
- Tested with qemu-6.2

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-10-08 17:19:51 +08:00
Masayuki Ishikawa
4e095d2e90 arch: risc-v: Add SMP support for BUILD_KERNEL
Summary:
- This commit adds SMP support for BUILD_KERNEL

Impact:
- RISC-V: BUILD_KERNEL + SMP only

Testing:
- Tested with rv-virt:ksmp64 (will be added later)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-10-08 09:25:41 +08:00
Ville Juven
0d52b5be56 mpfs_mm_init: Mark the L2 kernel page table as a global mapping
Kernel mappings are global, i.e. they exist in every address environment
2022-10-07 17:26:21 +08:00
Ville Juven
373568f63a mpfs_mm_init.c: Ensure the L3 page table size is large enough
Run-time check for L3 page table size, to ensure it is large enough
to map all of the kernel memory.

NOTE: The check has to be run-time, as KFLASH_SIZE/KSRAM_SIZE are really
linker relocation symbols, and thus cannot be utilized compile-time.
2022-10-07 17:26:21 +08:00
Ville Juven
dbc9a5ffa2 riscv_mmu: Add some basic sanity checks for section boundaries
L3 table maps 2MB of memory, this brings an implicit requirement for
any L3 region to be aligned to 2MB. This commit adds build time sanity
checks to ensure this requirement is met.

For other SvXX architectures the boundary requirement (might be) is
different.
2022-10-07 17:26:21 +08:00
Masayuki Ishikawa
df6bf3e614 arch: risc-v: Introduce RISCV_IPI macro for SMP
Summary:
- This commit introduces RISCV_IPI macro for SMP
- Also, replace RISCV_IRQ_MSOFT with RISCV_IRQ_SOFT
- Remove duplicate irq_attach() from qemu_rv_irq.c

Impact:
- None

Testing:
- Tested with rv-virt:smp64 and maix-bit:smp on QEMU

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-10-07 14:49:29 +08:00
Masayuki Ishikawa
a7bca63b3b arch: qemu-rv: Fix build errors in chip.h for BUILD_KERNEL + SMP
Summary:
- This commit fixes build errors for BUILD_KERNEL + SMP

Impact:
- None

Testing:
- Tested with rv-virt:ksmp64 (will be added later)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-10-05 17:19:13 +08:00
Masayuki Ishikawa
c4901d6f4b arch: risc-v: Introduce g_percpu_spin in riscv_percpu.c
Summary:
- This commit introduces g_percpu_spin to avoid deadlock
  in riscv_percpu.c instead of using the global spinlock.

Impact:
- None

Testing:
- Tested with rv-virt:knsh64 and rv-virt:ksmp64 (will be added later)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-10-05 05:15:38 +02:00
Gustavo Henrique Nihei
73678c4839 xtensa/esp32: Allow allocation of user data in SPI RAM
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-10-04 21:32:42 +02:00
Xiang Xiao
f813fea555 Fix chip/cxd56_gnss.c:2858:7: error: label 'err' used but not defined
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-10-04 20:59:30 +02:00
Brennan Ashton
102c63be9e bl602: Add initial DMA support, including SPI over DMA. 2022-10-03 16:01:30 -03:00
Jukka Laitinen
03bce705d5 arch/risc-v/src/mpfs/mpfs_ethernet.c: Set PHY speed advert after PHY reset
This allows properly using 10/100Mbps also with 1G phy. Some gigabit PHYs
come out of reset with 1G advertisement enabled, causing other devices to
set up link with 1G. If, after this, the link is set to 10/100 on the mpfs,
the link won't work.

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2022-10-03 19:35:30 +02:00
Masayuki Ishikawa
2fa872e304 arch: qemu-rv: Add M-timer handling for BUILD_KERNEL
Summary:
- In RISC-V, BUILD_KERNEL uses S-mode and to use M-mode timer
  we need to handle it by using OpenSBI or self-implementation.
- This commit adds M-timer self-implementation for BUILD_KERNEL.

Impact:
- qemu-rv only

Testing:
- Tested with rv-virt:knsh64 on qemu-6.2

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-10-03 23:26:11 +08:00
Masayuki Ishikawa
b3e300f8e6 arch: qemu-rv: Fix qemu_rv_start_s() for S-mode
Summary:
- I found inappropriate SET_CSR() usage in the function.
- This PR fixes this issue.

Impact:
- None

Testing:
- tested with rv-virt:knsh64

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-10-02 22:32:07 +08:00
Tiago Medicci Serrano
18c715ba92 xtensa/esp32: add initial support for I2S
Add initial support for the I2S peripheral on ESP32.
Add I2S character driver and generic I2S audio driver.
Include i2schar defconfig for ESP32-DevKitC board.
2022-09-30 17:23:17 -03:00
Xiang Xiao
e38248ee08 Return -EINVAL for the internal API
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-09-30 17:54:56 +02:00
Xiang Xiao
bdeaea3742 Remove the unnessary empty line after label
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-09-30 17:54:56 +02:00