Gregory Nutt
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cf3845919b
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Add ioctl to support software triggering of ADC/DAC conversions
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2013-10-25 14:19:09 -06:00 |
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Gregory Nutt
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48bcb3f141
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sam_tc.c: Fix a timer initialization bug
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2013-10-25 10:05:00 -06:00 |
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Gregory Nutt
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dad8aa9781
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SAMA5 ADC+TC: Several updates/fixes from ongoing debug
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2013-10-25 08:46:57 -06:00 |
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Gregory Nutt
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15c2d87fb9
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SAMA5 ADC+TC: Early debug fixes + lots of new debug instrumentation
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2013-10-24 16:50:51 -06:00 |
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Gregory Nutt
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29342298d3
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SAMA5D3x-EK: Add support for app/examples/adc
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2013-10-24 15:39:56 -06:00 |
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Gregory Nutt
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0e74e0fca1
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SAMA5: Add ADC-side of the logic to hook in timer/counter logic needed to drive periodic ADC sampling
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2013-10-24 13:56:23 -06:00 |
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Gregory Nutt
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8710cd4352
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SAMA5: Hook in timer/counter logic so that it can driver periodic ADC sampling
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2013-10-24 12:35:42 -06:00 |
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Gregory Nutt
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9f5b9c20fe
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STM32 PWM and ADC: Add some bits that should have been cleared. From Martin Lederhilger
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2013-10-24 08:27:09 -06:00 |
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Gregory Nutt
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eb648c585b
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Add support for the STM32F207ZE chip. From Martin Lederhilger
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2013-10-24 08:25:05 -06:00 |
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Gregory Nutt
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df0fc71210
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Remove carriage returns from SAMA5 TC files just commited
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2013-10-23 15:39:00 -06:00 |
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Gregory Nutt
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22d7fae119
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SAMA5 Timer/counter library
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2013-10-23 14:53:37 -06:00 |
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Gregory Nutt
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7692af99b6
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STM32 F1 DAM fix from David Sidrane
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2013-10-23 14:05:26 -06:00 |
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Gregory Nutt
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6a4ffaca12
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SAMA5 CAN: Update readme on how to configure CAN
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2013-10-23 11:32:12 -06:00 |
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Gregory Nutt
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13e074c5d4
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Update Changelog
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2013-10-23 09:13:28 -06:00 |
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Gregory Nutt
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856355668c
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SAMA5 CAN: Driver is now code complete but still untested
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2013-10-22 15:47:52 -06:00 |
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Gregory Nutt
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46b0349408
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SAMA5: Beginning of a CAN driver
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2013-10-21 15:52:23 -06:00 |
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Gregory Nutt
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2edc58e383
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SAMA5 CAN: Add register definition file
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2013-10-21 12:22:27 -06:00 |
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Gregory Nutt
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f890af8e53
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SAMA5 TC: Add timer/counter register definition file
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2013-10-20 14:47:02 -06:00 |
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Gregory Nutt
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84973e9956
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SAMA5 TRNG: /dev/random appears to be functional
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2013-10-20 12:08:39 -06:00 |
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Gregory Nutt
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386daa25ca
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SAMA5 TRNG: Add a /dev/random driver based on the SAMA5D3 TRNG peripheral
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2013-10-20 11:38:31 -06:00 |
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Gregory Nutt
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1e2c37c04f
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SAMA5 WDT driver is now functional
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2013-10-20 09:24:30 -06:00 |
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Gregory Nutt
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fe425e18a6
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SAMA5 WDT: Miss watchdog fixes
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2013-10-20 08:24:05 -06:00 |
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Gregory Nutt
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7a1d5866e5
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SAMA5: Initial WDT timer (untested)
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2013-10-19 12:26:47 -06:00 |
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Gregory Nutt
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49b3366eff
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SAMA5: Hook RTC into build system; Finish RTC alarm logic; Verify correct behavior of the basic RTC functionality
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2013-10-19 10:41:20 -06:00 |
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Gregory Nutt
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0a5d287e69
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SAMA5: Add GPBR register definitions
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2013-10-19 10:22:21 -06:00 |
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Gregory Nutt
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d1d9cf4de6
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SAMA5 RTC: Beginning of an RTC driver for the SAMA5
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2013-10-18 16:56:46 -06:00 |
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Gregory Nutt
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0eea9f2ebe
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SAMA5: Add RTC and WDT register definition header files
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2013-10-18 14:47:50 -06:00 |
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Gregory Nutt
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b661ba3e2a
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STM32 DMA Priority: Select the correct default for F1 and other family members
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2013-10-18 14:13:53 -06:00 |
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Gregory Nutt
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1b3127149c
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SAMA5 LCD: Move framebuffers to center of free memory region. That creates a guard band around the framebuffers that gives a little protection from any bad writes into the framebuffer
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2013-10-18 10:11:20 -06:00 |
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Gregory Nutt
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5c3f7f118c
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Add SDIO preflight method
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2013-10-18 08:15:09 -06:00 |
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Gregory Nutt
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fd468d219f
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Changes to stm32_dmacapable interfaces from Mike Smith
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2013-10-18 08:06:23 -06:00 |
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Gregory Nutt
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0c44715f07
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STM32 DMA priority corrections from Mike Smith
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2013-10-18 07:37:24 -06:00 |
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Gregory Nutt
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cda1fd00c7
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Typo fixes for UART7 and UART8 DMA configs. From Mike Smith
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2013-10-18 07:17:55 -06:00 |
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Gregory Nutt
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2d831bc717
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SAMA5 TSD: Fix to prohibit reading samples when not valid
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2013-10-17 17:26:06 -06:00 |
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Gregory Nutt
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8924101566
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STM32 F103C: Correct some errors in pinmapping. From David Sidrane
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2013-10-16 07:26:41 -06:00 |
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Gregory Nutt
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83982f3ef9
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Misc changes to README files; Update SAMA5D3x-EK NxWM configuration to use Calibration instruction messages
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2013-10-14 14:53:38 -06:00 |
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Gregory Nutt
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98ffd096a0
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SAMA5 LCDC: Correct how framebuffer memory was being mapped; Remove options to get framebuffer memory in various. Because of the mapping and aligment requirements, those options really cannot be supported
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2013-10-13 13:08:05 -06:00 |
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Gregory Nutt
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a3bb8d3d94
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SAMA5 LCDC: Move framebuffer to lower memory; I suspect some corruption by interference
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2013-10-13 10:42:14 -06:00 |
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Gregory Nutt
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34557b8c6b
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SAMA5 LCDC: Fixed backlight PWM divider. Backlight no longer flashes
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2013-10-11 17:12:35 -06:00 |
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Gregory Nutt
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1d0e7aaeff
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SAMA5 LCDC: Wait when the LCDC is resynchronizing (SIF); Try start-up parameters from Barebox (this still don't work)
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2013-10-10 18:44:08 -06:00 |
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Gregory Nutt
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57d04d3ff5
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SAMA5 LCDC: Default resolution if now RGB565; Add option to select a different output resolution than the sofware resolution (needs to the 24BPP for this LCD).
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2013-10-10 18:41:42 -06:00 |
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Gregory Nutt
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c79ae66fc2
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SAMA5 LCDC: Move DMA descriptors out of internal SRAM and into SDRAM. I am not completely clear, but it looks like the LCDC cannot support DMA from internal SRAM
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2013-10-10 12:02:41 -06:00 |
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Gregory Nutt
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1dfcee203c
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SAMA5: Allow portions of external memory to be added to the heap instead of the whole thing
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2013-10-10 12:00:32 -06:00 |
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Gregory Nutt
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e4e4912712
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SAMA5 LCDC: Fix a few compilation errors that show up when additional layers are enabled
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2013-10-09 18:46:05 -06:00 |
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Gregory Nutt
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b7f4a51ee2
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SAMA5 LCDC: Few more bug fixes but still not working
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2013-10-09 18:22:21 -06:00 |
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Gregory Nutt
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cc23806fa1
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SAMA5 LCDC: Corrections from first debug sessions. Still a way to go
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2013-10-09 13:21:27 -06:00 |
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Gregory Nutt
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f3a4fc42d7
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SAMA5: LCDC driver incorporated into the build system.
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2013-10-08 15:30:38 -06:00 |
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Gregory Nutt
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3ccbb7a07f
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SAMA5: LCD driver is code complete but untested
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2013-10-08 12:16:30 -06:00 |
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Gregory Nutt
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3fd7f4f855
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SAMA5: More LCDC driver progress
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2013-10-08 08:57:48 -06:00 |
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Gregory Nutt
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f6dc32c30c
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SAMA5: More LCDC driver progress
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2013-10-07 15:54:08 -06:00 |
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