Commit Graph

12579 Commits

Author SHA1 Message Date
Jukka Laitinen
f9a886f8b7 arch/arm/src/stm32h7/stm32_flash.c: Lock flash option register
If the flash option register was locked before modifying it, return
it to the locked state after modify.

Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-14 17:27:49 -06:00
Nathan Hartman
8d985819b3 Fix typos
Comments only. No functional changes.
2020-05-14 10:49:44 -06:00
Gregory Nutt
801b9d6e5f arch/arm: Remove support for old redundant toolchains.
Remove support for the Codesourcery, Atollic, DevKitArm, Raisonance, and CodeRed toolchains.  Not only are these tools old and no longer used but they are all equivalent to standard ARM EABI toolchains.  Retaining specific support has no effect (they are still supported, but now just as generic EABI toolchains).
2020-05-13 18:41:10 +01:00
Jukka Laitinen
e989147119 arch/arm/src/stm32h7: Add support for spi simplex configurations
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-13 07:29:14 -06:00
Jukka Laitinen
574b2593e6 arch/arm/src/stm32h7/stm32_spi.c: Correct the dmacapable check
First, configure the dmacfg in spi_dmarxsetup and spi_dmatxsetup. Then,
check for dmacapable, and only after that set up the dma.

This way the dmacapable actually works, and we don't need to initialize
the dmacfg structures twice.

Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-13 07:29:14 -06:00
Jukka Laitinen
d1c406d65d arch/arm/src/stm32h7/stm32_spi.c: Correct cache flush
When starting dma transfer, the dcache for the TX buffer should be cleaned.
"flush" performs also invalidate, which is unnecessary. The TX buffer
can be unaligned to the cahche line in some(most) cases, whereas RX buffer
can never be.

The cache for the receive buffer can be dirty and valid before call to exchange.
Thus another memory access (hitting the same cache line) may corrupt receive data
while waiting for transfer to complete. So the receive buffer should be
invalidated before the transfer

Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-13 07:29:14 -06:00
Jukka Laitinen
ace63ef74a arch/arm/src/stm32h7/stm32_spi.c: Remove un-used local variable
Causes compilation warning

Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-13 07:29:14 -06:00
Jukka Laitinen
63af18eaf9 arch/arm/src/stm32h7/stm32_spi.c: Fix long lines to pass style checks
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-13 07:29:14 -06:00
Jukka Laitinen
4967352c33 arch/arm/src/stm32h7/stm32_ethernet.c: Comment and debug assertion fixes
Modify some comments and debug assertions, which inherit from previous versions
and make no sense. Also add a few nerr printouts to make it easier to debug
running out of buffers

Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-13 06:51:57 -06:00
Jukka Laitinen
db492ca03b arch/arm/src/stm32h7/stm32_ethernet.c: Break long lines to pass style checks
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-13 06:51:57 -06:00
Jukka Laitinen
d618dad296 arch/arm/src/stm32h7/Make.defs: arm_mpu.c was added twice
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-13 06:51:57 -06:00
Jukka Laitinen
2ef571453a arch/arm/src/stm32h7/stm32_allocateheap.c: Fix compilation when CONFIG_MM_REGIONS == 1
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-13 06:51:57 -06:00
Xiang Xiao
9607152e68 arm/gic: Don't pirnt log in arm_decodeirq
it is unsafe place to do this

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I47fdb1a34a7f1d5c5d3c4f3c0030a60bf01c43c2
2020-05-13 06:33:56 -06:00
Xiang Xiao
7ffafa3654 Remove executable bit from source code
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-13 06:32:13 -06:00
Masayuki Ishikawa
77f15c8b17 arch: cxd56xx: Apply the latest cxd56_dma.c and cxd56_spi from SDK
See the following commit in SDK:

  commit 62a2fb4fd3001aefad9ec3b2e2e7c47e5b0f21e1
  Author: SPRESENSE <41312067+SPRESENSE@users.noreply.github.com>
  Date:   Fri Jan 24 13:32:04 2020 +0900

      Enable dummy transfer by SPI using DMA

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-05-13 13:11:08 +02:00
Xiang Xiao
517974787f Rename clock_systime[r|spec] to clock_systime_[ticks|timespec]
follow up the new naming convention:
https://cwiki.apache.org/confluence/display/NUTTX/Naming+of+OS+Internal+Functions
2020-05-10 14:35:50 -06:00
Gregory Nutt
3ac629bdfb Run all .c and .h files modifed by the PR though nxstyle. 2020-05-09 16:58:42 -03:00
Gregory Nutt
f92dba212d sched/sched/sched.h: Make naming of all internal names consistent:
1. Add internal scheduler functions should begin with nxsched_, not sched_
2. Follow the consistent naming patter of https://cwiki.apache.org/confluence/display/NUTTX/Naming+of+OS+Internal+Functions
2020-05-09 16:58:42 -03:00
Gregory Nutt
4b44b628ea Run nxstyle against all .c and .h files modified by this PR.
All complaints fixed except for those that were not possible to fix:

- Used of Mixed case identifier in ESP32 files.  These are references to Expressif ROM functions which are outside of the scope of NuttX.
2020-05-09 14:19:08 -03:00
Gregory Nutt
a4218e2144 include/nuttx/sched.h: Make naming of all internal names consistent:
1. Add internal scheduler functions should begin with nxsched_, not sched_
2. Follow the consistent naming patter of https://cwiki.apache.org/confluence/display/NUTTX/Naming+of+OS+Internal+Functions
2020-05-09 14:19:08 -03:00
Xiang Xiao
b7d922960f Fix nxstyle issue
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-08 07:20:49 -06:00
Gregory Nutt
3dca5eba15 Completes the Implementation of the TLS-based errno
- Remove per-thread errno from the TCB structure (pterrno)
- Remove get_errno() and set_errno() as functions.  The macros are still available as stubs and will be needed in the future if we need to access the errno from a different address environment (KERNEL mode).
- Add errno value to the tls_info_s structure definitions
- Move sched/errno to libs/libc/errno.  Replace old TCB access to the errno with TLS access to the errno.
2020-05-07 23:11:34 +01:00
Ouss4
a6da3c2cb6 arch/*/*_checkstack.c: Get aligned address only when CONFIG_TLS_ALIGNED is
enabled.
2020-05-07 12:04:51 -06:00
Gregory Nutt
c2244a2382 Remove CONFIG_TLS
A first step in implementing the user-space error is force TLS to be enabled at all times.  It is no longer optional
2020-05-07 12:04:16 -06:00
Pierre-Olivier Vauboin
8d8ceee838 boards/arm/stm32h7/stm32h747i-disco: support for FMC SDRAM 2020-05-07 10:29:01 -06:00
Ouss4
a4dd967440 arch/: Implement up_tls_info() for the rest of the architectures. 2020-05-06 21:56:40 -06:00
Ouss4
1e3ec6ecd0 arch/: Implement Thread Local Storage for the rest of the architectures.
The change consisted on modifying *_usestack.c and *_createstack.c
2020-05-06 21:56:40 -06:00
Xiang Xiao
94bb2e05bb syslog: Code outside libc shouldn't call nx_vsyslog directly
since nx_vsyslog is the implementation detail

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-06 20:53:11 -06:00
Gregory Nutt
bda24f09c2 libs/libc/tls/tls_getinfo.c: Add tls_get_info()
Move the logic to get TLS information from an inline function to a normal function.  For the unaligned case, it is probably too large to be inlined.

Also fixes some minor things from review of previous commits.
2020-05-05 18:56:33 +01:00
Abdelatif Guettouche
b7e7fba732 TLS_UNALIGNED (#2)
* Implement the TLS_UNALIGNED
2020-05-05 18:56:33 +01:00
Pierre-Olivier Vauboin
8d763d37ab arch/arm/src/stm32h7/stm32_oneshot: fix style issues 2020-05-05 11:53:58 -06:00
Pierre-Olivier Vauboin
d96565a765 arch/arm/src/stm32h7: add support for oneshot timer
The code is ported from arch/arm/src/stm32
2020-05-05 11:53:58 -06:00
raiden00pl
f03ed73f91 arch/arm/src/stm32/stm32_adc.c: remove obsolete warnings 2020-05-03 15:57:49 -03:00
raiden00pl
534ba2cc18 arch/arm/src/stm32/stm32_adc: add setup and shutdown operations to the low-level interface 2020-05-03 15:57:49 -03:00
raiden00pl
b3a1aef773 arch/arm/src/stm32/stm32_adc.c: cosmetics 2020-05-03 15:57:49 -03:00
raiden00pl
5857c48b2e arch/arm/src/stm32/stm32_adc.c: setup/shutdown ADC instance only once 2020-05-03 15:57:49 -03:00
raiden00pl
e2a3266857 arch/arm/src/stm32/stm32_adc: add interface to configure EXTSEL/JEXTSEL from low-level ops 2020-05-03 15:57:49 -03:00
Gregory Nutt
1bab5b6813 arch/arm/: Rename up_intstack_* to arm_intstack_*
The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all architecture-private functions begin with the name of the arch, not up_.

This PR addresses only these name changes for the ARM-private functions up_instack_base() and up_instack_top() which should be called arm_instack_base() and arm_instack_top().

There should be no impact of this change (other that one step toward more consistent naming).

Normal PR checks are sufficient
2020-05-03 14:48:40 -03:00
Gregory Nutt
da4c597b5f Run all .c and .h files modified by this PR through nxstyle. 2020-05-03 16:42:19 +01:00
Gregory Nutt
01d32a2b22 arch/arm/stm32, stm32f7, stm32l4: Rename up_waste to stm32_waste
The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private functions begin with the name of the MCU, not up_.

This PR addresses only these name changes for the STM32-private functions up_waste() which should be called stm32_waste.

There should be no impact of this change (other that one step toward more consistent naming).

Normal PR checks are sufficient
2020-05-03 16:42:19 +01:00
Gregory Nutt
cbc931b590 arch/arm: Rename up_savestate and up_restorestate
Summary

The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private functions begin with the name of the architecture, not up_.

This PR addresses function-like macro naming that was missing in previous PRs:  up_savestate() and up_restorestate() which must be named arm_savestate() and arm_restorestate().

Impact

There should be no impact of this change (other that one step toward more consistent naming).

Testing

stm32f103-minimum:nsh
2020-05-02 18:35:30 -03:00
Alan Carvalho de Assis
54d0256b9a Remove the not existent CONFIG_XXX_CMNVECTOR 2020-05-02 09:55:35 -06:00
Gregory Nutt
bb29541e3c Remove garbage file accidentally added 2020-05-01 21:05:22 -03:00
Xiang Xiao
f2aba8d9b7 build: Remove 'u' prefix from userspace library
so user needn't link the different library because the build type change

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-01 15:56:55 -06:00
Gregory Nutt
673640b313 Run all .c and .h modified by this PR through nxstyle
The are remaining nxstyle complaints due to the use of mixed case identifiers in arch/arm/src/lc823450/lc823450_irq.c This, cannot be easily fixed since it depends on register definitions in header files that have implications to section other lc823450 files.
2020-05-01 16:55:33 -03:00
Gregory Nutt
b0dbdd7c10 arch/arm, board/arm: Rename all up_ramvec_* functions to arm_ramvec_*
Summary

The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private functions begin with the name of the architecture, not up_.

This PR addresses only these name changes for the ARM-private functions up_ramvec_initialize() and up_ramvec_attch().

Impact

There should be no impact of this change (other that one step toward more consistent naming).

Testing

stm32f4discovery:netnsh
2020-05-01 16:55:33 -03:00
Gregory Nutt
2aa85fd17e arch/arm, board/arm: Rename all up_* functions to arm_*
Summary

The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private functions begin with the name of the architecture, not up_.

This PR addresses only these name changes for the ARM-private functions prototyped in arm_internal.h

This change to the files only modifies the name of called functions.  nxstyle fixes were made for all core architecture files.  However, there are well over 5000 additional complaints from MCU drivers and board logic that are unrelated to to this change but were affected by the name change.  It is not humanly possible to fix all of these.   I ask that this change be treated like other cosmetic changes that we have done which do not require full nxstyle compliance.

Impact

There should be not impact of this change (other that one step toward more consistent naming).
Testing

stm32f4discovery:netnsh
2020-05-01 18:28:13 +01:00
Gregory Nutt
542b684f73 arch/arm: Rename all up_*.S files to arm_*.S
Summary

The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private files begin with the name of the architecture, not up_.

This PR addresses only these name changes for the up_*.S files.

The entire job required to be compatible with that Naming Convention will also require changing the naming of the up_() functions that are used only within arch/arm and board/arm.

Impact

There should be not impact of this change (other that one step toward more consistent naming).
Testing

stm32f4discovery:netnsh
2020-05-01 11:29:11 -03:00
Xiang Xiao
eca7059785 Refine __KERNEL__ and CONFIG_BUILD_xxx usage in the code base
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-01 10:43:47 -03:00
Gregory Nutt
037c9ea0a4 arch/arm: Rename all up_*.h files to arm_*.h
Summary

The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private files begin with the name of the architecture, not up_.

This PR addresses only these name changes for the up_*.h files.  There are only three, but almost 1680 files that include them:

    up_arch.h
    up_internal.h
    up_vfork.h

The only change to the files is from including up_arch.h to arm_arch.h (for example).

The entire job required to be compatible with that Naming Convention will also require changing the naming of the up_() functions that are used only within arch/arm and board/arm.

Impact

There should be not impact of this change (other that one step toward more consistent naming).

Testing

stm32f4discovery:netnsh
2020-05-01 03:43:44 +01:00