nuttx/arch/arm/src/sama5/chip
2016-03-29 17:51:58 -06:00
..
_sama5d2x_memorymap.h i.MX6: Need to mapping OCRAM before enabling MMU because the page table lies in OCRAM 2016-03-29 17:51:58 -06:00
_sama5d2x_pinmap.h Change missed in last commit 2015-09-29 13:01:52 -06:00
_sama5d2x_pio.h SAMA5Dx: Fix a header file naming collision 2015-09-29 12:49:24 -06:00
_sama5d3x4x_pio.h SAMA5Dx: Fix a header file naming collision 2015-09-29 12:49:24 -06:00
_sama5d3x_memorymap.h SAMA5Dx: Fix a header file naming collision 2015-09-29 12:49:24 -06:00
_sama5d3x_mpddrc.h SAMA5Dx: Fix a header file naming collision 2015-09-29 12:49:24 -06:00
_sama5d3x_pinmap.h SAMA5Dx: Fix a header file naming collision 2015-09-29 12:49:24 -06:00
_sama5d4x_memorymap.h SAMA5Dx: Fix a header file naming collision 2015-09-29 12:49:24 -06:00
_sama5d4x_mpddrc.h SAMA5Dx: Fix a header file naming collision 2015-09-29 12:49:24 -06:00
_sama5d4x_pinmap.h SAMA5Dx: Fix a header file naming collision 2015-09-29 12:49:24 -06:00
sam_adc.h SAMA5D ADC: Fix some typos in conditional compilation 2014-07-19 13:56:48 -06:00
sam_aic.h Need to enable FIQ in initial task state; Improve H32/64 test in IRQ handling 2014-06-21 09:55:09 -06:00
sam_aximx.h SAMA5D4: Update some register definition header files. Many more still to be done 2014-06-07 13:36:46 -06:00
sam_bsc.h SAMA5: Adapt clocking for different boot modes. New header files for AXI matrix, BSC, and SFR 2013-07-23 13:54:49 -06:00
sam_can.h SAMA5D4: Update HSMC register definitions 2014-06-08 16:27:58 -06:00
sam_dbgu.h SAMA5D4: Update DBGU header file 2014-06-08 14:37:09 -06:00
sam_dmac.h Remove executable flag from more .c and .h files 2015-04-09 08:20:57 -06:00
sam_ehci.h SAMA5/ECHI: Debug register access, add logic to determine transfer size, fix setting of control bit in token 2013-08-23 16:23:15 -06:00
sam_emac.h SAMA5D4: Still trying to reconcile Ethernet interfaces 2014-06-11 08:01:48 -06:00
sam_emaca.h SAMA5D3/4: More renaming. Change SAMA5D3 EMAC to EMACA and SAMA5D4 to EMACB so that the configuration and build system can configure them. I might come up with something better later 2014-06-10 17:40:25 -06:00
sam_emacb.h SAMA5D4: Add EMAC driver 2014-06-11 12:23:31 -06:00
sam_flexcom_spi.h SAMA5D2: Add Flexcom register definition header files 2015-09-11 10:40:12 -06:00
sam_flexcom_twi.h SAMA5D2: Add Flexcom register definition header files 2015-09-11 10:40:12 -06:00
sam_flexcom_usart.h SAMA5D2: Make sure that USART mode is selected for each Flexcom used as a serial device 2015-09-11 18:42:49 -06:00
sam_flexcom.h SAMA5D2: Add Flexcom register definition header files 2015-09-11 10:40:12 -06:00
sam_gmac.h SAMA5 GMAC: Various fixes from initial debug 2013-09-29 15:03:57 -06:00
sam_gpbr.h SAMA5: Add GPBR register definitions 2013-10-19 10:22:21 -06:00
sam_hsmc.h SAMA5D4: Update HSMC register definitions 2014-06-08 16:27:58 -06:00
sam_hsmci.h SAMA5D4: Updated HSMCI header file 2014-06-08 12:49:45 -06:00
sam_isi.h SAMA5D4: update ISI register definition header file 2014-06-09 09:29:23 -06:00
sam_lcdc.h SAMA5D4-EK: LCDC works (with a few color problems) 2014-07-10 12:03:10 -06:00
sam_matrix.h SAMA5D2: Add PIO driver. Still a work in progress 2015-09-12 09:58:18 -06:00
sam_memorymap.h SAMA5Dx: Fix a header file naming collision 2015-09-29 12:49:24 -06:00
sam_mpddrc.h SAMA5Dx: Fix a header file naming collision 2015-09-29 12:49:24 -06:00
sam_ohci.h Add few more EHCI definitions 2013-08-18 13:01:13 -06:00
sam_pinmap.h SAMA5Dx: Fix a header file naming collision 2015-09-29 12:49:24 -06:00
sam_pio.h SAMA5Dx: Fix a header file naming collision 2015-09-29 12:49:24 -06:00
sam_pit.h SAMA5 interrupt handling logic 2013-07-22 11:54:39 -06:00
sam_pmc.h SAMA5D2: Add pin multiplexing definition file and other necessary changes for the SAMA5D2 2015-09-10 13:07:04 -06:00
sam_pwm.h SAMA5D4: Update PWM header file 2014-06-08 14:16:50 -06:00
sam_rtc.h SAMV7: Add RTC register definition header file 2015-06-16 07:23:47 -06:00
sam_rxlp.h Fix some errors in comments 2015-09-11 18:03:40 -06:00
sam_sckc.h SAMA5: Update slow clock logic. Things work a little differently on the SAMA5D3 2014-07-19 13:25:59 -06:00
sam_sfr.h SAMA5D2: Update boot logic, AXIMX, SFR, and WDT register definition files for SAMA5D2 2015-09-09 10:00:29 -06:00
sam_spi.h SAMA5D4: More header file changes 2014-06-09 10:07:00 -06:00
sam_ssc.h SAMA5D4: More header file changes 2014-06-09 10:07:00 -06:00
sam_tc.h SAMA5D3: Fix typos in timer/counter header file. From Bob Doiron 2015-03-20 09:19:10 -06:00
sam_trng.h SAMA5 TRNG: /dev/random appears to be functional 2013-10-20 12:08:39 -06:00
sam_twi.h SAMA5D4: Update one more register definition header files 2014-06-07 14:40:49 -06:00
sam_uart.h SAMA5D2: Add RXLP register definition header file 2015-09-11 16:11:00 -06:00
sam_udphs.h SAM3/4: Fleshing out environment to support USB device (UDP) 2014-03-16 14:11:22 -06:00
sam_wdt.h SAMA5D2: Update boot logic, AXIMX, SFR, and WDT register definition files for SAMA5D2 2015-09-09 10:00:29 -06:00
sam_xdmac.h SAMA5: Add configuration to assign an XDMAC channel to an HSMCI 2014-06-29 08:43:46 -06:00