.. |
_sama5d2x_memorymap.h
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i.MX6: Need to mapping OCRAM before enabling MMU because the page table lies in OCRAM
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2016-03-29 17:51:58 -06:00 |
_sama5d2x_pinmap.h
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Change missed in last commit
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2015-09-29 13:01:52 -06:00 |
_sama5d2x_pio.h
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SAMA5Dx: Fix a header file naming collision
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2015-09-29 12:49:24 -06:00 |
_sama5d3x4x_pio.h
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SAMA5Dx: Fix a header file naming collision
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2015-09-29 12:49:24 -06:00 |
_sama5d3x_memorymap.h
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SAMA5Dx: Fix a header file naming collision
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2015-09-29 12:49:24 -06:00 |
_sama5d3x_mpddrc.h
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SAMA5Dx: Fix a header file naming collision
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2015-09-29 12:49:24 -06:00 |
_sama5d3x_pinmap.h
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SAMA5Dx: Fix a header file naming collision
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2015-09-29 12:49:24 -06:00 |
_sama5d4x_memorymap.h
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SAMA5Dx: Fix a header file naming collision
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2015-09-29 12:49:24 -06:00 |
_sama5d4x_mpddrc.h
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SAMA5Dx: Fix a header file naming collision
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2015-09-29 12:49:24 -06:00 |
_sama5d4x_pinmap.h
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SAMA5Dx: Fix a header file naming collision
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2015-09-29 12:49:24 -06:00 |
sam_adc.h
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SAMA5D ADC: Fix some typos in conditional compilation
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2014-07-19 13:56:48 -06:00 |
sam_aic.h
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Need to enable FIQ in initial task state; Improve H32/64 test in IRQ handling
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2014-06-21 09:55:09 -06:00 |
sam_aximx.h
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SAMA5D4: Update some register definition header files. Many more still to be done
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2014-06-07 13:36:46 -06:00 |
sam_bsc.h
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SAMA5: Adapt clocking for different boot modes. New header files for AXI matrix, BSC, and SFR
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2013-07-23 13:54:49 -06:00 |
sam_can.h
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SAMA5D4: Update HSMC register definitions
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2014-06-08 16:27:58 -06:00 |
sam_dbgu.h
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SAMA5D4: Update DBGU header file
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2014-06-08 14:37:09 -06:00 |
sam_dmac.h
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Remove executable flag from more .c and .h files
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2015-04-09 08:20:57 -06:00 |
sam_ehci.h
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SAMA5/ECHI: Debug register access, add logic to determine transfer size, fix setting of control bit in token
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2013-08-23 16:23:15 -06:00 |
sam_emac.h
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SAMA5D4: Still trying to reconcile Ethernet interfaces
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2014-06-11 08:01:48 -06:00 |
sam_emaca.h
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SAMA5D3/4: More renaming. Change SAMA5D3 EMAC to EMACA and SAMA5D4 to EMACB so that the configuration and build system can configure them. I might come up with something better later
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2014-06-10 17:40:25 -06:00 |
sam_emacb.h
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SAMA5D4: Add EMAC driver
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2014-06-11 12:23:31 -06:00 |
sam_flexcom_spi.h
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SAMA5D2: Add Flexcom register definition header files
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2015-09-11 10:40:12 -06:00 |
sam_flexcom_twi.h
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SAMA5D2: Add Flexcom register definition header files
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2015-09-11 10:40:12 -06:00 |
sam_flexcom_usart.h
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SAMA5D2: Make sure that USART mode is selected for each Flexcom used as a serial device
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2015-09-11 18:42:49 -06:00 |
sam_flexcom.h
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SAMA5D2: Add Flexcom register definition header files
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2015-09-11 10:40:12 -06:00 |
sam_gmac.h
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SAMA5 GMAC: Various fixes from initial debug
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2013-09-29 15:03:57 -06:00 |
sam_gpbr.h
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SAMA5: Add GPBR register definitions
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2013-10-19 10:22:21 -06:00 |
sam_hsmc.h
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SAMA5D4: Update HSMC register definitions
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2014-06-08 16:27:58 -06:00 |
sam_hsmci.h
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SAMA5D4: Updated HSMCI header file
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2014-06-08 12:49:45 -06:00 |
sam_isi.h
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SAMA5D4: update ISI register definition header file
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2014-06-09 09:29:23 -06:00 |
sam_lcdc.h
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SAMA5D4-EK: LCDC works (with a few color problems)
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2014-07-10 12:03:10 -06:00 |
sam_matrix.h
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SAMA5D2: Add PIO driver. Still a work in progress
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2015-09-12 09:58:18 -06:00 |
sam_memorymap.h
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SAMA5Dx: Fix a header file naming collision
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2015-09-29 12:49:24 -06:00 |
sam_mpddrc.h
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SAMA5Dx: Fix a header file naming collision
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2015-09-29 12:49:24 -06:00 |
sam_ohci.h
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Add few more EHCI definitions
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2013-08-18 13:01:13 -06:00 |
sam_pinmap.h
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SAMA5Dx: Fix a header file naming collision
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2015-09-29 12:49:24 -06:00 |
sam_pio.h
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SAMA5Dx: Fix a header file naming collision
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2015-09-29 12:49:24 -06:00 |
sam_pit.h
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SAMA5 interrupt handling logic
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2013-07-22 11:54:39 -06:00 |
sam_pmc.h
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SAMA5D2: Add pin multiplexing definition file and other necessary changes for the SAMA5D2
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2015-09-10 13:07:04 -06:00 |
sam_pwm.h
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SAMA5D4: Update PWM header file
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2014-06-08 14:16:50 -06:00 |
sam_rtc.h
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SAMV7: Add RTC register definition header file
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2015-06-16 07:23:47 -06:00 |
sam_rxlp.h
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Fix some errors in comments
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2015-09-11 18:03:40 -06:00 |
sam_sckc.h
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SAMA5: Update slow clock logic. Things work a little differently on the SAMA5D3
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2014-07-19 13:25:59 -06:00 |
sam_sfr.h
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SAMA5D2: Update boot logic, AXIMX, SFR, and WDT register definition files for SAMA5D2
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2015-09-09 10:00:29 -06:00 |
sam_spi.h
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SAMA5D4: More header file changes
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2014-06-09 10:07:00 -06:00 |
sam_ssc.h
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SAMA5D4: More header file changes
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2014-06-09 10:07:00 -06:00 |
sam_tc.h
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SAMA5D3: Fix typos in timer/counter header file. From Bob Doiron
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2015-03-20 09:19:10 -06:00 |
sam_trng.h
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SAMA5 TRNG: /dev/random appears to be functional
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2013-10-20 12:08:39 -06:00 |
sam_twi.h
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SAMA5D4: Update one more register definition header files
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2014-06-07 14:40:49 -06:00 |
sam_uart.h
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SAMA5D2: Add RXLP register definition header file
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2015-09-11 16:11:00 -06:00 |
sam_udphs.h
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SAM3/4: Fleshing out environment to support USB device (UDP)
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2014-03-16 14:11:22 -06:00 |
sam_wdt.h
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SAMA5D2: Update boot logic, AXIMX, SFR, and WDT register definition files for SAMA5D2
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2015-09-09 10:00:29 -06:00 |
sam_xdmac.h
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SAMA5: Add configuration to assign an XDMAC channel to an HSMCI
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2014-06-29 08:43:46 -06:00 |