nuttx/arch/xtensa/src/common
2016-10-23 14:20:03 -06:00
..
xtensa_assert.c Xtensa: Add some data structures needed for SMP support. 2016-10-20 15:21:29 -06:00
xtensa_attr.h Xtensa: Add initial CPU0 start-up logic 2016-10-17 08:15:36 -06:00
xtensa_blocktask.c Xtensa: First cat at context switching functions 2016-10-21 10:43:59 -06:00
xtensa_context.S Xtensa: Add interrupt enable/disable controls. Add dummy timer and IRQ initialization. 2016-10-23 08:00:17 -06:00
xtensa_coproc.S Xtensa: A little more interrupt handling logic 2016-10-20 11:44:14 -06:00
xtensa_copystate.c Xtensa: First cat at context switching functions 2016-10-21 10:43:59 -06:00
xtensa_createstack.c Add xtensa_testset.c 2016-10-19 09:58:12 -06:00
xtensa_dumpstate.c Remove support for software prioritization of interrupts 2016-10-23 06:37:28 -06:00
xtensa_etherstub.c Xtensa: Keep task state in TCB (unless you want to redesign signal handling). Lots of cosmetic clean-up. 2016-10-16 07:57:16 -06:00
xtensa_exit.c Xtensa: Fix a few more compilation issues 2016-10-21 11:24:23 -06:00
xtensa_idle.c Xtensa: Keep task state in TCB (unless you want to redesign signal handling). Lots of cosmetic clean-up. 2016-10-16 07:57:16 -06:00
xtensa_initialize.c Xtensa: Add some data structures needed for SMP support. 2016-10-20 15:21:29 -06:00
xtensa_initialstate.c Xtensa: Add tie.h 2016-10-23 13:25:41 -06:00
xtensa_interruptcontext.c Xtensa: Add some data structures needed for SMP support. 2016-10-20 15:21:29 -06:00
xtensa_inthandlers.S Xtensa: Correct variou compilation issues 2016-10-23 08:04:57 -06:00
xtensa_intvectors.S Xtensa: Correct variou compilation issues 2016-10-23 08:04:57 -06:00
xtensa_irqdispatch.c Xtensa: Add some data structures needed for SMP support. 2016-10-20 15:21:29 -06:00
xtensa_lowputs.c Xtensa: Keep task state in TCB (unless you want to redesign signal handling). Lots of cosmetic clean-up. 2016-10-16 07:57:16 -06:00
xtensa_macros.h ESP32: Refresh configuration; fix some compile issues 2016-10-19 13:58:50 -06:00
xtensa_mdelay.c Xtensa: Keep task state in TCB (unless you want to redesign signal handling). Lots of cosmetic clean-up. 2016-10-16 07:57:16 -06:00
xtensa_modifyreg8.c Xtensa: Keep task state in TCB (unless you want to redesign signal handling). Lots of cosmetic clean-up. 2016-10-16 07:57:16 -06:00
xtensa_modifyreg16.c Xtensa: Keep task state in TCB (unless you want to redesign signal handling). Lots of cosmetic clean-up. 2016-10-16 07:57:16 -06:00
xtensa_modifyreg32.c Xtensa: Keep task state in TCB (unless you want to redesign signal handling). Lots of cosmetic clean-up. 2016-10-16 07:57:16 -06:00
xtensa_puts.c Xtensa: Keep task state in TCB (unless you want to redesign signal handling). Lots of cosmetic clean-up. 2016-10-16 07:57:16 -06:00
xtensa_releasepending.c Xtensa: First cat at context switching functions 2016-10-21 10:43:59 -06:00
xtensa_releasestack.c Xtensa: Keep task state in TCB (unless you want to redesign signal handling). Lots of cosmetic clean-up. 2016-10-16 07:57:16 -06:00
xtensa_reprioritizertr.c Xtensa: First cat at context switching functions 2016-10-21 10:43:59 -06:00
xtensa_schedsigaction.c Xtensa: Add region protected; Implement some missing signal handling logic. 2016-10-23 09:02:50 -06:00
xtensa_sigdeliver.c Xtensa: Add region protected; Implement some missing signal handling logic. 2016-10-23 09:02:50 -06:00
xtensa_stackframe.c Xtensa: Fix register usage in up_strackframe 2016-10-16 09:26:33 -06:00
xtensa_testset.c Add xtensa_testset.c 2016-10-19 09:58:12 -06:00
xtensa_timer.h Xtensa: Timer code now compiles okay 2016-10-23 11:31:48 -06:00
xtensa_udelay.c Xtensa: Keep task state in TCB (unless you want to redesign signal handling). Lots of cosmetic clean-up. 2016-10-16 07:57:16 -06:00
xtensa_unblocktask.c Xtensa: First cat at context switching functions 2016-10-21 10:43:59 -06:00
xtensa_usestack.c Add xtensa_testset.c 2016-10-19 09:58:12 -06:00
xtensa.h ESP32: Fix heap initialization 2016-10-23 14:20:03 -06:00