2011-08-15 00:47:44 +02:00
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/****************************************************************************
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* arch/arm/src/kinetis/kinetis_pinirq.c
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*
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2016-02-14 02:11:09 +01:00
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* Copyright (C) 2011, 2013, 2016 Gregory Nutt. All rights reserved.
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2012-09-13 20:32:24 +02:00
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* Author: Gregory Nutt <gnutt@nuttx.org>
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2011-08-15 00:47:44 +02:00
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <arch/board/board.h>
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#include <nuttx/config.h>
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2011-08-15 03:50:35 +02:00
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#include <assert.h>
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#include <debug.h>
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2016-02-14 02:11:09 +01:00
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#include <nuttx/irq.h>
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2011-08-15 00:47:44 +02:00
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#include <nuttx/arch.h>
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2011-08-15 03:50:35 +02:00
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2011-08-15 20:07:54 +02:00
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#include "up_arch.h"
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2011-08-15 00:47:44 +02:00
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#include "up_internal.h"
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2011-08-15 20:07:54 +02:00
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2015-12-30 01:07:11 +01:00
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#include "kinetis.h"
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2016-07-01 22:07:14 +02:00
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#include "chip/kinetis_port.h"
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2011-08-15 00:47:44 +02:00
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2016-07-22 22:30:37 +02:00
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#ifdef CONFIG_KINETIS_GPIOIRQ
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2011-08-15 00:47:44 +02:00
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Configuration ************************************************************/
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2011-08-15 03:50:35 +02:00
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/* The Kinetis port interrupt logic is very flexible and will program interrupts on
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* most all pin events. In order to keep the memory usage to a minimum, the NuttX
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* port supports enabling interrupts on a per-port basis.
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*/
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#if defined (CONFIG_KINETIS_PORTAINTS) || defined (CONFIG_KINETIS_PORTBINTS) || \
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defined (CONFIG_KINETIS_PORTCINTS) || defined (CONFIG_KINETIS_PORTDINTS) || \
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defined (CONFIG_KINETIS_PORTEINTS)
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2011-08-15 20:07:54 +02:00
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# define HAVE_PORTINTS 1
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2011-08-15 00:47:44 +02:00
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#endif
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/****************************************************************************
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* Private Types
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****************************************************************************/
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2017-02-27 14:20:21 +01:00
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struct kinetis_pinirq_s
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{
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xcpt_t handler;
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void *arg;
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};
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2011-08-15 00:47:44 +02:00
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/****************************************************************************
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* Private Data
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****************************************************************************/
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2011-08-15 03:50:35 +02:00
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/* Per pin port interrupt vectors. NOTE: Not all pins in each port
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* correspond to externally available GPIOs. However, I believe that the
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* Kinesis will support interrupts even if the pin is not available as
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* a GPIO. Hence, we need to support all 32 pins for each port. To keep the
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* memory usage at a minimum, the logic may be configure per port.
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*/
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#ifdef CONFIG_KINETIS_PORTAINTS
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2017-02-27 14:20:21 +01:00
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static struct kinetis_pinirq_s g_portaisrs[32];
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2011-08-15 03:50:35 +02:00
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#endif
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#ifdef CONFIG_KINETIS_PORTBINTS
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2017-02-27 14:20:21 +01:00
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static struct kinetis_pinirq_s g_portbisrs[32];
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2011-08-15 03:50:35 +02:00
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#endif
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#ifdef CONFIG_KINETIS_PORTCINTS
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2017-02-27 14:20:21 +01:00
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static struct kinetis_pinirq_s g_portcisrs[32];
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2011-08-15 03:50:35 +02:00
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#endif
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#ifdef CONFIG_KINETIS_PORTDINTS
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2017-02-27 14:20:21 +01:00
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static struct kinetis_pinirq_s g_portdisrs[32];
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2011-08-15 03:50:35 +02:00
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#endif
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#ifdef CONFIG_KINETIS_PORTEINTS
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2017-02-27 14:20:21 +01:00
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static struct kinetis_pinirq_s g_porteisrs[32];
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2011-08-15 03:50:35 +02:00
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#endif
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2011-08-15 00:47:44 +02:00
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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2011-08-15 03:50:35 +02:00
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/****************************************************************************
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* Name: kinetis_portinterrupt
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*
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* Description:
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* Common port interrupt handling.
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*
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****************************************************************************/
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#ifdef HAVE_PORTINTS
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2011-08-15 20:07:54 +02:00
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static int kinetis_portinterrupt(int irq, FAR void *context,
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2017-02-27 14:20:21 +01:00
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uintptr_t addr, struct kinetis_pinirq_s *isrtab)
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2011-08-15 03:50:35 +02:00
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{
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uint32_t isfr = getreg32(addr);
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int i;
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/* Examine each pin in the port */
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for (i = 0; i < 32 && isfr != 0; i++)
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{
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/* A bit set in the ISR means that an interrupt is pending for this
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* pin. If the pin is programmed for level sensitive inputs, then
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* the interrupt handling logic MUST disable the interrupt (or cause
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* the level to change) to prevent infinite interrupts.
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*/
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uint32_t bit = (1 << i);
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2015-10-06 01:13:53 +02:00
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if ((isfr & bit) != 0)
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2011-08-15 03:50:35 +02:00
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{
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/* I think that bits may be set in the ISFR for DMA activities
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* well. So, no error is declared if there is no registered
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* interrupt handler for the pin.
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*/
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2017-02-27 15:06:07 +01:00
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if (isrtab[i].handler != NULL)
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2011-08-15 03:50:35 +02:00
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{
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2017-02-27 14:20:21 +01:00
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xcpt_t handler = isrtab[i].handler;
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void *arg = isrtab[i].arg;
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2011-08-15 03:50:35 +02:00
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/* There is a registered interrupt handler... invoke it */
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2017-02-27 14:20:21 +01:00
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(void)handler(irq, context, arg);
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2011-08-15 03:50:35 +02:00
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}
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/* Writing a one to the ISFR register will clear the pending
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* interrupt. If pin is configured to generate a DMA request
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* then the ISFR bit will be cleared automatically at the
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* completion of the requested DMA transfer. If configured for
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* a level sensitive interrupt and the pin remains asserted and
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* the bit will set again immediately after it is cleared.
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*/
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isfr &= ~bit;
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putreg32(bit, addr);
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}
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}
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return OK;
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}
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#endif
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/****************************************************************************
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* Name: kinetis_portXinterrupt
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*
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* Description:
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* Handle interrupts arriving on individual ports
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*
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****************************************************************************/
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#ifdef CONFIG_KINETIS_PORTAINTS
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2017-02-27 13:27:56 +01:00
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static int kinetis_portainterrupt(int irq, FAR void *context, FAR void *arg)
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2011-08-15 03:50:35 +02:00
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{
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return kinetis_portinterrupt(irq, context, KINETIS_PORTA_ISFR, g_portaisrs);
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}
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#endif
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#ifdef CONFIG_KINETIS_PORTBINTS
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2017-02-27 13:27:56 +01:00
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static int kinetis_portbinterrupt(int irq, FAR void *context, FAR void *arg)
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2011-08-15 03:50:35 +02:00
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{
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return kinetis_portinterrupt(irq, context, KINETIS_PORTB_ISFR, g_portbisrs);
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}
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#endif
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#ifdef CONFIG_KINETIS_PORTCINTS
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2017-02-27 13:27:56 +01:00
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static int kinetis_portcinterrupt(int irq, FAR void *context, FAR void *arg)
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2011-08-15 03:50:35 +02:00
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{
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return kinetis_portinterrupt(irq, context, KINETIS_PORTC_ISFR, g_portcisrs);
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}
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#endif
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#ifdef CONFIG_KINETIS_PORTDINTS
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2017-02-27 13:27:56 +01:00
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static int kinetis_portdinterrupt(int irq, FAR void *context, FAR void *arg)
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2011-08-15 03:50:35 +02:00
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{
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return kinetis_portinterrupt(irq, context, KINETIS_PORTD_ISFR, g_portdisrs);
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}
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#endif
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#ifdef CONFIG_KINETIS_PORTEINTS
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2017-02-27 13:27:56 +01:00
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static int kinetis_porteinterrupt(int irq, FAR void *context, FAR void *arg)
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2011-08-15 03:50:35 +02:00
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{
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return kinetis_portinterrupt(irq, context, KINETIS_PORTE_ISFR, g_porteisrs);
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}
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#endif
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2011-08-15 00:47:44 +02:00
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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2011-08-15 03:50:35 +02:00
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/****************************************************************************
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2011-08-15 00:47:44 +02:00
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* Name: kinetis_pinirqinitialize
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*
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* Description:
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2011-08-15 03:50:35 +02:00
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* Initialize logic to support a second level of interrupt decoding for
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* GPIO pins.
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2011-08-15 00:47:44 +02:00
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*
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2011-08-15 03:50:35 +02:00
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****************************************************************************/
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2011-08-15 00:47:44 +02:00
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void kinetis_pinirqinitialize(void)
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{
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2011-08-15 03:50:35 +02:00
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#ifdef CONFIG_KINETIS_PORTAINTS
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2017-02-27 13:27:56 +01:00
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(void)irq_attach(KINETIS_IRQ_PORTA, kinetis_portainterrupt, NULL);
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2011-08-15 03:50:35 +02:00
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putreg32(0xffffffff, KINETIS_PORTA_ISFR);
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up_enable_irq(KINETIS_IRQ_PORTA);
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#endif
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#ifdef CONFIG_KINETIS_PORTBINTS
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2017-02-27 13:27:56 +01:00
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(void)irq_attach(KINETIS_IRQ_PORTB, kinetis_portbinterrupt, NULL);
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2011-08-15 03:50:35 +02:00
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putreg32(0xffffffff, KINETIS_PORTB_ISFR);
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up_enable_irq(KINETIS_IRQ_PORTB);
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#endif
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#ifdef CONFIG_KINETIS_PORTCINTS
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2017-02-27 13:27:56 +01:00
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(void)irq_attach(KINETIS_IRQ_PORTC, kinetis_portcinterrupt, NULL);
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2011-08-15 03:50:35 +02:00
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putreg32(0xffffffff, KINETIS_PORTC_ISFR);
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up_enable_irq(KINETIS_IRQ_PORTC);
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#endif
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#ifdef CONFIG_KINETIS_PORTDINTS
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2017-02-27 13:27:56 +01:00
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(void)irq_attach(KINETIS_IRQ_PORTD, kinetis_portdinterrupt, NULL);
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2011-08-15 03:50:35 +02:00
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putreg32(0xffffffff, KINETIS_PORTD_ISFR);
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up_enable_irq(KINETIS_IRQ_PORTD);
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#endif
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#ifdef CONFIG_KINETIS_PORTEINTS
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2017-02-27 13:27:56 +01:00
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(void)irq_attach(KINETIS_IRQ_PORTE, kinetis_porteinterrupt, NULL);
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2011-08-15 03:50:35 +02:00
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putreg32(0xffffffff, KINETIS_PORTE_ISFR);
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up_enable_irq(KINETIS_IRQ_PORTE);
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#endif
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2011-08-15 00:47:44 +02:00
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}
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2011-08-15 03:50:35 +02:00
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/****************************************************************************
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2011-08-16 00:11:24 +02:00
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* Name: kinetis_pinirqattach
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2011-08-15 00:47:44 +02:00
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*
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* Description:
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2011-08-16 00:11:24 +02:00
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* Attach a pin interrupt handler. The normal initalization sequence is:
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*
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* 1. Call kinetis_pinconfig() to configure the interrupting pin (pin interrupts
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* will be disabled.
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* 2. Call kinetis_pinirqattach() to attach the pin interrupt handling function.
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* 3. Call kinetis_pinirqenable() to enable interrupts on the pin.
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2011-08-15 00:47:44 +02:00
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*
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* Parameters:
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* - pinset: Pin configuration
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* - pinisr: Pin interrupt service routine
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*
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* Returns:
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2011-08-15 03:50:35 +02:00
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* The previous value of the interrupt handler function pointer. This
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* value may, for example, be used to restore the previous handler whe
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* multiple handlers are used.
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2011-08-15 00:47:44 +02:00
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*
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2011-08-15 03:50:35 +02:00
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****************************************************************************/
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2011-08-15 00:47:44 +02:00
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2017-02-27 14:20:21 +01:00
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xcpt_t kinetis_pinirqattach(uint32_t pinset, xcpt_t pinisr, void *arg)
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2011-08-15 00:47:44 +02:00
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{
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2011-08-15 03:50:35 +02:00
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#ifdef HAVE_PORTINTS
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2017-02-27 14:24:57 +01:00
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struct kinetis_pinirq_s *isrtab;
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xcpt_t oldisr;
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irqstate_t flags;
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2011-08-15 03:50:35 +02:00
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unsigned int port;
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unsigned int pin;
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2011-08-15 00:47:44 +02:00
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/* It only makes sense to call this function for input pins that are configured
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* as interrupts.
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*/
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DEBUGASSERT((pinset & _PIN_INTDMA_MASK) == _PIN_INTERRUPT);
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DEBUGASSERT((pinset & _PIN_IO_MASK) == _PIN_INPUT);
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2011-08-15 03:50:35 +02:00
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/* Get the port number and pin number */
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2011-08-15 20:07:54 +02:00
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port = (pinset & _PIN_PORT_MASK) >> _PIN_PORT_SHIFT;
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pin = (pinset & _PIN_MASK) >> _PIN_SHIFT;
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2011-08-15 03:50:35 +02:00
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/* Get the table associated with this port */
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DEBUGASSERT(port < KINETIS_NPORTS);
|
2016-02-14 02:11:09 +01:00
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flags = enter_critical_section();
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2011-08-15 03:50:35 +02:00
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switch (port)
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{
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#ifdef CONFIG_KINETIS_PORTAINTS
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case KINETIS_PORTA :
|
2011-08-15 20:07:54 +02:00
|
|
|
isrtab = g_portaisrs;
|
2011-08-15 03:50:35 +02:00
|
|
|
break;
|
|
|
|
#endif
|
|
|
|
#ifdef CONFIG_KINETIS_PORTBINTS
|
|
|
|
case KINETIS_PORTB :
|
2011-08-15 20:07:54 +02:00
|
|
|
isrtab = g_portbisrs;
|
2011-08-15 03:50:35 +02:00
|
|
|
break;
|
|
|
|
#endif
|
|
|
|
#ifdef CONFIG_KINETIS_PORTCINTS
|
|
|
|
case KINETIS_PORTC :
|
2011-08-15 20:07:54 +02:00
|
|
|
isrtab = g_portcisrs;
|
2011-08-15 03:50:35 +02:00
|
|
|
break;
|
|
|
|
#endif
|
|
|
|
#ifdef CONFIG_KINETIS_PORTDINTS
|
|
|
|
case KINETIS_PORTD :
|
2011-08-15 20:07:54 +02:00
|
|
|
isrtab = g_portdisrs;
|
2011-08-15 03:50:35 +02:00
|
|
|
break;
|
|
|
|
#endif
|
|
|
|
#ifdef CONFIG_KINETIS_PORTEINTS
|
|
|
|
case KINETIS_PORTE :
|
2011-08-15 20:07:54 +02:00
|
|
|
isrtab = g_porteisrs;
|
2011-08-15 03:50:35 +02:00
|
|
|
break;
|
|
|
|
#endif
|
|
|
|
default:
|
2016-02-14 02:11:09 +01:00
|
|
|
leave_critical_section(flags);
|
2011-08-15 03:50:35 +02:00
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Get the old PIN ISR and set the new PIN ISR */
|
|
|
|
|
2017-02-27 14:24:57 +01:00
|
|
|
oldisr = isrtab[pin].handler;
|
|
|
|
isrtab[pin].handler = pinisr;
|
|
|
|
isrtab[pin].arg = arg;
|
2011-08-15 03:50:35 +02:00
|
|
|
|
|
|
|
/* And return the old PIN isr address */
|
|
|
|
|
2016-02-14 02:11:09 +01:00
|
|
|
leave_critical_section(flags);
|
2011-08-15 03:50:35 +02:00
|
|
|
return oldisr;
|
2011-08-15 20:07:54 +02:00
|
|
|
#else
|
|
|
|
return NULL;
|
|
|
|
#endif /* HAVE_PORTINTS */
|
2011-08-15 00:47:44 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
/************************************************************************************
|
|
|
|
* Name: kinetis_pinirqenable
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Enable the interrupt for specified pin IRQ
|
|
|
|
*
|
|
|
|
************************************************************************************/
|
|
|
|
|
|
|
|
void kinetis_pinirqenable(uint32_t pinset)
|
|
|
|
{
|
2011-08-15 03:50:35 +02:00
|
|
|
#ifdef HAVE_PORTINTS
|
2011-08-15 00:47:44 +02:00
|
|
|
uintptr_t base;
|
|
|
|
uint32_t regval;
|
|
|
|
unsigned int port;
|
|
|
|
unsigned int pin;
|
|
|
|
|
|
|
|
/* Get the port number and pin number */
|
|
|
|
|
|
|
|
port = (pinset & _PIN_PORT_MASK) >> _PIN_PORT_SHIFT;
|
|
|
|
pin = (pinset & _PIN_MASK) >> _PIN_SHIFT;
|
|
|
|
|
|
|
|
DEBUGASSERT(port < KINETIS_NPORTS);
|
|
|
|
if (port < KINETIS_NPORTS)
|
|
|
|
{
|
2011-08-15 20:07:54 +02:00
|
|
|
/* Get the base address of PORT block for this port */
|
|
|
|
|
|
|
|
base = KINETIS_PORT_BASE(port);
|
|
|
|
|
2011-08-15 00:47:44 +02:00
|
|
|
/* Modify the IRQC field of the port PCR register in order to enable
|
|
|
|
* the interrupt.
|
|
|
|
*/
|
|
|
|
|
|
|
|
regval = getreg32(base + KINETIS_PORT_PCR_OFFSET(pin));
|
|
|
|
regval &= ~PORT_PCR_IRQC_MASK;
|
|
|
|
|
|
|
|
switch (pinset & _PIN_INT_MASK)
|
|
|
|
{
|
|
|
|
case PIN_INT_ZERO : /* Interrupt when logic zero */
|
|
|
|
regval |= PORT_PCR_IRQC_ZERO;
|
|
|
|
break;
|
|
|
|
|
2015-10-06 01:13:53 +02:00
|
|
|
case PIN_INT_RISING : /* Interrupt on rising edge */
|
2011-08-15 00:47:44 +02:00
|
|
|
regval |= PORT_PCR_IRQC_RISING;
|
|
|
|
break;
|
|
|
|
|
2016-04-20 14:41:51 +02:00
|
|
|
case PIN_INT_FALLING : /* Interrupt on falling edge */
|
2011-08-15 00:47:44 +02:00
|
|
|
regval |= PORT_PCR_IRQC_FALLING;
|
|
|
|
break;
|
|
|
|
|
2016-04-20 14:41:51 +02:00
|
|
|
case PIN_INT_BOTH : /* Interrupt on either edge */
|
2011-08-15 00:47:44 +02:00
|
|
|
regval |= PORT_PCR_IRQC_BOTH;
|
|
|
|
break;
|
|
|
|
|
2016-04-20 14:41:51 +02:00
|
|
|
case PIN_INT_ONE : /* Interrupt when logic one */
|
2011-08-15 00:47:44 +02:00
|
|
|
regval |= PORT_PCR_IRQC_ONE;
|
|
|
|
break;
|
|
|
|
|
2016-04-20 14:41:51 +02:00
|
|
|
case PIN_DMA_RISING : /* DMA on rising edge */
|
|
|
|
regval |= PORT_PCR_IRQC_DMARISING;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case PIN_DMA_FALLING : /* DMA on falling edge */
|
|
|
|
regval |= PORT_PCR_IRQC_DMAFALLING;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case PIN_DMA_BOTH : /* DMA on either edge */
|
|
|
|
regval |= PORT_PCR_IRQC_DMABOTH;
|
|
|
|
break;
|
|
|
|
|
2011-08-15 00:47:44 +02:00
|
|
|
default:
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
putreg32(regval, base + KINETIS_PORT_PCR_OFFSET(pin));
|
|
|
|
}
|
2011-08-15 20:07:54 +02:00
|
|
|
#endif /* HAVE_PORTINTS */
|
2011-08-15 00:47:44 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
/************************************************************************************
|
|
|
|
* Name: kinetis_pinirqdisable
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Disable the interrupt for specified pin
|
|
|
|
*
|
|
|
|
************************************************************************************/
|
|
|
|
|
|
|
|
void kinetis_pinirqdisable(uint32_t pinset)
|
|
|
|
{
|
2011-08-15 03:50:35 +02:00
|
|
|
#ifdef HAVE_PORTINTS
|
2011-08-15 00:47:44 +02:00
|
|
|
uintptr_t base;
|
|
|
|
uint32_t regval;
|
|
|
|
unsigned int port;
|
|
|
|
unsigned int pin;
|
|
|
|
|
|
|
|
/* Get the port number and pin number */
|
|
|
|
|
|
|
|
port = (pinset & _PIN_PORT_MASK) >> _PIN_PORT_SHIFT;
|
|
|
|
pin = (pinset & _PIN_MASK) >> _PIN_SHIFT;
|
|
|
|
|
|
|
|
DEBUGASSERT(port < KINETIS_NPORTS);
|
|
|
|
if (port < KINETIS_NPORTS)
|
|
|
|
{
|
2011-08-15 20:07:54 +02:00
|
|
|
/* Get the base address of PORT block for this port */
|
|
|
|
|
|
|
|
base = KINETIS_PORT_BASE(port);
|
|
|
|
|
2011-08-15 00:47:44 +02:00
|
|
|
/* Clear the IRQC field of the port PCR register in order to disable
|
|
|
|
* the interrupt.
|
|
|
|
*/
|
|
|
|
|
|
|
|
regval = getreg32(base + KINETIS_PORT_PCR_OFFSET(pin));
|
|
|
|
regval &= ~PORT_PCR_IRQC_MASK;
|
|
|
|
putreg32(regval, base + KINETIS_PORT_PCR_OFFSET(pin));
|
|
|
|
}
|
2011-08-15 20:07:54 +02:00
|
|
|
#endif /* HAVE_PORTINTS */
|
2011-08-15 00:47:44 +02:00
|
|
|
}
|
2016-07-22 22:30:37 +02:00
|
|
|
#endif /* CONFIG_KINETIS_GPIOIRQ */
|