Commit Graph

21 Commits

Author SHA1 Message Date
Dave Marples
d0cda60442 In the current implementation we only use very high priority interrupts (levels 0, 0x10 and 0x20 in CORTEX-M speak) but that means there are loads of lower priority ones that are effectively unused. I have *not* changed the semantics of these levels but have 'shifted' them to be based around the midpoint of the available interrupts (0x80) rather than at the top end....that allows for interrupts to be defined above (or, indeed, below) them as needed by the application. This should have no functional effect on existing code but adds in a clean capability to define higher priority interrupts. 2018-12-03 17:41:59 -06:00
ahb
67c86e5aa9 add LPC4337FET256 2017-03-09 10:30:28 +01:00
Gregory Nutt
f06a06952f LPC43xx: 1KB is 1024, not 1025. Noted by phreakuencies. 2016-05-31 06:22:10 -06:00
Alexander Vasiljev
ad6f37edfa Adds definitions for the LPC4337jet100 chip. 2016-05-24 07:03:50 -06:00
Gregory Nutt
83bc1c97c3 Rename irqsave() and irqrestore() to up_irq_save() and up_irq_restore() 2016-02-14 16:11:25 -06:00
Lok Tep
1f4ce9e7f9 LPC43xx: Fix some NVIC priority definitions 2016-01-25 07:23:28 -06:00
Lok Tep
3b4c71ef8d more revert 2015-11-09 14:51:00 +01:00
Lok Tep
a8416d2a26 revert 2015-11-09 14:41:08 +01:00
Lok Tep
7d386866af Merged nuttx/arch into master 2015-11-09 14:24:41 +01:00
v01d
79fad2843a lpc4337: WIP 2015-10-30 20:15:18 -03:00
Lok Tep
5983019a45 merge from nuttx 2015-10-08 22:57:34 +02:00
Gregory Nutt
3a07b09b9a LPC43xx: Tweaks to pkolesnikov's LPC4370 changes to get a clean compilation 2015-10-01 10:00:25 -06:00
petekol
0eb1afcdef usb reset right 2015-09-30 17:13:32 +02:00
petekol
585fdf70d8 CONFIG_ARCH_CHIP_LPC4370FET100 2015-09-29 17:23:17 +02:00
Ilya Averyanov
675878b360 PC43xx: Fix NVIC_SYSH_PRIORITY_STEP define 2015-09-01 08:06:34 -06:00
Gregory Nutt
3855ce04e8 Beginning of high priority nested interrupt support for the ARMv7-M family 2013-12-21 11:03:38 -06:00
patacongo
5ab31d456e Add option to use BASEPRI instead of PRIMASK to disable interrupts in all ARMv7-M architectures
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5546 42af7a65-404d-4744-a932-0658087f49c3
2013-01-22 01:25:40 +00:00
patacongo
231e9e262d Add support to the LPC4330-Xplorer port for the Code Red toolchain
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4920 42af7a65-404d-4744-a932-0658087f49c3
2012-07-08 22:28:39 +00:00
patacongo
53bb15a078 Add LPC43 clock initialization logic
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4910 42af7a65-404d-4744-a932-0658087f49c3
2012-07-05 22:38:12 +00:00
patacongo
899eb0b5ce Add LPC43 Event Monitor, EEPROM, FLASH header files
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4898 42af7a65-404d-4744-a932-0658087f49c3
2012-07-02 22:15:20 +00:00
patacongo
089c4a508c Beginning of NXP LPC4330 port
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4876 42af7a65-404d-4744-a932-0658087f49c3
2012-06-27 19:17:30 +00:00