sergiotarxz/nuttx
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity
8,310 Commits 1 Branch 0 Tags 291 MiB
1db9858e9d
Commit Graph

60 Commits

Author SHA1 Message Date
Gregory Nutt
1db9858e9d KSZ80x1 PHY interrupts are active low and should trigger on the falling edge 2014-08-17 13:15:59 -06:00
Gregory Nutt
057af36c1d More of the PHY event notification logic change: Fix some compile errors when full feature is enabled; Add some missing ioctol logic 2014-08-16 15:04:09 -06:00
Gregory Nutt
ec47914cf8 Convert existing board specific PHY interrupt interfaces to use newly defined standard interface 2014-08-16 08:35:31 -06:00
Gregory Nutt
d79c311508 SAMA5 setenv.sh: Add another CodeSourcery install path 2014-08-16 08:33:20 -06:00
Gregory Nutt
eef608b942 Update README files 2014-08-12 10:01:12 -06:00
Gregory Nutt
1787b3e600 SAMA5: Enable the 32.768 crystal if SCHED_TICKLESS is selected 2014-08-11 14:29:43 -06:00
Gregory Nutt
c6273d083d Updated README files 2014-08-10 20:02:45 -06:00
Gregory Nutt
c7a51f4ef1 Cosmetic changed, updated README files, improved comments 2014-08-10 13:11:31 -06:00
Gregory Nutt
b39b227e2a Update README files 2014-08-10 11:34:20 -06:00
Gregory Nutt
0aa7209765 Change CONFIG_MSEC_PER_TICK to CONFIG_USEC_PER_TICK. This gives more options for system timers in general, but more importantly, let's us realize higher resolution for the case of CONFIG_SCHED_TICKLESS=y -- of course, at the risk of some new interger overvflow problems 2014-08-07 13:42:47 -06:00
Gregory Nutt
caba61999a Remove CONFIG_DISABLE_CLOCK 2014-08-07 12:35:24 -06:00
Gregory Nutt
7b9c44101d SAMA5D3 HSMCI: TX DMA is again disabled 2014-08-05 07:07:39 -06:00
Gregory Nutt
159bcc255d SAMA5 PCK: Add Main clock as an option for the PCK clock source 2014-08-03 10:17:50 -06:00
Gregory Nutt
276cc44878 SAMA5 HSMCI: e-enable TX DMA and verify that DMA writes to the SD card are functional. They are so now TX DMA is re-enabled in the driver. This might affect the SAMA5D3 platforms where the TX DMA problem was found. The SAMA4D3 and 4 use the same HSMCI driver. Much has change since then and it is not surprising that DMA is now functional. However, the has not be re-verified on the SAMA5D3 which has a different DMA controller. 2014-07-30 11:20:06 -06:00
Gregory Nutt
7b1b915226 SAMA5D4: Add auto-mounter support for HSMCI0 2014-07-29 15:34:31 -06:00
Gregory Nutt
53930d5531 SAMA5D-EK: Correct system timer frequency. Input clock is MCK/2, not MCK 2014-07-29 07:12:36 -06:00
Gregory Nutt
c79f86c72c SAMA5D3/4: All configurations. I suspect a MMC/SD multi-block DMA transfer issue. So for name, this feature is disabled in all configurations 2014-07-23 07:58:10 -06:00
Gregory Nutt
bad3ad58cb SAMA5: Add slow clock support 2014-07-19 13:07:55 -06:00
Gregory Nutt
695d1d933c Some cosmetic typo fixes 2014-07-09 07:12:16 -06:00
Gregory Nutt
befcb1c961 Fix some cloned errors in SAM GPIO interrupt setup 2014-07-07 15:54:37 -06:00
Gregory Nutt
44988c6ca6 Rename apps/examples/uip to apps/examples/webserver 2014-07-03 17:31:17 -06:00
Gregory Nutt
a5538e3431 SAMA5D3/4: UPLL divisor to generate 48MHz for OHCI is different from the two families. No idea why. 2014-07-03 12:28:11 -06:00
Gregory Nutt
0eb1666cb0 NET: Rename uiplib/UIPLIB to netlib/NETLIB 2014-07-02 16:04:25 -06:00
Gregory Nutt
339c8edf0e SAMA5D4-EK: NSH configuration now supports the RTC 2014-06-29 07:40:37 -06:00
Gregory Nutt
0443aa9947 SAMA5D4-EK: NSH confuration now has FAT/ROMFS, /dev/zero, /dev/random via TRNG, an NSH startup script, and a RAM disk at /tmp 2014-06-28 16:11:41 -06:00
Gregory Nutt
083986e814 SAMA5D4: USART peripheral clock appears to be MCK/2 2014-06-20 11:40:36 -06:00
Gregory Nutt
2cf637692a SAMA5D4-EK: Update pins used by HSMCI 2014-06-11 14:45:01 -06:00
Gregory Nutt
e0a07125c8 SAMA5D3/4: More renaming. Change SAMA5D3 EMAC to EMACA and SAMA5D4 to EMACB so that the configuration and build system can configure them. I might come up with something better later 2014-06-10 17:40:25 -06:00
Gregory Nutt
1f64e9c5b9 SAMA5: Back out most of commit c37b5b7b97d0644743c04f2c3d9e2b7ef9f5d698. Things are going to have to be done differently 2014-06-09 12:16:16 -06:00
Gregory Nutt
da8dfdcb6f Updated SAMA5 SFR header file for the SAMA5D4 2014-06-08 07:48:36 -06:00
Gregory Nutt
18224d88b3 Update SAMA5D4-EK PIO usage 2014-06-07 09:37:17 -06:00
Gregory Nutt
87eacd6bf2 SAMA5D4: Various changes to get the SAMA4D-EK to build 2014-06-06 15:39:40 -06:00
Gregory Nutt
50893fd36c SAMA5: Cosmetic clean-up of README files 2014-06-04 17:02:30 -06:00
Gregory Nutt
495b190e50 SAMA5: Rename most EMAC definitions to EMAC0 to handle the SAMA5D4 which has to EMAC modules and no GMAC 2014-06-04 12:04:24 -06:00
Gregory Nutt
f924601fc1 The alternate console device CONFIG_NSH_CONDEV must not be defined unconditionally. This causes errors when using Telnet sessions. This was solved by adding CONFIG_NSH_ALTCONDEV: CONFIG_NSH_ALTCONDEV enables or disables the feature then, if enabled, CONFIG_NSH_CONDEV provides the alternative console device name 2014-05-05 08:52:02 -06:00
Gregory Nutt
2f3fa3cbdc SAMA5 board.h files use type xcpt_t and so must include nuttx/irq.h for type xcpt_t 2014-04-17 10:01:15 -06:00
Gregory Nutt
9efb83c5ab Updated README files 2014-04-16 16:41:47 -06:00
Gregory Nutt
e21212f2b4 Undefine IRQPRIO in all configurations it should not be set 2014-04-16 08:29:39 -06:00
Gregory Nutt
f8024cf409 More trailing whilespace removal 2014-04-13 16:22:22 -06:00
Gregory Nutt
cd6039933e SAMA5: The PIO used for the red LED is also used as the camera module reset line: Added a configuration option to suppress use of the red LED if the PIO is used for another purpose. Reported by David Sidrane. 2014-04-11 15:57:35 -06:00
Gregory Nutt
3e085ec0af Long needed clean up of DNS resolver for coding style and naming conventions 2014-04-11 12:25:32 -06:00
Gregory Nutt
ac3865fd89 Updated README files and comments 2014-04-07 07:43:28 -06:00
Gregory Nutt
bd274dba7f SAMA5: Fix some issues with SDRAM at 528MHz CPU clock 2014-04-04 11:37:39 -06:00
Gregory Nutt
0b7ec97370 SAMA5 boards: Operation at 528Mhz has been verified 2014-04-04 10:36:53 -06:00
Gregory Nutt
d9e0116075 SAMA5 boards: Refresh all configuration files 2014-04-04 09:38:39 -06:00
Gregory Nutt
eb5a2d670c SAMA5 boards: Add set up for 528MHz CPU clock 2014-04-03 17:12:17 -06:00
Gregory Nutt
91c9e60e14 SAMA5D3 Xplained: Delay loop calibrated 2014-04-03 16:38:36 -06:00
Gregory Nutt
c9fc03d52f If LOWVECTORS is selected, then we need to clear the VBAR register. A bootloader may have left the VBAR in an bad state 2014-04-03 13:09:30 -06:00
Gregory Nutt
6201df6463 Updated comments and README 2014-04-02 09:03:29 -06:00
Gregory Nutt
0d66ba9c00 SAMA5 DBGU: Add logic to suppress DBGU reconfiguration when started from a bootloader 2014-04-02 09:03:27 -06:00