sergiotarxz/nuttx
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity
42,368 Commits 1 Branch 0 Tags 291 MiB
5b350f3a0f
Commit Graph

718 Commits

Author SHA1 Message Date
Abdelatif Guettouche
1e49f2929f arch/xtensa/src/esp32: Extract the IRAM region as a separate heap. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-06-23 08:37:01 +09:00
Abdelatif Guettouche
1719e9df94 arch/xtensa/esp32: Add the RTC Slow memory as a separate heap. 
This memory region can be accessed by both I & D buses, so the heap can
be used for data storage and code execution.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-06-23 08:37:01 +09:00
Abdelatif Guettouche
6582c19904 arch/xtensa/src/esp32/hardware/esp32_soc.h: Add a function to check if a 
buffer comes from the RTC Slow memory.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-06-23 08:37:01 +09:00
Abdelatif Guettouche
a4289c4f84 xtensa/esp32_aes.c: Use the same output when testing the AES driver. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-06-21 06:23:55 -05:00
Masayuki Ishikawa
841fb02ac0 arch: esp32: Replace getcoreid with the latest esp-idf's 
Summary:
- I noticed that the getcoreid macro in the latest esp-idf
  is much simpler than the current NuttX's.
- This commit replaces the macro with the latest esp-idf's

Impact:
- SMP only

Testing:
- Tested with esp32-devkitc:wapi_smp

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2021-06-21 06:21:39 -05:00
chenwen
8648970994 esp32&esp32c3/wifi: Fix the issues of Wi-Fi configuration being overwritten 2021-06-19 08:00:35 -03:00
chenwen
c3792f0aae xtensa/esp32: Support ESP32 RTC driver 2021-06-18 22:01:34 -05:00
Xiang Xiao
ab974edc84 sched: Identify the stack need to free by TCB_FLAG_FREE_STACK 
instead calling kmm_heapmember or umm_heapmember because:
1.The stack supplied by caller may allocate from heap too
2.It's hard to implement these two function in ASan case

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I196377822b7c4643ab4f29b7c1dc41dcd7c4dab1
 2021-06-18 05:44:41 -07:00
Abdelatif Guettouche
af5e0c620f Rename MODULE_TEXT to TEXT_HEAP as the latter is more generic. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-06-18 07:14:17 -05:00
Sara Souza
00edeee1ff xtensa/esp32: Adds I2C Bit banging reset 2021-06-18 00:48:27 -05:00
Masayuki Ishikawa
83ac6cd399 arch: xtensa: Remove ISYNC from xtensa_compareset() 
Summary:
- According to the Xtensa ISA document, this ISYNC instruction
  between WSR SCOMPARE1 and S32C1I is unnecessary

Impact:
- SMP only

Testing:
- Tested with esp32-devkitc:wapi_smp

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2021-06-17 09:58:29 -05:00
Masayuki Ishikawa
2d016f8d21 arch: xtensa: Fix the PS register handling 
Summary:
- I noticed that DEBUGASSERT sometimes happens in nxsem_wait()
  when testing Wi-Fi with esp32-devkitc:wsifi_smp
- The call stack was not from an interrupt handler and actually
  g_current_regs[] were correct, even though asserted with
  (up_interrupt_handler() == false)
- Finally, I found that we need to call rsync after we set
  a new value to the PS register which is described in the
  Xtensa document.
- This commit fixes this issue

Impact:
- All xtensa architectures

Testing:
- Tested with esp32-devkitc:wifi_smp and esp32-devkitc:wifi

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2021-06-17 09:58:29 -05:00
Sara Souza
7300bc8f1c xtensa/esp32: Adds I2C polled support. 2021-06-13 05:04:51 -05:00
Xiang Xiao
c0fdddc5d7 arch: Remove all go_nx_start from chip specifc source 
since the idle stack color is done in the common code now

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-06-10 06:50:41 -07:00
Xiang Xiao
fa0d123f87 arch: Colorize the idle thread stack in an unified way 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Idae8da53e5a4799a8edc0e882f17fd515b70cb14
 2021-06-10 06:50:41 -07:00
Xiang Xiao
6576306bca arch: Rename xxx_getsp to up_getsp 
All modern desgin support stack pointer and it's also an
important information, so let's standardize this interface.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-06-09 10:20:02 -07:00
Xiang Xiao
5b2a17b892 Include assert.h in necessary place 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-06-08 13:06:08 -07:00
Gustavo Henrique Nihei
0b3c2c7603 spi: Refactor SPI Slave interface prefix to sync with I2C Slave 2021-06-05 04:50:34 -07:00
Xiang Xiao
2e54df0f35 Don't include assert.h from public header file 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-06-03 08:36:03 -07:00
Sara Souza
7dd131b4c1 xtensa/esp32: Fixes support for HW flow control 2021-06-02 09:55:50 -05:00
Sara Souza
a54fe4ee1e xtensa/esp32-s2: Add support for serial HW flow control. 2021-06-01 21:37:37 -05:00
Alan C. Assis
929a4a7278 Fix dangling whitespace at the end of line 2021-06-01 07:49:54 +02:00
Sara Souza
f1d653c08c xtensa/esp32-s2: Adds support for serial driver, lowputc and termios. 2021-06-01 07:49:54 +02:00
Alan C. Assis
06795a221a Clean ESP32S2 Xtensa files 2021-06-01 07:49:54 +02:00
Abdelatif Guettouche
fccd5fbdd2 esp32s2_allocateheap.c: Use the address of the ROM data from the ROM linker script. 2021-06-01 07:49:54 +02:00
Alan C. Assis
7767acd24a Add initial ESP32S2 Xtensa support 2021-06-01 07:49:54 +02:00
Xiang Xiao
d7f96003cf Don't include debug.h from public header file 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-06-01 06:42:02 +09:00
chenwen
1d1dd8512f esp32&esp32c3/wifi: Support specific channel and bssid scan 2021-05-31 11:09:19 +01:00
Abdelatif Guettouche
45d01ae2a8 arch/xtensa/esp32_emac.c: Call phy_enable_interrupt correctly. 2021-05-28 20:46:27 -03:00
Abdelatif Guettouche
08aa9ce540 arch/xtensa/src/esp32/esp32_rt_timer: Fix typos and re-word some 
comments.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-05-27 05:01:54 -07:00
Abdelatif Guettouche
0f3d94e8e8 arch/risc-v/src/esp32c3/esp32c3_rt_timer.h: Add section headers. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-05-27 05:01:54 -07:00
Abdelatif Guettouche
f24a687f8e arch/xtensa/src/esp32/esp32_rt_timer.h: Add section headers. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-05-27 05:01:54 -07:00
Sara Souza
3144a5a272 xtensa: Fixes names of serial functions 2021-05-24 10:04:50 -05:00
Xiang Xiao
001e7c3e76 sched: Don't include nuttx/sched.h inside sched.h 
But let nuttx/sched.h include sched.h instead to
avoid expose nuttx kernel API to userspace.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-05-24 12:11:53 +09:00
Alan C. Assis
1a84314f5d xtensa: #ifdef SYMBOL is always true if SYMBOL defined as 0 2021-05-22 08:35:12 -05:00
jordi
ccc8c078f9 xtensa/esp32: Fix warning "is not defined" 
Detected with "-Werror" flag
 2021-05-19 20:03:03 +01:00
Chen Wen
e44ec9e48e xtensa/esp32: Fix code nxstyle issue 2021-05-19 06:45:42 -03:00
chenwen
f7db743152 xtensa/esp32: Support auto-sleep 2021-05-19 06:45:42 -03:00
chenwen
f50160f0e1 xtensa/esp32: Support tick-less OS 2021-05-19 06:45:42 -03:00
Abdelatif Guettouche
65e9ff5a48 xtensa/esp32/esp32_start.c: Remove an old and unnecessary piece of code. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-05-19 03:05:52 -05:00
Sara Souza
873293cc3f xtensa/esp32: Applies REG_MASK to extract a field value 2021-05-05 01:30:03 -07:00
Sara Souza
50daf24242 esp32/esp32-c3: Adds two helpers to extract and include a field value 2021-05-05 01:30:03 -07:00
Sara Souza
cce42d5f74 xtensa/esp32: Reorganize the pins initialization and adds showprogress in __start 2021-05-05 01:30:03 -07:00
Sara Souza
afd6b26232 xtensa/esp32: Replace serialout/in and fixes the fifo counter issue 2021-05-05 01:30:03 -07:00
Abdelatif Guettouche
e24af207f8 esp32/hardware: Include files of the same level by their names only and 
remove unnecessary includes.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-05-05 01:28:22 -07:00
Gustavo Henrique Nihei
f8a36f10c3 arch: Uniformize optimization flag setting across architectures 2021-04-29 19:17:16 -07:00
Alan C. Assis
0a0a034a3f esp32: replace EPS32 typo with ESP32 2021-04-29 18:03:05 -03:00
Gustavo Henrique Nihei
91955be0e1 xtensa/esp32: Change ESP32_RT_TIMER_TASK_PRIORITY comment into help text 2021-04-27 20:45:28 -06:00
Gustavo Henrique Nihei
2b179c5ab3 xtensa/esp32: Add missing default value for CONFIG_ESP32_GPIO_IRQ 2021-04-27 20:45:28 -06:00
Gustavo Henrique Nihei
95a76adc90 xtensa/esp32: Uniformize Kconfig alignment and styling 2021-04-27 20:45:28 -06:00
Gustavo Henrique Nihei
03c8e2d5c7 xtensa/esp32: Remove inconsistent usage of comment command 2021-04-27 20:45:28 -06:00
Gustavo Henrique Nihei
4d3fa83d7a xtensa/esp32: Remove redundant dependency 2021-04-27 20:45:28 -06:00
chenwen
666d718302 xtensa/esp32: Fix crash issue caused by null pointer operation 2021-04-27 11:00:16 +01:00
Sara Souza
0c440cfdfe xtensa/esp32: Reorganize the timer logic for wireless use 2021-04-22 21:38:16 -05:00
Dong Heng
fecdd27df3 esp32 & esp32c3: Update Wi-Fi BT and Wi-Fi libraries to fix some issues 2021-04-22 07:34:06 -03:00
Sara Souza
f696364b6a xtensa/esp32: Adds freerun wrapper 2021-04-21 16:37:39 -03:00
Masayuki Ishikawa
1b00e5d518 spinlock: Remove SP_SECTION 
Summary:
- SP_SECTION was introduced to allocate spinlock in non-cachable
  region mainly for Cortex-A to stabilize the NuttX SMP kernel
- However, all spinlocks are now allocated in cachable area and
  works without any problems
- So SP_SECTION should be removed to simplify the kernel code

Impact:
- None

Testing:
- Build test only

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2021-04-20 22:41:44 -05:00
Masayuki Ishikawa
1a9e7efde5 smp: Remove CONFIG_SMP_IDLETHREAD_STACKSIZE 
Summary:
- The CONFIG_SMP_IDLETHREAD_STACKSIZE was introduced to optimize
  the idle stack size for other than CPU0
- However, there are no big differences between the idle stacks.
- This commit removes the config to simplify the kernel code

Impact:
- All SMP configurations

Testing:
- Tested with ostest with the following configs
- spresense:smp, spresense:rndis_smp
- esp32-devkitc:smp (QEMU), maix-bit:smp (QEMU)
- sabre-6quad:smp (QEMU), sabre-6quad:netnsh_smp (QEMU)
- raspberrypi-pico:smp, sim:smp (x86_64)

Signed-off-by: Masayuki Ishikawa <asayuki.Ishikawa@jp.sony.com>
 2021-04-19 21:46:39 -05:00
Abdelatif Guettouche
c1b0ee436c arch/xtensa/src/esp32/Kconfig: Make bank switching default to disabled. 
This config is only useful when there is a > 4MB PSRAM and thus needs to
be selected by the user explicitly.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-04-19 07:48:35 -05:00
Xiang Xiao
2335b69120 arch: Allocate the space from the beginning in up_stack_frame 
arch: Allocate the space from the beginning in up_stack_frame

and modify the affected portion:
1.Correct the stack dump and check
2.Allocate tls_info_s by up_stack_frame too
3.Move the stack fork allocation from arch to sched

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-04-16 12:41:41 +09:00
Xiang Xiao
8640d82ce0 arch: Rename g_intstackbase to g_intstacktop 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-04-16 12:41:41 +09:00
YAMAMOTO Takashi
3806803a7a arch/xtensa/src/esp32/esp32_user.c: Implement L16SI emulation 
I don't know why this was not necessary before.
Probably I was just lucky about the combination of configs.
Or maybe some of recent changes happened to make the compiler
to use the instruction.

```
400d38f0 <mm_givesemaphore>:
400d38f0:       004136          entry   a1, 32
400d38f3:       228c            beqz.n  a2, 400d38f9 <mm_givesemaphore+0x9>
400d38f5:       0228            l32i.n  a2, a2, 0
400d38f7:       52cc            bnez.n  a2, 400d3900 <mm_givesemaphore+0x10>
400d38f9:       fea0b2          movi    a11, 254
400d38fc:       000306          j       400d390c <mm_givesemaphore+0x1c>
400d38ff:       00              .byte 00
400d3900:       019232          l16si   a3, a2, 2
400d3903:       feebe5          call8   400d27c0 <getpid>
400d3906:       0813a7          beq     a3, a10, 400d3912 <mm_givesemaphore+0x22>
400d3909:       05a1b2          movi    a11, 0x105
400d390c:       f241a1          l32r    a10, 400d0210 <_stext+0x1f0>
400d390f:       ff23e5          call8   400d2b4c <_assert>
400d3912:       1288            l32i.n  a8, a2, 4
400d3914:       0828a6          blti    a8, 2, 400d3920 <mm_givesemaphore+0x30>
400d3917:       880b            addi.n  a8, a8, -1
400d3919:       1289            s32i.n  a8, a2, 4
400d391b:       000606          j       400d3937 <mm_givesemaphore+0x47>
400d391e:       00              .byte 00
400d391f:       00              .byte 00
400d3920:       ffaf82          movi    a8, -1
400d3923:       015282          s16i    a8, a2, 2
400d3926:       00a082          movi    a8, 0
400d3929:       016282          s32i    a8, a2, 4
400d392c:       02ad            mov.n   a10, a2
400d392e:       feb125          call8   400d2440 <sem_post>
400d3931:       19a1b2          movi    a11, 0x119
400d3934:       fd4a96          bltz    a10, 400d390c <mm_givesemaphore+0x1c>
400d3937:       f01d            retw.n
400d3939:       000000          ill
```
 2021-04-15 12:18:52 +01:00
YAMAMOTO Takashi
a28de1d681 arch/xtensa/src/esp32/esp32_user.c: Fix S16I/L16LU emulation 
I misunderstood how imm8 is used to calculate the address.
 2021-04-15 12:18:52 +01:00
YAMAMOTO Takashi
51490bad55 modlib: Implement sh_addralign handling 
I've seen a module with 16 bytes .rodata alignment for xmm operations.
It was getting SEGV on sim/Linux because of the alignment issue.
The same module binary seems working fine after applying this patch.

Also, tested on sim/macOS and esp32 on qemu,
using a module with an artificially large alignment. (64 bytes)
 2021-04-14 21:17:07 -05:00
Alan Carvalho
ac5fb7d701 esp32: Fix GPIO Pull-Up/Pull-Down using RTC GPIO 
Some ESP32 GPIO pins (2, 4, 12, 13, 25, 27, 32) weren't accepting
pull-up/pull-down resistors. These pins are RTC GPIO pins and need
to have pull-up/pull-down configured in the RTC registers.

Co-authored-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-04-11 14:36:02 +01:00
Xiang Xiao
3f67c67aaf arch: Fix the stack boundary calculation and check 
All supported arch uses a push-down stack:
The stack grows toward lower addresses in memory. The stack pointer
register points to the lowest, valid working address (the "top" of
the stack). Items on the stack are referenced as positive(include zero)
word offsets from sp.
Which means that for stack in the [begin, begin + size):
1.The initial SP point to begin + size
2.push equals sub and then store
3.pop equals load and then add

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-04-10 08:39:54 -07:00
Xiang Xiao
0fdde5be26 arch/esp32: Fix error: Mixed case identifier found 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-04-10 12:00:06 +01:00
Gustavo Henrique Nihei
4d4250fcca xtensa/esp32: Improve SPI polling to use the entire HW buffer 2021-04-08 23:36:28 -05:00
Matias N
ab206687bb Replace wrong inclusion of sys/errno.h (toolchain provided) with errno.h 2021-04-07 21:27:06 -05:00
Alin Jerpelea
cb2ecefbf1 arch: xtensa: fix nxstyle errors 
Fix for errors reported by nxstyle tool

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-07 21:21:51 -05:00
Matias N
d88b5aac97 esp32: move common XTAL and RUN_IRAM configs to ESP32 KConfig 2021-04-07 21:45:48 +01:00
Alan Carvalho de Assis
bac84de45f esp32c3: Add support to RNG driver 
Co-authored-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
Co-authored-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-04-03 07:20:03 -05:00
Alan C. Assis
18f88c35fc esp32: Fix small typo that will trigger an error when IPv6 is enabled 2021-04-03 00:53:02 -05:00
Alin Jerpelea
778f050102 arch: xtensa: Author Gregory Nutt: update licenses to Apache 
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-02 03:14:31 -05:00
Gustavo Henrique Nihei
2d0e690803 xtensa/esp32: Refactor register access functions on SPI driver 2021-04-01 17:13:55 -03:00
Alin Jerpelea
3d96d5f2ce arch: esp32: Mixed Case identifier fix 
Fix Mixed Case Identifier reported by nxstyle

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-01 12:13:12 -05:00
Alin Jerpelea
4e26e39ffe arch: xtensa: Espressif Systems: update licenses to Apache 
Espressif Systems has submitted the SGA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-01 12:13:12 -05:00
Matias N
8ed2bb8eb5 esp32: remove unneeded "INFO" and "ERROR" prefixes to syslog calls 2021-03-31 07:37:18 -03:00
Matias N
a5a435e98f esp32: remove extra initial newline on syslog call 2021-03-31 10:04:42 +01:00
Gustavo Henrique Nihei
77c5995f93 xtensa/esp32: Use essential boolean expressions on condition statements 2021-03-30 01:23:02 -05:00
Gustavo Henrique Nihei
5e8eb420b7 xtensa/esp32: Fix MISO/MOSI data length field configuration 
Both fields were being configured with the total number of remaining
bytes instead of the number of bytes actually bound to DMA descriptors.
 2021-03-30 01:23:02 -05:00
Gustavo Henrique Nihei
b4dbae1b10 xtensa/esp32: Commit setbits configuration before SPI transaction 
The motivation is to avoid consistency issues when using Mixed Mode
(i.e. Polling and Interrupt/DMA transfers being used interchangeably)
 2021-03-30 01:23:02 -05:00
Gustavo Henrique Nihei
4d877abf3f xtensa/esp32: Avoid incrementing a NULL pointer for RX buffer 2021-03-30 01:23:02 -05:00
Gustavo Henrique Nihei
a27d5b1063 xtensa/esp32: Remove useless pointer check in SPI DMA exchange 2021-03-30 01:23:02 -05:00
Brennan Ashton
0a3b20e546 syslog: Drop extra carriage return from syslog calls 2021-03-28 21:24:00 -05:00
Gustavo Henrique Nihei
96037f01d5 xtensa/esp32: Clean up unused include headers from DMA driver 2021-03-26 23:40:44 -05:00
Gustavo Henrique Nihei
d3342795a8 xtensa/esp32: Fix wrong math round operation on DMA init 2021-03-26 23:40:44 -05:00
Gustavo Henrique Nihei
eb505ed866 xtensa/esp32: Fix DMA burst mode being unintendedly disabled 2021-03-26 23:39:53 -05:00
Sara Souza
59313c86d1 xtensa/esp32: Adds oneshot timer driver. 2021-03-24 16:01:26 -03:00
chenwen
f54aef9977 xtensa/esp32: Support esp32 wireless ioctl cmd 2021-03-23 16:29:52 -03:00
Abdelatif Guettouche
fcafacb9a3 esp32_allocateheap.c: Adjust the region of the heap coming from the 
external memory when a BSS section is allowed to reside there.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-03-23 16:39:01 +09:00
Abdelatif Guettouche
cc23bdeca4 boards/xtensa/esp32: Add a section in external memory to hold some BSS 
data.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-03-23 16:39:01 +09:00
YAMAMOTO Takashi
37300a43a5 esp32_part_ioctl: Return -ENOTTY for unknown commands 
It's traditional to use ENOTTY for this purpose.
Littlefs seems to rely on this behavior for BIOC_FLUSH.

Also, drop the log level.
 2021-03-22 19:49:27 -07:00
Gustavo Henrique Nihei
e4efa9dfa7 xtensa/esp32: Fix interrupt flag configuration for DMA transfers 
Previously SPI interrupts were enabled on DMA initialization. But since
the addition of SPI Mixed mode it created a side-effect, breaking
polling transfers. So now interrupts are enabled before the DMA
transactions and disabled once they are finished.
Furthermore, the transaction done flag is also cleared before a new
transaction starts.
 2021-03-21 00:16:59 -07:00
Gustavo Henrique Nihei
20d24fe148 xtensa/esp32: Fix esp32_spi_setbits for Polling when DMA is also enabled 
Commit 6382b2ba introduced the possibility of using SPI in Mixed mode,
i.e. performing SPI transfers via both polling and interrupts. However,
setbits was only applying the configuration if DMA was not enabled.
 2021-03-21 00:16:59 -07:00
Gustavo Henrique Nihei
27e2da33b4 xtensa/esp32: Fix buffer size word-alignment for DMA transfers 2021-03-20 19:23:44 -07:00
Gustavo Henrique Nihei
bfc551484a xtensa/esp32: Clean up esp32_dma_init code 
Removed "isrx" parameter whose only purpose is to trigger an assertion
on DEBUG builds. Also performed a minor refactor.
 2021-03-20 19:23:44 -07:00
Gustavo Henrique Nihei
dc7a0b0a5c xtensa/esp32: Use Polling instead of DMA for transfers below threshold 
Also refactored code to remove a confusing duplicate "dma_chan" field
which had the same purpose of the "use_dma" boolean.
 2021-03-19 23:13:32 -07:00
Abdelatif Guettouche
27d5c9340a esp32_allocateheap.c: Don't allocate the ROM CPU regions the same way in 
QEMU, the image is different.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-03-18 11:28:36 +09:00
Jiuzhu Dong
e96c8b9283 fs: allocate file/socket dynamically 
Change-Id: I8aea63eaf0275f47f21fc8d5482b51ffecd5c906
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
 2021-03-17 06:46:42 -07:00