sergiotarxz/nuttx
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity
46,033 Commits 1 Branch 0 Tags 291 MiB
5e902861d9
Commit Graph

58 Commits

Author SHA1 Message Date
Gustavo Henrique Nihei
e24621d545 arch: Convert DEBUGASSERT(false) into more intuitive DEBUGPANIC() 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-07-14 12:08:45 +08:00
Alan Carvalho de Assis
7d3eefbdce Review: Small improvements 
Fixes suggested by Gustavo and Petro
 2022-07-13 14:28:36 -03:00
Alan Carvalho de Assis
1e03a70258 Add DMA support to SPI and small issues on SPI driver 2022-07-13 14:28:36 -03:00
Alan Carvalho de Assis
368d65459c xtensa/esp32s3: Add DMA support to SPI 2022-07-13 14:28:36 -03:00
Alan Carvalho de Assis
1cb3c0d630 xtensa/esp32s3: Add support to Generic DMA 2022-07-13 14:28:36 -03:00
Nathan Hartman
849f760b77 Fix various typos 2022-07-08 02:15:54 +08:00
Gustavo Henrique Nihei
b9703619b5 xtensa: Unify common options within a single Make.defs 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-07-05 23:07:00 +08:00
Alan Carvalho de Assis
922ebe5b96 Fix IOMUX function number 2022-07-01 23:34:21 +08:00
Gustavo Henrique Nihei
ea829cf7d5 xtensa/esp32s3: Add driver for I2C peripheral in Master mode 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-06-30 00:32:17 +03:00
Alan Carvalho de Assis
4eddde90b0 esp32s3: Add support to USBSERIAL to use as console 2022-06-16 17:20:32 +03:00
Abdelatif Guettouche
1f90e5a5b0 arch/xtensa: Don't build xtensa_coproc.S, it has only macros and is 
included when needed.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-06-13 21:32:23 +03:00
Abdelatif Guettouche
c99776659f xtensa: Delete the assembly signal trampoline. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-05-31 17:40:54 +08:00
chao.an
3f65b562bb arch: inline up_interrupt_context() 
inline the up_interrupt_context() to avoid unnecessary stack pushes

Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-05-26 04:36:07 +08:00
Alan Carvalho de Assis
d4b0fc9eb4 xtensa/esp32s3: Add basic support to SPI 
Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
Co-authored-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-05-25 16:10:29 -03:00
zhuyanlin
23d35336ad xtensa:esp32: enable cp processor of app core 
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-05-23 22:02:24 +02:00
zhuyanlin
883337c3a0 xtensa:fpu: add up_fpucmp and enable CONFIG_ARCH_FPU macro 
For arch with CP_NUM > 0, enable ARCH_FPU

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-05-16 12:30:39 +03:00
zhuyanlin
f423f94d08 arch:xtensa: modify xtensa_context_save/restore function 
with FPU registers in xcp context, use pointer instead of double
pointer

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-05-13 15:28:45 +02:00
Abdelatif Guettouche
da273fce0b arch/xtensa: Replace the xcp context with stack context to improve context switching 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-04-29 02:51:41 +08:00
Abdelatif Guettouche
aaa5316235 arch/xtensa: Simply use xtensa_createstack for CPU1 idle task. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-04-26 01:36:54 +08:00
Abdelatif Guettouche
56ecd44f63 arch/xtensa: Color the other CPUs task when they are created. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-04-22 01:12:55 +08:00
Abdelatif Guettouche
64e4c9ca02 arch/xtensa: Move xtensa_save_context to up_saveusercontext for 
consistency with other archs.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-04-21 01:59:34 +08:00
Abdelatif Guettouche
6db910a1aa arch/xtensa: Use syscall interface for xtensa_save/restore_context. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-04-21 01:59:34 +08:00
Xiang Xiao
6bc61b5752 arch/xtensa: Remove FAR from chip and board folder 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-04-17 18:42:38 +03:00
Abdelatif Guettouche
f527abc324 arch/xtensa: Build the xtensa_tcbinfo.c file for S2 and S3. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-04-04 21:25:47 +08:00
Gustavo Henrique Nihei
024364ebbd xtensa/esp32s3: Add support for GPIO pin interrupts 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-23 07:23:51 +09:00
Gustavo Henrique Nihei
0e67dc8637 xtensa/esp32s3: Add support for GPIO read/write operations 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-23 07:23:51 +09:00
Petro Karashchenko
68902d8732 pid_t: unify usage of special task IDs 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-03-22 21:22:32 +08:00
Gustavo Henrique Nihei
9ae826e925 xtensa/esp32s3: Fix output handling for pins numbered from 32 to 48 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-19 01:08:27 +02:00
Gustavo Henrique Nihei
f21a9f9578 xtensa/esp32s3: Enable UART pins to use IOMUX and bypass GPIO matrix 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-19 01:08:27 +02:00
Gustavo Henrique Nihei
77944ceb42 xtensa/esp32s3: Clean up and improve GPIO driver interface 
Also fix an inconsistenct regarding the ESP32S3_NGPIOS macro. Although
correctly defining the number of available GPIOs in ESP32-S3, it was
erroneously being used for verifying the pin range.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-19 01:08:27 +02:00
Gustavo Henrique Nihei
43b7d9b0da xtensa/esp32s3: Sync GPIO sigmap with IDF version 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-19 01:08:27 +02:00
Abdelatif Guettouche
5085f854d0 esp32(s3)_start.c: In SMP mode, don't disable APP CPU at startup. It starts in a 
disabled state and if OpenOCD is used this will clear OpenOCD configuration.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-17 14:33:32 -03:00
Abdelatif Guettouche
b98676f8be esp32(s3)_cpustart.c: Don't reset app CPU if it was already configured by 
OpenOCD.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-17 14:33:32 -03:00
Gustavo Henrique Nihei
39e9a17e60 xtensa/esp32s3: Apply style fixes throughout serial driver 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-16 19:06:39 -03:00
Gustavo Henrique Nihei
0dc2930403 xtensa/esp32s3: Remove code for not yet supported USB-Serial Driver 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-16 19:06:39 -03:00
Gustavo Henrique Nihei
57273ad994 xtensa/esp32s3: Fix IRQ setup hardcoded to CPU 0 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-16 19:06:39 -03:00
Petro Karashchenko
b04447d066 timer_lowerhalf: minor improvements 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-03-15 10:30:48 +08:00
Gustavo Henrique Nihei
7ede285cfe xtensa/esp32s3: Add support for RT-Timer based on Systimer peripheral 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-12 15:27:30 +02:00
Gustavo Henrique Nihei
86b18bd6e9 xtensa/esp32s3: Move code documentation to the correct place 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-12 11:53:14 +08:00
Gustavo Henrique Nihei
a4db4031c9 xtensa/esp32s3: Stall Systimer when core 1 is temporarily stalled 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-12 11:53:14 +08:00
Xiang Xiao
39fb09738d arch: Move [arm|xtensa]_intstack_[alloc|top] to common header file 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-03-11 23:08:07 +02:00
Gustavo Henrique Nihei
c8796c1bc2 xtensa/esp32s3: Move SPI RAM configuration out of Peripheral menu 
Menu for configuration of SPI RAM was wrongly placed inside the menu
for peripheral selection.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-11 11:05:24 +08:00
Alan C. Assis
dc1b6776b9 xtensa/esp32s3: Add SPI RAM/PSRAM Support 2022-03-09 19:22:56 +02:00
Gustavo Henrique Nihei
4a29fa903b xtensa/esp32s3: Enable SMP support 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-09 10:42:50 +08:00
Abdelatif Guettouche
c820085a23 arch/xtensa/esp32s3: Add encrypted support for SPI FLASH. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-03 19:57:59 +08:00
Abdelatif Guettouche
9d5b13cd0e xtensa/esp32s3: Add SPI-Flash support. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-03 19:57:59 +08:00
Gustavo Henrique Nihei
16030f713e xtensa/esp32s3: Add support for Free-running Timer 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-03 10:58:53 +08:00
Gustavo Henrique Nihei
3b7a6ae311 xtensa/esp32s3: Add support for Tickless kernel using Systimer 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-02 18:08:44 +01:00
zhuyanlin
fbc1da98b7 xtensa: use swint to swith context 
Reason for use sw-interrupt as syscall interrupt:
The xtensa `syscall` instruction can cause SYSCALL interrupt.
But SYSCALL interrupt is same interrupt level with level-one
interrupt.
Nuttx swint can enter `enter_critical_section` and gerenate
interrupt.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-02-25 20:43:03 +08:00
Gustavo Henrique Nihei
ea1b49119a xtensa/esp32s3: Apply minor fixes to documentation and code style 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-02-25 10:51:25 +08:00