Commit Graph

427 Commits

Author SHA1 Message Date
Gustavo Henrique Nihei
4f31c89963 esp32c3-devkit: Rename linker script to indicate use for Flat mode
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-05-18 11:43:52 +08:00
Gustavo Henrique Nihei
c778f35f08 risc-v/esp32c3: Add support for Protected Mode
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-05-18 11:43:52 +08:00
Xiang Xiao
5958d3ac62 risc-v: Move "LDFLAGS += -melf32lriscv" from Make.defs to Toolchain.defs
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-16 11:17:08 +03:00
Xiang Xiao
1f920e55d3 Move warning option from Make.defs to Toolchain.defs
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-15 15:40:35 +03:00
Masayuki Ishikawa
dc2a01e75a boards: rv-virt: Add knsh64 related files
Summary:
- This commit adds knsh64 related files

Impact:
- None

Testing:
- Tested with qemu-6.2

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-05-13 04:14:01 +08:00
Eero Nurkkala
77e36d1acc risc-v/mpfs: introduce IHC driver
This provides an example of Asymmetric Multiprocessing (AMP). The
master from Linux sends pings that this NuttX echoes back. The system
uses RPMsg from OpenAMP.

The Inter-Hart Communication module is present in the vendor's software
stack with the tag "2021.11". The software is present on github at the
polarfire-soc project. The following conditions must be met:

 1. FPGA programmed with 2021.11 software
 2. HSS (Vendor bootloader) with 2021.11 software
 3. U-boot and Linux kernel from 2011.11 software

Currently the IHC works as a slave only on the hart number 4.

On the NuttX side, this patch uses rptun that incorporates rpmsg and
virtio. If it used only rpmsg and virtio, the future maintenance would
likely be much heavier. Using rptun also simplifies many things.

Upon success, the master side from Linux may issue an example test:

root@icicle-kit-es-amp:/opt/microchip/amp/rpmsg-pingpong# ./rpmsg-pingpong

However, the rpmsg-pingpong.c (compiled on target with gcc), may need to
be modified as seen below to match the device id:
 - char *rpmsg_dev="virtio0.rpmsg-amp-demo-channel.-1.0";
 + char *rpmsg_dev="virtio0.rpmsg-amp-demo-channel.-1.1024";

This work uses a separate linker script. Due to a bug yet unknown to date,
a small NuttX, when loaded by the vendor HSS bootloader, will cause the
Linux kernel to hang at boot. Thus, the binary size is increased with
a section 'filler_area' whose only purpose is to increase the image size
so that the Linux kernel will boot up.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-05-12 22:56:12 +08:00
Xiang Xiao
bbdbca00c1 libc/assert: let CONFIG_NDEBUG default to !CONFIG_DEBUG_ASSERTIONS
so the user could just change CONFIG_DEBUG_ASSERTIONS in most case

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-04 10:07:34 +03:00
Masayuki Ishikawa
0908c67d73 boards: rv-virt: Add support ELF to nsh and nsh64 defconfigs
Summary:
- This commit adds support ELF to nsh and nsh64 defconfigs

Impact:
- None

Testing:
  nsh> mount -t hostfs -o fs=../apps/bin /system/bin
  nsh> hello
  Hello, World!!

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-05-03 13:57:24 +08:00
Masayuki Ishikawa
9b20f97064 boards: rv-virt: Add hostfs support to nsh and nsh64 defconfigs
Summary:
- This commit adds hostfs support to nsh and nsh64 defconfigs

Impact:
- None

Testing:
- Tested with qemu-6.2

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-05-02 19:46:58 +08:00
Ville Juven
a5d49140ea MPFS: Add dummy rofms image
To allow building with ROMFS enabled
2022-05-02 16:13:15 +08:00
Ville Juven
31b916c485 MPFS: Add kernel space mappings
Mappings are done with vaddr=paddr.
- I/O space mapped with two gigapages
- Kernel space mapped to statically allocated page tables. 2MB of kernel
  memory is supported.
- Page pool is mapped to the kernel space, to allow virtual memory access
  for the kernel e.g. to initialize the page memory when it is allocated.
2022-05-02 16:13:15 +08:00
Ville Juven
2287ebcbcf MPFS: Add knsh (CONFIG_BUILD_KERNEL=y)
Re-name the old knsh (CONFIG_BUILD_PROTECTED=y) to pnsh
2022-05-02 16:13:15 +08:00
Xiang Xiao
aeb9c5d822 boards: Move -fno-strict-aliasing from Make.defs to Toolchain.defs
and migrate MAXOPTIMIZATION into ARCHOPTIMIZATION

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-01 11:36:41 +03:00
Xiang Xiao
b12c0a1e31 boards: Remove -std=c++1x from Make.defs
let the implementation of standard library choice what they want

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-29 21:08:14 -03:00
Ville Juven
d495007943 MPFS: Remove # CONFIG_ARCH_FPU is not set from defconfigs
For some reason # CONFIG_ARCH_FPU is not set also unsets ARCH_FPU
for the .config file, meaning FPU support is not built.
2022-04-27 23:20:51 +08:00
Xiang Xiao
8f8ee25a9c boards: Move -g from Make.defs to Toolchain.defs
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-25 16:23:03 +03:00
Xiang Xiao
25d819253b boards/risc-v: Remove "MAXOPTIMIZATION = -Os" from Make.defs
since it is already defined in Toolchain.defs

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-25 07:58:00 +03:00
Xiang Xiao
75326e563d boards: Move -fno-common from Make.defs to Toolchain.defs
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-25 07:57:29 +03:00
Xiang Xiao
547c85b0ae boards: Switch the elf link script to binfmt/libelf/gnu-elf.ld
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-24 17:02:37 +02:00
chao.an
1c8e12406e compile/opt: add config DEBUG_LINK_MAP
Selecting this option will pass "-Map=$(TOPDIR)$(DELIM)nuttx.map" to ld
when linking NuttX ELF. That file can be useful for verifying
and debugging magic section games, and for seeing which
pieces of code get eliminated with DEBUG_OPT_UNUSED_SECTIONS.

Signed-off-by: chao.an <anchao@xiaomi.com>
2022-04-22 01:37:23 +08:00
chao.an
64d7326ed5 compile/opt: add config DEBUG_OPT_UNUSED_SECTIONS
Enable this option to optimization the unused input sections with the
linker by compiling with " -ffunction-sections -fdata-sections ", and
linking with " --gc-sections ".

Signed-off-by: chao.an <anchao@xiaomi.com>
2022-04-22 01:37:23 +08:00
Jiuzhu Dong
de1c184e6c boards/sim: support rc.sysinit
Follow: http://glennastory.net/boot/sysinit.html

This is first script that init runs is rc.sysinit. This
script does serval initialization tasks about basic service.

The boot sequence currently provided to the board level is:
board_earlyinitialize->
    board_lateinitialize(Peripherals driver, core driver, ...)->
	run rcS script(mount fs, run service) ->
	    board_appinitialize->

After this patch:
The boot sequence currently provided to the board level is:
board_earlyinitialize->
    board_lateinitialize(core driver,...)->
	run rc.sysinit script(mount fs, run core service) ->
	    board_appinitialize(Peripherals driver)->
		run rcS script(run other service)->

So, Peripheral drivers can do more with the file system and
core services.

Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2022-04-21 12:54:53 +03:00
Xiang Xiao
7a0fd8d10f arch/risc-v: Remove FAR from chip and board folder
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-19 00:22:45 +03:00
chao.an
dc2e4b7024 boards/ostest: remove board ostest implement
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-04-18 22:22:16 +08:00
chao.an
5bdfae66ce arch/arm: export arm_saveusercontext()
rename arm_saveusercontext() -> up_arm_saveusercontext()

Signed-off-by: chao.an <anchao@xiaomi.com>
2022-04-18 22:22:16 +08:00
Jan Charvat
6d566e0fda boards/risc-v/esp32c3: ESP32C3 TWAI (CAN) controller config for DevKitM-1.
Signed-off-by: Jan Charvat <jancharvat.charvat@gmail.com>
2022-04-15 22:55:26 +08:00
Jan Charvat
0d9d2f4bf8 boards/risc-v/esp32c3: ESP32C3 TWAI (CAN) controller bringup for DevKitM-1.
Signed-off-by: Jan Charvat <jancharvat.charvat@gmail.com>
2022-04-15 22:55:26 +08:00
Huang Qi
1975878835 arch/risc-v: Apply common mtime driver to mtime based chps
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-04-12 12:14:40 +03:00
Ville Juven
c15b6701ce RISC-V: Implement option to run NuttX in supervisor mode (S-mode)
- Add config "ARCH_USE_S_MODE" which controls whether the kernel
  runs in M-mode or S-mode
- Add more MSTATUS and most of the SSTATUS register definitions
- Add more MIP flags for interrupt delegation
- Add handling of interrupts from S-mode
- Add handling of FPU from S-mode
- Add new context handling functions that are not dependent on the trap
  handlers / ecall

NOTE: S-mode requires a companion SW (SBI) which is not yet implemented,
      thus S-mode is not usable as is, yet.
2022-04-01 16:19:42 -03:00
Gustavo Henrique Nihei
7b4d9f0afd esp32[s2/s3/c3]: Add defconfigs for testing C++
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-03-30 11:19:29 +08:00
Gustavo Henrique Nihei
06d0a9f1ad xtensa|risc-v: Make CXX exception and RTTI depend on Kconfig options
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-03-30 11:19:29 +08:00
Gustavo Henrique Nihei
a0617177e8 risc-v/esp32c3: Fix inclusion of C++ constructors/destructors table
RISC-V GCC is configured with --enable-initfini-array so it emits an
.init_array section instead of .ctors

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-03-30 11:19:29 +08:00
Lee Lup Yuen
416ec42077 riscv/esp32c3: Remove check for LCD driver
## Summary

`esp32c3_spi2_cmddata()` implements SPI Cmd/Data `SPI_CMDDATA()` for only 3 LCD drivers: ST7735, ST7789 and GC9A01.

This patch removes the check for LCD drivers, so that SPI Cmd/Data will work for all LCD drivers.

More details: https://github.com/apache/incubator-nuttx/pull/5898

## Impact

This change impacts LCD drivers that call `SPI_CMDDATA()`.

Previously `SPI_CMDDATA()` would fail with `ENODEV` for LCD drivers other than ST7735, ST7789 and GC9A01.

After patching, `SPI_CMDDATA()` will work correctly with all LCD drivers.

## Testing

This is a minor patch so no testing is needed.
2022-03-29 23:09:57 -03:00
Richard Tucker
dc93c309b5 boards/risc-v/litex/arty_a7: update README to include building in LITESDCARD peripheral 2022-03-30 02:35:27 +08:00
Richard Tucker
3939575d7c boards/risc-v/litex/arty_a7: add SDCARD support for the Arty_A7 board 2022-03-30 02:35:27 +08:00
Ville Juven
30c25a95f3 MPFS: Fix error in flat build linker script
Use sram instead of ksram (copy&paste error)
2022-03-28 14:05:51 +03:00
Masayuki Ishikawa
594ae1e7fc boards: rv-virt: Fix stack corruption for rv64 configs
Summary:
- This commit fixes stack corruption for rv64 configs

Impact:
- None

Testing:
- Tested with qemu-6.2

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-03-25 12:26:12 +02:00
Gerson Fernando Budke
4caa8b19e9 boards/risc-v/esp32c3: Fix mcuboot configs
MCUboot apps were moved to examples directory. This fix configs due to
recent changes.

Signed-off-by: Gerson Fernando Budke <gerson.budke@ossystems.com.br>
2022-03-19 16:09:49 +02:00
Janne Rosberg
49abe527ca risc-v/mpfs/icicle: add example config for ethernet 2022-03-18 17:22:27 +02:00
Janne Rosberg
8c755c9414 esp32c3-devkit/ble: add CONFIG_NETDEV_LATEINIT to defconfig 2022-03-18 17:22:27 +02:00
Janne Rosberg
cff7c760a5 bl602evb/wifi: add CONFIG_NETDEV_LATEINIT to defconfig 2022-03-18 17:22:27 +02:00
Ville Juven
15960f25a5 MPFS: Add board_memorymap.h
Move the target specific memory map to a separate file so there is no
need to copy&paste the __xxram_start etc linker symbols to each file
that needs them.

Also add MMU flags for I/O and kernel areas, they will be needed
when the kernel runs with virtual addresses also.
2022-03-18 09:35:00 -03:00
Ville Juven
13fd93ed2a MPFS: Add linker script for CONFIG_BUILD_KERNEL 2022-03-18 18:20:12 +08:00
Xiang Xiao
54e630e14d arch: Merge up_arch.h into up_internal.h
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-03-14 09:32:17 +02:00
Petro Karashchenko
dab5bb6bd3 boards/Kconfig: introduce ARCH_BOARD_COMMON option
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-03-11 16:00:00 +08:00
Jukka Laitinen
81a19c1ce8 arch/riscv/src/mpfs: Make cleaner pinmux configurations for USB
Mux USB IO pins one-by-one using package specific pinmux definitions. This avoids accidentally overwriting IO settings for other pins.

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2022-03-11 00:22:43 +02:00
Xiang Xiao
ee931c137f boards: Remove -fno-builtin
it's more efficent to generate the machine code directly if possible

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-03-10 19:46:01 +02:00
Eero Nurkkala
8c1ab129ac risc-v/mpfs: add USB device driver
This adds a simple USB device driver for the mpfs. However,
this driver is still at its early phase. Only limited testing
with CDC/ACM has been conducted.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-03-08 16:49:29 +08:00
Eero Nurkkala
18b5048dda risc-v/mpfs: add USB IOMUX definitions
This adds the proper IOMUX definitions for the Icicle and
m100pfsevp boards.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-03-08 16:49:29 +08:00
Xiang Xiao
44bd3212d4 arch: Remove SYS_RESERVED from Kconfg
let's arch define the correct value instead

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-27 22:54:13 +08:00
Alan C. Assis
73098e2a55 example/oneshot: Update defconfig to use default 2s 2022-02-25 00:10:45 +08:00
Xiang Xiao
67cda6ce1e board/esp32: Update esp-wireless-drivers-3rdparty
and add -fno-common since the symbol duplication is fixed in the new firmware

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-24 09:05:40 +01:00
Xiang Xiao
54b886ca0d boards: Add -fno-common to ARCHCFLAGS and ARCHCXXFLAGS
since elf loader can't handle SHN_COMMON

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-23 22:00:32 +08:00
Xiang Xiao
9836c6be9b boards: Remove CONFIG_CLOCK_MONOTONIC from all defconfig
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-23 01:21:26 +08:00
Xiang Xiao
163fe4ff0b boards: Replace CONFIG_CYGWIN_WINTOOL with CONVERT_PATH
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-20 21:15:36 +01:00
Xiang Xiao
1d1bdd85a3 Remove the double blank line from source files
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-20 20:10:14 +01:00
Huang Qi
0c5aff9be6 risc-v/qemu-rv: Supports SMP up to 8 cores
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-02-18 13:25:01 +08:00
Alan Rosenthal
8defb843aa Remove duplicate linker script definitions
## Summary
A lot of linker scripts were listed twice, once for unix, once for windows.

This PR cleans up the logic so they're only listed once.

 ## Impact
Any opportunity to use a single source of truth and reduce lines of code is a win!

 ## Testing
CI will test all build
2022-02-17 02:55:25 +08:00
Huang Qi
f40a673fdf boards/rv-virt: Supports FPU test and ostest in both rv32/rv64
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-02-17 01:09:51 +08:00
Xiang Xiao
b0fa232918 boards: Remove -D__NuttX__ from the individual Make.defs
since it is defined globally in tools/Config.mk now

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-15 15:26:38 +01:00
Masayuki Ishikawa
613cbbf688 boards: risc-v: Move -fno-common option to ARCHCFLAGS/ARCHCXXFLAGS
Summary:
- Apply the same style as sabre-6quad

Impact:
- None
- NOTE: esp32c3-devkit still remains old style because of link errors

Testing:
- Build only

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-02-15 16:27:53 +08:00
Huang Qi
ae3fa5cfbf boards/k210: Add -mstrict-align to arch level flags since it don't support unaligned memory access
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-02-14 11:32:34 +08:00
Huang Qi
64130b4775 risc-v: Use _ebss instead of _default_stack_limit as idle stack base
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-02-13 14:37:57 +08:00
Huang Qi
ef3219e83d boards: Refresh all configs
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-02-09 21:21:43 +08:00
Huang Qi
c0a0de97ce Revert "libc: Call pthread_exit in user-space by up_pthread_exit"
This reverts commit f4a0b7aedd.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-02-09 21:21:43 +08:00
Xiang Xiao
0499979908 sched: Disable pthread by default when DEFAULT_SMALL is enabled
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-07 12:04:03 +08:00
Xiang Xiao
a9d7a776c4 sched: Remove SDCLONE_DISABLE option and config
since the related code was removed by:
commit 4d5a964f29
Author: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
Date:   Tue Feb 23 18:04:13 2021 +0800

    net: unify socket into file descriptor

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-01-31 19:03:20 +01:00
Ville Juven
7c116efe05 Add support for a ROMFS image for MPFS
The image must be placed into:
boards/risc-v/mpfs/icicle/include/boot_romfsimg.h

The image is mounted by mpfs_bringup, which is run by the application
itself, or by board_late_initialize() in the case when
CONFIG_BOARD_LATE_INITIALIZE is defined, e.g. with CONFIG_BUILD_KERNEL
2022-01-27 11:06:43 -03:00
Huang Qi
0c28fe9831 boards: Remove unused NXFLAT flags from Make.defs
Since NXFLAT only avaliable on arm.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-01-27 11:08:43 +08:00
Ville Juven
8a4881c4e5 Implement CONFIG_BUILD_PROTECTED with MMU
NOTE: THIS ONLY WORKS WHEN KERNEL RUNS IN M-MODE FOR NOW

This frees the PMP for other use, e.g. HART memory separation.

The page tables are statically allocated, 1 per level.

This feature is now behind CONFIG_MPFS_USE_MMU_AS_MPU, because
only the MPFS target supports this (others are not tested).

If the MMU is used for memory separation within a HART, the PMP must
still be configured to allow user access to the memory mapped for the
HART, because PMP *rekoves* access by default. At this point all of
the user memory as well as the kernel RAM are opened.

A more flexible solution for PMP configuration will follow.
2022-01-25 20:22:34 +08:00
Ville Juven
7eb726d57f Add proper user/kernel space linker scripts for knsh target
The old implementation used the default ld.script for the kernel side
which did not obey the memory.ld limits whatsoever.

Also, provide the user space addresses from the linker script to get rid
of the pre-processor macros that define (incorrect) default values for
the user space composition.
2022-01-25 20:22:34 +08:00
Ville Juven
356ae984ac Add knsh target for icicle
Template for knsh target (e.g. protected build with user space nsh)

Requires MPU and linker script updates to work
2022-01-25 20:22:34 +08:00
Ville Juven
3fa0834e7d Fix PROTECTED_BUILD build errors for mpfs target
Userspace struct definition did not have pthread_startup
The definition for up_pthread_exit was not compiled ever
2022-01-25 20:22:34 +08:00
Eero Nurkkala
e5a9ba5602 risc-v/mpfs: opensbi defconfig: refresh config
Some of the configuration options have changed, so update this
config file accordingly.

In this example config, the following hart configuration takes
place:
  hart1: 0xafb00000 (Another NuttX)
  hart2: unused
  hart3: 0x80200000 (u-boot and Linux kernel)
  hart4: 0x80200000 (u-boot and Linux kernel)

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-01-24 23:25:53 +08:00
Xiang Xiao
04297c3ca3 board: Remove -fno-omit-frame-pointer from Make.defs
except sim arch, since this flag is set inside Toolschain.defs now

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-01-20 16:00:48 +01:00
Xiang Xiao
c5c50acb93 board: Remove -fstrict-volatile-bitfields
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-01-20 16:00:48 +01:00
Xiang Xiao
3e28192b2f board/bl602: Remove -fshort-enums
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-01-20 16:00:48 +01:00
Jukka Laitinen
fc3167b584 boards/riscv/mpfs: Remove reference to .vectors in linker scripts
There is no such section. Instead, place the object mpfs_head.o at the start of
the text.

Put mpfs_head.o directly into the arch library; there is no need to define
it separately in HEAD_ASRC.

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2022-01-20 01:37:34 +08:00
Xiang Xiao
8bcdefafc9 board: Remove -fno-strength-reduce
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-01-19 00:14:03 +01:00
Petro Karashchenko
8d3bf05fd2 include: fix double include pre-processor guards
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-16 11:11:14 -03:00
Huang Qi
5792d851e5 arch/risc-v/qemu-rv: Support both rv32/rv64 core
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-01-15 11:42:01 +08:00
Eero Nurkkala
c67a1a4de1 risc-v/mpfs: ld-envm-opensbi.script: add all opensbi code to .text.sbi
Add the rest of the OpenSBI code to .text.sbi -section. They belong
to there. This frees up some space in the very limited eNVM.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-01-14 10:10:24 +01:00
Eero Nurkkala
76c6ccc732 risc-v/mpfs: opensbi/defconfig fix RAM start address
RAM is expected to start from 0x08000000, not from
0x80000000 in this case. DDR starts from 0x80000000.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-01-14 10:10:24 +01:00
Huang Qi
10bb48b9b4 arch/risc-v: Merge rv32im and rv64gc into common
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-01-11 23:24:33 +08:00
Eero Nurkkala
b4d2944df7 tools/mpfs: prepare OpenSBI image
Polarfire Icicle board has only (128K - 256) bytes for the bootloader
in the non-volatile eNVM. This space is barely enough for running NuttX.
If OpenSBI is selected, it will be placed in DDR. This all means the
nuttx.bin file grows into gigabyte size, filling the unused space (ddr -
envm) with zeroes.

The memory layout is as follows:

MEMORY
{
    ddr  (rx)          : ORIGIN = 0x80000000, LENGTH = 4M
    envm (rx)          : ORIGIN = 0x20220100, LENGTH = 128K - 256
    l2lim  (rwx)       : ORIGIN = 0x08000000, LENGTH = 1024k
    l2zerodevice (rwx) : ORIGIN = 0x0A000000, LENGTH = 512k
}

OpenSBI library is used as a separate binary, which is stored into
eMMC or SD-card. It is then loaded into its precise location in DDR.

Thus, we separate OpenSBI from NuttX and end up with two images
by utilizing the objcopy options:

  --only-section=sectionpattern (-j in short)
  --remove-section=sectionpattern (-R in short)

This is only valid when CONFIG_MPFS_OPENSBI is set.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-01-04 19:45:14 +08:00
Gustavo Henrique Nihei
cff2bc05e0 esp32c3-devkit: Restrict FS options when Flash Encryption is enabled
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-01-01 20:37:44 +08:00
Gustavo Henrique Nihei
25f2dc2077 risc-v/esp32c3: Enable the creation of encrypted Flash partitions
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-01-01 20:37:44 +08:00
Masayuki Ishikawa
98899ffe11 boards: hifive1-revb: Enable some nsh commands in nsh/defconfig
Summary:
- I noticed that most of nsh commands are disabled by default
  due to the recent changes for CONFIG_MM_SMALL=y in apps.
- This commit re-enables some nsh commands.

Impact:
- None

Testing:
- Tested with QEMU

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-01-01 20:35:27 +08:00
Dong Heng
c56c58020a risc-v/esp32c3: SPI flash MTD device uses all flash space 2021-12-31 11:40:23 +08:00
Jukka Laitinen
6f413c8654 board icicle/opensbi: Reduce image size slightly
Drop somme fancy nsh features

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2021-12-30 11:49:00 +08:00
Jukka Laitinen
3beecbe905 risc-v/mpfs: Add MSSIO GPIO pinmap configuration
Add a pinmap header for mpfs to be able to configure MSSIO GPIOs
This also adds Kconfigs for some different chip/package types of the PolarFire SOC

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2021-12-30 11:49:00 +08:00
Petro Karashchenko
438a62c4fc boards/arm/samv7: improve progmem common interface
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2021-12-30 10:29:36 +08:00
Jukka Laitinen
fc41bb7f8a boards/m100pfsevp: Decrease DDR lane temination values to 40 ohm and increase BCLKSCLK_OFFSET
This fixes problems with DDR training sequence on aries m100pfs board

    - Set LIBERO_SETTING_RPC_ODT_* to 6, which matches 40 ohm. Originally it was 120 ohm (2)
    - Set BCLKSCLK_OFFSET value to 5, which matches icicle board setting

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2021-12-29 09:36:49 -06:00
Huang Qi
d71cfc178a arch/risc-v: Remove unneeded kconfigs
CONFIG_RV32IM_HW_MULDIV can be safely removed since this behavior is
controlled by M extension.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2021-12-28 05:02:42 -06:00
Huang Qi
c2e8c92b25 arch/risc-v: Refine Toolchain.defs
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2021-12-28 00:30:10 -06:00
chao.an
cbd82f1c1b compile/flags: remove redundant -fomit-frame-pointer from board flags
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-27 22:31:27 -06:00
Petro Karashchenko
3ccb657dc2 nuttx: remove space befone newline in logs
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2021-12-27 21:01:19 -06:00
ligd
412d030149 boards: move USERMAIN_XX out of INIT_ENTRYPOINT
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-12-24 08:23:30 -06:00
Eero Nurkkala
509350a614 risc-v/mpfs: update m100pfsevp board info
Update the cache settings for the Aries m100pfsevp board. This
assigns scratchpad ways for this board as well, as seen in the
commit 491ae6c.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-12-23 06:55:18 -06:00
Eero Nurkkala
b128ce334f mpfs: introduce OpenSBI
OpenSBI may be compiled as an external library. OpenSBI commit d249d65
(Dec. 11, 2021) needs to be reverted as it causes memcpy / memcmp to
end up in the wrong section. That issue has yet no known workaround.

OpenSBI may be lauched from the hart0 (e51). It will start the U-Boot
and eventually the Linux kernel on harts 1-4.

OpenSBI, once initialized properly, will trap and handle illegal
instructions (for example, CSR time) and unaligned address accesses
among other things.

Due to size size limitations for the mpfs eNVM area where the NuttX
is located, we actually set up the OpenSBI on its own section which
is in the bottom of the DDR memory. Special care must be taken so that
the kernel doesn't override the OpenSBI. For example, the Linux device
tree may reserve some space from the beginning:

  opensbi_reserved: opensbi@80000000 {
      reg = <0x80000000 0x200000>;
      label = "opensbi-reserved";
  };

The resulting nuttx.bin file is very large, but objcopy is used to
create the final binary images for the regions (eNVM and DDR) using
the nuttx elf file.

Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-12-22 20:48:12 -06:00