Gregory Nutt
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81c1466d93
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Olimex STM32 P407: Hmmm.. board does not boot. Simplifying the configuration does not help.
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2016-12-21 11:38:45 -06:00 |
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Gregory Nutt
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7e075bab36
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Merge in support for the Olimex STM32 P407 board
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2016-12-21 10:47:50 -06:00 |
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Gregory Nutt
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f8f2c00415
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Olimex STM32 P407: Update clocking using STM3250G; Verify GPIOs.
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2016-12-21 10:45:36 -06:00 |
|
Gregory Nutt
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588d2b506f
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Xtensa ESP32: Oddly, an rsync barrier when writing to co-processor register corrects problem.
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2016-12-21 08:04:48 -06:00 |
|
Gregory Nutt
|
1b7162a0db
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Eliminate a warning
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2016-12-21 08:04:48 -06:00 |
|
Gregory Nutt
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41eda13c9f
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Olimex STM32-P407: Add an stm32_bringup.c file like most newer configurations.
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2016-12-20 18:05:28 -06:00 |
|
Gregory Nutt
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764b9f46cc
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Olimex STM32-P407: Initial clone from Olimex STM32-P207
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2016-12-20 17:49:46 -06:00 |
|
Geoffrey
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89c33e9799
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Xtensa ESP32: Clock frequency is different if running from IRAM or is booting from FLASH. This is a booltloader issue.
|
2016-12-20 16:14:38 -06:00 |
|
Gregory Nutt
|
59c5ae3eae
|
Refresh some configurations
|
2016-12-20 15:42:31 -06:00 |
|
Gregory Nutt
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57d8a437ef
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Fix procfs status for SMP case.
|
2016-12-20 11:51:39 -06:00 |
|
Gregory Nutt
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81697f2285
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Xtensa ESP32: Fix APP CPU startup... Can't use semaphores on the IDLE thread.
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2016-12-20 11:26:37 -06:00 |
|
Gregory Nutt
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6d5a718b98
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Xtensa ESP32: A few fixes for APP CPU start-up
|
2016-12-20 10:38:27 -06:00 |
|
Gregory Nutt
|
404925d93e
|
Update README
|
2016-12-20 10:03:48 -06:00 |
|
Gregory Nutt
|
4e9a0ffea5
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Xtensa ESP32: Update APP CPU startup logic to match current Expressif example code.
|
2016-12-20 09:00:04 -06:00 |
|
Gregory Nutt
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3b681586c0
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Xtensa ESP32: Missing prologue/epilogue macros on C callable function
|
2016-12-20 08:31:36 -06:00 |
|
Gregory Nutt
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5666bf30a7
|
Review of last PR
|
2016-12-20 07:08:46 -06:00 |
|
Gregory Nutt
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1ed25c0d73
|
Merged in young-mu/nuttx (pull request #187)
Support PWM_PULSECOUNT feature for TI tiva
|
2016-12-20 07:00:35 -06:00 |
|
Young
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07b70fcc20
|
Improve the PWM logs
|
2016-12-20 17:05:51 +08:00 |
|
Young
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9d355e12d5
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Support indefinite number of pulses generation in PULSECOUNT mode
|
2016-12-20 14:08:31 +08:00 |
|
Young
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e35406f7d6
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Support PWM_PULSECOUNT feature for TI tiva
|
2016-12-20 13:20:04 +08:00 |
|
Young
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b737f0e156
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Merged nuttx/nuttx into master
|
2016-12-20 11:40:23 +08:00 |
|
Gregory Nutt
|
e5182acbe3
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Xtensa ESP32: Make sure that SMP configuratin still builds without errors.
|
2016-12-19 14:12:19 -06:00 |
|
Gregory Nutt
|
e61549d8b9
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Xtensa ESP32: Clean-up and fixes from last commits
|
2016-12-19 13:57:37 -06:00 |
|
Gregory Nutt
|
097f09cb02
|
Xtensa ESP32: Corrects timer initialization and timer input frequency.
|
2016-12-19 11:50:28 -06:00 |
|
Gregory Nutt
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a9a39800a4
|
Xtensa ESP32: Fixes some double faults and user errors, but I do not fully understand why.
|
2016-12-19 11:14:08 -06:00 |
|
Gregory Nutt
|
886ce88b4f
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Xtensa ESP32: Automatically mount /proc at start-up.
|
2016-12-19 09:43:16 -06:00 |
|
Gregory Nutt
|
b47255a6de
|
Update README.
|
2016-12-18 17:30:30 -06:00 |
|
Gregory Nutt
|
2b0b698d72
|
ESP32 Serial: Add logic to prevent infinite loops in interrupt handler.
|
2016-12-18 16:04:25 -06:00 |
|
Gregory Nutt
|
71bb79a6c7
|
ESP32 Serial: Fix some register bit definitions.
|
2016-12-18 15:11:34 -06:00 |
|
Gregory Nutt
|
4bd530d026
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Xtensa ESP32: Last change should be conditioned on the window ABI.
|
2016-12-18 13:17:31 -06:00 |
|
Gregory Nutt
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665c1647b5
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Xtensa ESP32: Need to spill registers to memory as the last dying action before switching to a new thread.
|
2016-12-18 12:54:47 -06:00 |
|
Gregory Nutt
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586f0aab50
|
Fix context save logic when called in window ABI configuration. Add an IDLE stack. Don't depend on the mystery stack received from the bootloader.
|
2016-12-18 10:08:08 -06:00 |
|
Gregory Nutt
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8ce1fdaab0
|
Add an attribution to the scanset addition to sscanf()
|
2016-12-17 16:18:04 -06:00 |
|
Author: Aleksandr Vyhovanec
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7be1b86a81
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Add scansets to the scanf function. Enabled CONFIG_LIBC_SCANSET option.
|
2016-12-17 14:39:19 -06:00 |
|
Gregory Nutt
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93e6d16f75
|
Xtensa ESP32: wsr, not rsr.
|
2016-12-17 11:23:10 -06:00 |
|
Gregory Nutt
|
a88c50d366
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Xtensa ESP32: Need to clone some logic for syncrhonous context switch. Window spill logic in the conmon restores logic is inappropriate in this context
|
2016-12-17 11:00:12 -06:00 |
|
Gregory Nutt
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6b80e5f15f
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Xtensa ESP32: Fix clobbered a9 in co-processor context save/restore
|
2016-12-17 11:00:12 -06:00 |
|
Gregory Nutt
|
8de1127899
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Xtensa ESP32: Using wrong register to disable interrupts.
|
2016-12-17 11:00:12 -06:00 |
|
Gregory Nutt
|
b506bd6ee6
|
Merged in david_s5/nuttx/master_cdcacm_fix (pull request #185)
BugFix:uart_ops_s portion of cdcacm will not be initalized with correct functions if CONFIG_SERIAL_DMA is lit.
|
2016-12-17 08:57:33 -06:00 |
|
Gregory Nutt
|
e7a21b510f
|
Merged in david_s5/nuttx (pull request #184)
C&P error from F7
|
2016-12-17 08:57:08 -06:00 |
|
David Sidrane
|
950c140fcd
|
Merged nuttx/nuttx into master
|
2016-12-17 04:39:46 -10:00 |
|
David Sidrane
|
ec85425041
|
STM32: Fix some STM32F7 copy paste errors
|
2016-12-17 08:31:12 -06:00 |
|
David Sidrane
|
548108764a
|
BugFix:uart_ops_s portion of cdcacm will not be initalized with correct functions if CONFIG_SERIAL_DMA is lit.
This fixes the issses in a C99 compatible way
|
2016-12-17 04:29:41 -10:00 |
|
Gregory Nutt
|
38ebe6c13f
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Xtensa ESP32: Change that should have been included in a previous commit was not.
|
2016-12-17 08:11:32 -06:00 |
|
Gregory Nutt
|
05e798488b
|
One register getting clobber on context save
|
2016-12-17 08:10:10 -06:00 |
|
Gregory Nutt
|
adbacfc42c
|
Xtensa ESP32: Fix a duplicate in Kconfig files. Level 1 should return via RFE.
|
2016-12-17 07:07:33 -06:00 |
|
David Sidrane
|
d9c01052d9
|
C&P error from F7
|
2016-12-17 02:20:10 -10:00 |
|
Gregory Nutt
|
6599feb310
|
Xtensa ESP32: Fixes a few issue with restoring registers on interrupt return, but there is still a problem
|
2016-12-16 17:56:22 -06:00 |
|
Gregory Nutt
|
cdd8dc72a5
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Xtensa ESP32: Basically a redesign of the interrupt dispatch logic.
|
2016-12-16 15:36:52 -06:00 |
|
Gregory Nutt
|
d4ad5f04d3
|
Xtensa ESP32: Minor rearchitecting of how CPU interrupts are enabled. MOre to come.
|
2016-12-16 14:13:09 -06:00 |
|