Commit Graph

2205 Commits

Author SHA1 Message Date
Gregory Nutt
694080ba47 Fix badly applied patch to ENCX24J600 2013-09-25 08:26:56 -06:00
Gregory Nutt
d979859754 SAMA5 UDPHS: Dont' reject read request submissions while stalled. That causes an infinite loop. When stalling, cancel all pending write requests, but cancel only a reqd request if it is in progress. It will be immediately requeued 2013-09-24 15:06:17 -06:00
Gregory Nutt
5783fec78b Comment out assertion that apparently fires inappropriately 2013-09-24 15:01:25 -06:00
Gregory Nutt
245f5ad32d Slightly improved debug output 2013-09-24 13:47:03 -06:00
Gregory Nutt
f0ca9c2a8d Stack monitor fixes 2013-09-24 12:14:52 -06:00
Gregory Nutt
a8461747b9 Standardize stack checking interface 2013-09-24 11:45:13 -06:00
Gregory Nutt
7c767c4ebe SAMA5 UDPHS: Minor clean-up of STALL logic 2013-09-23 18:10:41 -06:00
Gregory Nutt
a070e748fd SAMA5 HSMCI: Disable TX DMA. it is not reliable 2013-09-23 13:54:32 -06:00
Gregory Nutt
d167a09c74 SAMA5 HSMCI DMA clean-up. There are still some issues 2013-09-23 11:25:39 -06:00
Gregory Nutt
306a8743e0 Cosmetic changes to comments and coding style fixes 2013-09-22 14:48:22 -06:00
Gregory Nutt
b2e3a95565 Un-neccesary, cosmetic changes to label names and comments 2013-09-22 08:54:06 -06:00
Gregory Nutt
a768f32532 SAMA5 OHCI: Back out a change, the real root cause was a bug in the cache logic so the hack is no longer necessary 2013-09-22 07:53:51 -06:00
Gregory Nutt
d1ac44242f ARMv7-A: Fix some error in alignment to cache line boundaries in the cache operations 2013-09-21 15:47:00 -06:00
Gregory Nutt
da37aa6413 SAMA5 OHCI: Fix some strange Dcache problems that I still don't understand; end address on cache operations is end+1, not end 2013-09-21 12:21:10 -06:00
Gregory Nutt
c9050ae5fd ARMv7-A: Clarify end address paramet in cache operations: It is the end+1 address, not the end address 2013-09-21 12:16:34 -06:00
Gregory Nutt
f3d56e8695 SAMA5 OHCI: Fix some problems with D-Cache coherency and physical addressing related to interrupt endpoints 2013-09-20 15:22:09 -06:00
Gregory Nutt
f72ad05d0f SAMA5 OHCI: When UPLL drives OHCI the logically correct divider of 10 does not work; But a divider of 5 does. Why? 2013-09-19 16:10:46 -06:00
Gregory Nutt
07cca4b318 SAMA5 EHCI: Fix bits being clobbered in PORTSC on hand-off to OHCI. OHCI: Fix some more trace configuration issues. Both: Don't muck with SFR port selection bits once they have been initialized 2013-09-19 10:52:33 -06:00
Gregory Nutt
f7436ee22f More USB host trace conditional compilation problems 2013-09-19 09:08:55 -06:00
Gregory Nutt
48ed2b88d3 Fix inconsistency in USB host tracing definitions 2013-09-19 08:46:33 -06:00
Gregory Nutt
ef9032b4d6 SAMA5: Add support for the FPU OS test 2013-09-18 10:35:03 -06:00
Gregory Nutt
71354eb2c3 LPC17xx SPI: Remove an unused static prototype that caused a compile time warning 2013-09-17 17:14:08 -06:00
Gregory Nutt
425c26d27a SAMA5 EMAC: Changes from early debug sessions. Still a way to go 2013-09-17 15:52:19 -06:00
Gregory Nutt
2c63995099 SAMA5 EMAC: Resolve issues with DUAL PHY support needed for both EMAC and GMAC peripherals. EMAC driver is now code complete and builds without complaint 2013-09-17 10:55:13 -06:00
Gregory Nutt
82cd614b66 Add prefex ETH0 to all PHY configurations to support multiple NICs 2013-09-17 10:45:07 -06:00
Gregory Nutt
a634dc0f33 SAMA4 EMAC: Remove some editor garbage that ended up in the last commit 2013-09-16 18:04:38 -06:00
Gregory Nutt
ec499a3aa8 SAMA5 EMAC: Add basic PHY logic 2013-09-16 18:00:21 -06:00
Gregory Nutt
2a10afb311 SAMA5 EMAC: Packet transmission logic 2013-09-16 14:58:11 -06:00
Gregory Nutt
97a0e3b74b SAMA4 EMAC: Add basic interrupt handling logic 2013-09-16 13:57:57 -06:00
Gregory Nutt
f267cea5b6 SAMA5 EMAC: Incremental progress. Still not code complete 2013-09-16 11:36:12 -06:00
Gregory Nutt
47d4b41bad Freescale Kinetis KL25Z PIT and TPM module register definitions 2013-09-15 17:00:50 -06:00
Gregory Nutt
ec03861315 SAMA4 EMAC buffer allocation logic 2013-09-15 14:26:25 -06:00
Gregory Nutt
45e4425687 SAMA5 Ethernet: Add support for PHY interrupts 2013-09-15 12:24:42 -06:00
Gregory Nutt
7c13790901 SAMA5: Update Ethernet initalization logic to handle both EMAC and GMAC 2013-09-14 08:19:36 -06:00
Gregory Nutt
7b6a1a57eb SAMA5 EMAC: Create a empty, skeleton file that will eventually become the SAMA5 EMAC driver 2013-09-13 15:04:46 -06:00
Gregory Nutt
64825db9c2 STM32: Support for the LeafLabs Maple and Maple Mini boards. From Librae 2013-09-13 12:45:33 -06:00
Gregory Nutt
e31f62e1b5 STM32 Kconfig: Fix STM32 UART7/8 kconfig names and UART DMA. Provided by Lorenz Meier 2013-09-13 11:45:32 -06:00
Gregory Nutt
1b17b8fbea Make filter register accessible for CAN1 and CAN2. Provided by Lorenz Meier 2013-09-13 11:20:10 -06:00
Gregory Nutt
363df90d81 SAMA5 EMAC and GMAC: More additions to register definition files 2013-09-13 03:35:56 -06:00
Gregory Nutt
91a065e9fc SAMA5: Beginning of EMAC and GMAC register definition header files 2013-09-12 15:45:12 -06:00
Gregory Nutt
9f937bc0e4 SAMA5D3x-EK README update 2013-09-12 14:17:56 -06:00
Gregory Nutt
1d40c068fb SAMA5 TWI: Misc improvements during debug (still not getting interupts) 2013-09-12 12:25:31 -06:00
Gregory Nutt
3bb6a8b164 SAMA5 TWI: Cleanup compilation errors that occur when I2C debug is enabled 2013-09-12 09:46:20 -06:00
Gregory Nutt
950ea5830a SAMA5 TWI: Add support for I2C readwrite and transfer methods 2013-09-11 17:52:23 -06:00
Gregory Nutt
42b547f73c SAMA5: Barebones TWI driver implementation 2013-09-11 16:48:56 -06:00
Gregory Nutt
f2a5c43b25 SAMA5: Framework for a TWI driver (incomplete) 2013-09-11 12:28:52 -06:00
Gregory Nutt
f9afaf89fc SAMA5: TWI register definition file 2013-09-11 10:23:46 -06:00
Gregory Nutt
11a515eca0 SAMA5D3x-EK demo configuration now supports HSMCI0 and HSMCI1 2013-09-11 09:50:36 -06:00
Gregory Nutt
dac363d43e Clean-up a few USB trace formats 2013-09-10 16:17:06 -06:00
Gregory Nutt
9f3e2e3bec SAMA5: Add tracing support to the OHCI driver 2013-09-10 16:01:44 -06:00
Gregory Nutt
92aa5785bf SAMA5 EHCI: Did not work with DEBUG off. Appears to be because of some D-Cache flushing that was performed only with DEBUG ON. Now is unconditional 2013-09-10 10:12:51 -06:00
Gregory Nutt
a4e6a3b80f Extent the the USB host trace logic to include verbose debug output 2013-09-09 17:27:21 -06:00
Gregory Nutt
1a18d1e3e7 USB monitor extended so that it can also be used with USB host trace data 2013-09-09 15:02:33 -06:00
Gregory Nutt
8f69c6c66c Beginning of support for USB host side tracing 2013-09-09 14:01:52 -06:00
Gregory Nutt
31e1e7506a USB MSC host class driver: Don't bother retrying to initialize the FLASH if the interface is returning fatal transfer errors 2013-09-09 10:00:16 -06:00
Gregory Nutt
10a9fcff30 Trivial updates assocaited with USB host mass storage and SAMA5 EHCI 2013-09-08 13:42:56 -06:00
Gregory Nutt
e5841a74a9 SAMA5: Add support EHCI/OHCI to sama5d3x-ek/demo (does not work yet); Fix some EHCI/OHCI compilation issues when DEBUG is disabled 2013-09-07 11:43:06 -06:00
Gregory Nutt
6e5df6259e SAMA5D3x-EK: Add a new 'demo' configuration 2013-09-06 11:40:46 -06:00
Gregory Nutt
1fcc8894e6 CDC/ACM and PL2303 device drivers: Don't use the max packet size assigned to an endpoint in order to determine the request buffer size. The endpoint has not yet been configured that max packet size may be wrong. 2013-09-05 18:00:16 -06:00
Gregory Nutt
ec01a41da7 SAMA5 UDPHS: Fix bad setup for sam_req_write call introduce in last commit 2013-09-05 15:51:27 -06:00
Gregory Nutt
54d5e1a49d SAMA5 UDPHS: Major changes to DMA interrupt and request handling to better handle DMA 2013-09-05 14:33:27 -06:00
Gregory Nutt
9861f18ee1 SAMA5 UDPHS: Fix DMA channel vs. matching endpoint 2013-09-04 15:08:19 -06:00
Gregory Nutt
75b53ad12b SAMA5 UDPHS: More USB fixes mostly related to byte counts, endpoint configuration, and dma configuration 2013-09-04 13:36:52 -06:00
Gregory Nutt
2d9c62d3ef SAMA5 UDPHS: More zero length packet fixes; revamped request queue structures 2013-09-04 09:48:08 -06:00
Gregory Nutt
c09b08f4a5 SAMA5 UDPHS: Fixes related to null packet and SETUP OUT data handling 2013-09-03 19:13:34 -06:00
Gregory Nutt
3e505efe73 SAMA5 UDPHS: Small change to zero length packet handling 2013-09-03 16:24:11 -06:00
Gregory Nutt
adc7248d6c SAMA5 UDPHS: Fix some issues with TX interrupt handling 2013-09-03 14:53:10 -06:00
Gregory Nutt
74d0e02850 SAMA5 UDPHS: A little debugging progress. Not all transfers are working yet 2013-09-03 13:09:50 -06:00
Gregory Nutt
4e2894c6ae SAMA5 UDPHS: Changes from initial debug session. Still a long way to go 2013-09-02 16:59:07 -06:00
Gregory Nutt
abd29a5ede SAMA5 UDPHS: Fixes related to soft connect pullup and DMA buffer allocation 2013-09-02 14:55:33 -06:00
Gregory Nutt
df39b67fd6 SAMA5 UDPHS: Some very early debug corrections. Not yet working. 2013-09-02 12:26:15 -06:00
Gregory Nutt
8905de3826 SAMA5 UDPHS: Add logic to handle deferred address setting; add logic to handle EP0 SETUP OUT data 2013-09-02 10:08:18 -06:00
Gregory Nutt
928d0ddd8a STM32 Timer Register Bit Definitions: Some CCER bit settings changed per SourceForge bug #18 submitted by CCCTSAO 2013-09-02 08:01:09 -06:00
Gregory Nutt
4cbe61cdd3 SAMA5 UDPHS: Clean up some write request handling 2013-09-01 16:56:22 -06:00
Gregory Nutt
7fd159779e SAMA5 UDPHS: Resolve a few of easier REVISIT pre-processor warnings 2013-09-01 15:36:17 -06:00
Gregory Nutt
80a498aa8b SAMA5 UPPHS: Fix a small mountain of compilation errors. Still things to REVISIT so it is not ready for test 2013-09-01 11:31:12 -06:00
Gregory Nutt
3ba3dfd9bc SAMA5 UDPHS: Support USPHS clock configuration 2013-09-01 11:29:51 -06:00
Gregory Nutt
06355a17e1 SAMA UDPHS: Add pull-up and stall logic. Added to build system but does not yet build 2013-08-31 17:37:51 -06:00
Gregory Nutt
30cf03d3e8 SAMA5 UDPHS: Add endpoint configuration and read DMA logic 2013-08-31 12:20:00 -06:00
Gregory Nutt
f22b388cb4 SAMA5 UDPHS: Bring in UDPHS endpoint interrupt handling logic 2013-08-31 10:43:58 -06:00
Gregory Nutt
ab1c21609d SAMA5 UDPHS: Write DMA logic added. Still incomplete 2013-08-30 15:41:06 -06:00
Gregory Nutt
07ffab9308 SAMA5: Updated UDPHS driver. Still incomplete 2013-08-30 14:51:41 -06:00
Gregory Nutt
ca2709296d SAMA5 UDPHS interrupt decoding logic 2013-08-29 18:11:34 -06:00
Gregory Nutt
eeaeb369fe SAMA5 UDPHS interrupt decoding logic 2013-08-29 17:34:05 -06:00
Gregory Nutt
a4f58596d4 SAMA5: Initial framework for a UDPHS USB device side driver 2013-08-29 16:29:27 -06:00
Gregory Nutt
b47e1933f5 SAMA5: Add high-speed USB register definition header file 2013-08-28 17:50:05 -06:00
Gregory Nutt
4508986dbb SAMA5 EHCI: Implemented (but did not test) interrupt endpoint logic 2013-08-28 13:07:35 -06:00
Gregory Nutt
6acb286c39 SAMA5 EHCI: Correct and extend pool allocation logic; Fix data toggle values 2013-08-28 10:03:48 -06:00
Gregory Nutt
556446e3a1 SAMA5: Fixes a bug in the way that the heap regions were being allocated 2013-08-27 16:43:19 -06:00
Gregory Nutt
e1fe1c3037 SAMA5 OHCI+EHCI: Using cp15_clean instead of cp15_coherent; EHCI: Need to set alt pointer in order to handle short transfers. 2013-08-27 13:07:21 -06:00
Gregory Nutt
56f9092a87 Fix all occurrences of "the the" in documentation and comments 2013-08-27 09:40:19 -06:00
Gregory Nutt
a55dda98b3 Add hooks to select Cortex-A8 2013-08-27 08:46:37 -06:00
Gregory Nutt
f69688422f SAMA4 EHCI: Correct some backward conditional compilation; fix some warnings 2013-08-26 17:03:52 -06:00
Gregory Nutt
56f2b3b963 Add a new method to the USB host driver interface: getdevinfo. This method will return information about the currently connected device. At present, it only returns the device speed. The speed is needed by the enumeration logic in order to set a credible initial EP0 max packet size 2013-08-26 15:46:16 -06:00
Gregory Nutt
f500338401 SAMA5 EHCI: Status phase is the opposite direction as the data phase 2013-08-26 14:28:13 -06:00
Gregory Nutt
78812d5b80 SAMA5 EHCI: Taking direction from wrong bit in SETUP request; need to flush data buffer before starting SETUP request 2013-08-26 11:05:23 -06:00
Gregory Nutt
57eb83da9d #17 Fix if CONFIG_SDIO_BLOCKSETUP defined, OS will crash. From CCTSAO 2013-08-26 08:54:46 -06:00
Gregory Nutt
250956c803 SAMA5 EHCI: Data toggle and status phase fixes 2013-08-25 14:45:08 -06:00
Gregory Nutt
d35e1c6bd4 EHCI reset bit was not being set correctly 2013-08-25 10:46:41 -06:00
Gregory Nutt
21566c02d6 SAMA5 OHCI: Fix semaphore handling bug. OHCI is now function by itself again after changes to integrate with EHCI 2013-08-25 08:57:35 -06:00