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17073 Commits

Author SHA1 Message Date
Nathan Hartman
2cfbfa8213 arch/stm32h7: Fix nxstyle errors 
arch/arm/src/stm32h7/stm32_pwr.c:

    * Fix nxstyle issues.
 2021-01-07 01:11:43 +01:00
Nathan Hartman
f30097d0ab arch/stm32h7: Fix nxstyle errors 
arch/arm/src/stm32h7/stm32_pmstop.c:

    * Fix nxstyle issues.
 2021-01-07 01:11:43 +01:00
Nathan Hartman
4c82459851 arch/stm32h7: Fix nxstyle errors 
arch/arm/src/stm32h7/stm32_dma.h:

    * Fix nxstyle issues.
 2021-01-07 01:11:43 +01:00
Nathan Hartman
8cc9308da7 arch/stm32h7: Fix nxstyle errors 
arch/arm/src/stm32h7/chip.h:

    * Fix nxstyle issues.
 2021-01-07 01:11:43 +01:00
ligd
f63db66382 mqueue: add file_mq_xx for kernel use 
Change-Id: Ida12f5938388cca2f233a4cde90277a218033645
Signed-off-by: ligd <liguiding1@xiaomi.com>
 2021-01-05 02:40:43 -06:00
Nathan Hartman
4ccaedf91f arch/stm32h7: Fix nxstyle errors 
arch/arm/src/stm32h7/stm32_adc.c:
arch/arm/src/stm32h7/stm32_adc.h:

    * Fix nxstyle issues.
 2021-01-04 13:04:51 -06:00
Dong Heng
fadae0bf39 xtensa/esp32: Fix ESP32 serial UART tx ready check error 2021-01-04 09:19:53 +01:00
Nathan Hartman
ec0b2f063c arch/stm32h7: Fix nxstyle errors 
arch/arm/src/stm32h7/stm32_bbsram.h:

    * Fix nxstyle issues.
 2021-01-03 20:30:45 -06:00
Brennan Ashton
dd26d9c9f9 BL602: Add support for system reboot modes 
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
 2021-01-02 00:14:37 -06:00
Nathan Hartman
7592fc17d3 arch/stm32: Fix nxstyle errors 
arch/arm/src/stm32/stm32_otghs.h:

    * Fix nxstyle issues.
 2021-01-01 18:17:03 +01:00
Nathan Hartman
588227ed7b arch/stm32: Fix nxstyle errors 
arch/arm/src/stm32/stm32_otgfs.h:

    * Fix nxstyle issues.
 2020-12-31 20:32:13 +01:00
Xiang Xiao
c647faa117 Fix nxstyle warning 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2020-12-31 09:37:29 +01:00
Xiang Xiao
0defe43282 OS internal function should indicate the error by return negative value 
instead to change errno value by calling set_errno

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2020-12-31 09:37:29 +01:00
Brennan Ashton
c8db3293bb BL602: Use sig mask instead of number for AHB swrst 2020-12-30 23:27:42 -06:00
Brennan Ashton
e062bd08ce bl602: Update register defines and drivers 2020-12-30 23:27:42 -06:00
Nathan Hartman
81224cc596 arch/stm32: Fix nxstyle errors 
arch/arm/src/stm32/stm32_spi.h:

    * Fix nxstyle issues.
 2020-12-30 10:20:15 -06:00
chao.an
961532a5da arch/sim/hci: reuse the reserved fields of hci buffer 
Reuse the reserved fields of hci buffer to avoid redundant packet type splitting

Change-Id: I79d70ae939111bb909a6e0981c50e401734590f2
Signed-off-by: chao.an <anchao@xiaomi.com>
 2020-12-29 18:10:04 -08:00
chao.an
2ca99ed1be sim/host/hcisocket: add avail/close interface 
Change-Id: I3d96f62c4c3c7d703bfec74952953bee4aef9c7c
Signed-off-by: chao.an <anchao@xiaomi.com>
 2020-12-29 18:10:04 -08:00
Nathan Hartman
763aae8155 arch/stm32: Fix nxstyle errors 
arch/arm/src/stm32/stm32_rtc.h:

    * Fix nxstyle issues.
 2020-12-29 08:36:31 -06:00
Virus.V
5f71e2be79 fix ci build failed 2020-12-29 01:52:09 -08:00
Virus.V
3e0a84182e check bl602 license 2020-12-29 01:52:09 -08:00
yangyue
d354a2f19f fix some code style 2020-12-29 01:52:09 -08:00
Virus.V
12258d72d2 Fix the BL602 mtimer frequency error. 2020-12-29 01:52:09 -08:00
Virus.V
2b8e0945a9 Fix BL602 CI Build failed. 
Modify the default configuration in KConfig.
Sync latest commit from mainline.

Remove unused demo configuration

fixup bl602 nsh defconfig cause CICD failed

Rebase from mainline code
 2020-12-29 01:52:09 -08:00
Virus.V
7e84874cb1 Reconstruct bl602 readme; move up_irq_save/restore declaration to common place 2020-12-29 01:52:09 -08:00
Virus.V
ce40edbd11 Solve the problems pointed out in the comments 2020-12-29 01:52:09 -08:00
Virus.V
417d0d4ccd fix checkpatch warning 2020-12-29 01:52:09 -08:00
Lei Chen
58bd873729 Add Basic support for BL602(UART timer CLIC) 2020-12-29 01:52:09 -08:00
Peter van der Perk
673a4b5b39 arch: S32K/Kinetis: Fix RTC settime prescaler 2020-12-28 23:32:33 +01:00
Sara Souza
65f39fc0c7 xtensa/esp32: Added driver api to reload counter instantly 2020-12-28 12:08:27 +01:00
Masayuki Ishikawa
b784fd6c3c arch: cxd56xx: Replace license header with Apache License 2.0 
Summary:
- This commit replaces SHES related headers under cxd56xx

Impact:
- No impact

Testing:
- Build check only

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2020-12-28 08:43:35 +01:00
dongjiuzhu
b83ae99456 rpmsg_uart: fix compile break when enable rptun 
nuttx.rel: In function `rpmsg_serialinit':
nuttx/arch/sim/src/sim/up_rptun.c:257: undefined reference to `uart_rpmsg_init'
collect2: error: ld returned 1 exit status
Makefile:310: recipe for target 'nuttx' failed

Change-Id: I93a20941bc07f749165dc8f012da46ddb7b02b00
Signed-off-by: dongjiuzhu <dongjiuzhu1@xiaomi.com>
 2020-12-25 21:07:04 +01:00
YAMAMOTO Takashi
e1c53eaeb0 arch/sim/include/irq.h: Make 32-bit xcpt_reg_t unsigned 
* 64-bit version is already unsigned

* up_copyfullstate uses unsigned for 32-bit

 Error: sim/up_unblocktask.c:107:33: error: pointer targets in passing argument 1 of 'up_copyfullstate' differ in signedness [-Werror=pointer-sign]
  107 |           up_savestate(rtcb->xcp.regs);
      |                        ~~~~~~~~~^~~~~
      |                                 |
      |                                 xcpt_reg_t * {aka int *}
sim/up_internal.h:133:45: note: in definition of macro 'up_savestate'
  133 | #define up_savestate(regs) up_copyfullstate(regs, (xcpt_reg_t *)CURRENT_REGS)
      |                                             ^~~~
sim/up_internal.h:205:33: note: expected 'uint32_t *' {aka 'unsigned int *'} but argument is of type 'xcpt_reg_t *' {aka 'int *'}
  205 | void up_copyfullstate(uint32_t *dest, uint32_t *src);
      |                       ~~~~~~~~~~^~~~
 2020-12-24 21:57:39 -06:00
Nathan Hartman
080b2dfceb arch/stm32: Fix nxstyle errors 
arch/arm/src/stm32/stm32_exti.h:
arch/arm/src/stm32/stm32_flash.c:
arch/arm/src/stm32/stm32_fsmc.c:
arch/arm/src/stm32/stm32_fsmc.h:
arch/arm/src/stm32/stm32_hciuart.h:
arch/arm/src/stm32/stm32_mpuinit.h:
arch/arm/src/stm32/stm32_rtc.c:

    * Fix nxstyle issues.
 2020-12-24 23:21:16 +01:00
chao.an
08b22784c3 sim/names: add writev/readv into name list 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2020-12-24 11:09:59 -03:00
Nathan Hartman
dad32ccd47 arch/stm32: Fix nxstyle errors 
arch/arm/src/stm32/stm32_dma.h:

    * Fix nxstyle issues.
 2020-12-23 20:35:42 -06:00
Masayuki Ishikawa
ace6e70f57 arch: imx6: Add imx_enet driver 
Summary:
- This commit adds imx_enet driver derived from imxrt_enet

Impact:
- imx6 only

Testing:
- Tested with sabre-6quad:netnsh
- NOTE: telnetd works with QEMU
 2020-12-23 16:56:25 -03:00
Masayuki Ishikawa
1725e50a13 arch: imx6: Fix peripheral IP offsets in AIPS-2 
Summary:
- This commit fixes peripheral IP offsets in AIPS-2

Impact:
- No impact because there is no drivers

Testing:
- Tested with sabre-6quad:nsh and sabre-6quad:smp
 2020-12-23 16:56:25 -03:00
Masayuki Ishikawa
4ce99f324e arch: imx6: Fix style warnings in imx_memorymap.h 2020-12-23 16:56:25 -03:00
Fotis Panagiotopoulos
e26daf9357 STM32 FLASH latency is calculated based on Vin. 2020-12-23 08:13:45 -08:00
Michal Lenc
52416888f7 fix nx style warnings and errors 
Signed-off-by: Michal Lenc <lencmich@fel.cvut.cz>
 2020-12-23 11:19:53 -03:00
liang
b074ebec9e fix redefined CSR_INSTRET 2020-12-23 01:34:14 -06:00
Sara Souza
6a6121378c xtensa/esp32: Fixed wdt typos 2020-12-22 20:32:38 +01:00
YAMAMOTO Takashi
0fbfc4c44c esp32_wifi_adapter.c: file mode for open doesn't make sense for O_RDONLY 2020-12-22 03:37:29 -06:00
Huang Qi
073912e232 Replace all wget with curl 
wget is missing from some system (like macOS and Windows native),
it's better to use curl to simplify build environment.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2020-12-22 03:36:10 -06:00
Brennan Ashton
c6947199b2 Bluetooth: Fix bt_buff lifecycle 
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
 2020-12-21 23:36:57 -06:00
Masayuki Ishikawa
ec73a4e69c arch & sched: task: Fix up_exit() and nxtask_exit() for SMP 
Summary:
- During repeating ostest with sabre-6quad:smp (QEMU),
  I noticed that pthread_rwlock_test sometimes stops
- Finally, I found that nxtask_exit() released a critical
  section too early before context switching which resulted in
  selecting inappropriate TCB
- This commit fixes this issue by moving nxsched_resume_scheduler()
  from nxtask_exit() to up_exit() and also removing
  spin_setbit() and spin_clrbit() from nxtask_exit()
  because the caller holds a critical section
- To be consistent with non-SMP cases, the above changes
  were done for all CPU architectures

Impact:
- This commit affects all CPU architectures regardless of SMP

Testing:
- Tested with ostest with the following configs
- sabre-6quad:smp (QEMU, dev board), sabre-6quad:nsh (QEMU)
- spresense:wifi_smp
- sim:smp, sim:ostest
- maix-bit:smp (QEMU)
- esp32-devkitc:smp (QEMU)
- lc823450-xgevk:rndis

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2020-12-21 23:29:56 -06:00
Nathan Hartman
78f308ff2c arch/stm32: Fix nxstyle errors 
arch/arm/src/stm32/stm32_dac.h:

    * Fix nxstyle issues.
 2020-12-21 20:20:17 +01:00
Nathan Hartman
4cefc5ce7a stm32g4: Fix incorrect FLASH wait states 
When the architectural support for STM32G4 family was added, the
reference manual (RM0440) was at revision 2. Since then, it has
undergone several revisions. One significant change is in the
table of FLASH wait states: section 3.3.3 table 9. The outcome
of this change is that fewer FLASH wait states are needed for
most CPU clock (HCLK) frequencies. Notably, if running the CPU
clock at the maximum 170 MHz, only 4 FLASH wait states are
needed, rather than the previously programmed 8 wait states.
This gives a noticeable performance boost.

arch/arm/src/stm32/stm32g4xxxx_rcc.c:

    * FLASH_ACR_LATENCY_SETTING: Reimplement compile-time logic
      that selects the required wait state setting to use the new
      updated table.

    * Update all comments to indicate that RM0440 Rev 5 is used.

    * Update section numbers mentioned in comments in cases where
      they have changed due to added sections in the manual.
 2020-12-21 18:43:49 +01:00
Xiang Xiao
92cefb0a78 arch/risc-v: Move CSR register bit definition to csr.h 
to avoid the macro duplication

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2020-12-20 20:27:13 -08:00
Xiang Xiao
41d576f62b arch/riscv: Reuse the common up_schedule_sigaction implementation 
to avoid the code duplication

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2020-12-20 20:26:27 -08:00
Nathan Hartman
4facd82ae0 arch/stm32: Fix nxstyle errors 
arch/arm/src/stm32/stm32_ltdc.h:
arch/arm/src/stm32/stm32_pmsleep.c:
arch/arm/src/stm32/stm32_pmstandby.c:

    * Fix nxstyle issues.
 2020-12-19 00:16:47 -06:00
Xiang Xiao
d42c5a0bf6 arch/risc-v: Move csr.h to common place 
since CSR definition is same for 32bit and 64bit arch

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2020-12-19 08:41:33 +09:00
Xiang Xiao
fe8122ee2b arch/risc-v: Remove duplicated declaration for up_irq_save and up_irq_restore 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2020-12-19 08:29:42 +09:00
Abdelatif Guettouche
81a9eb190d arch/xtensa/src/esp32/esp32_spiflash.c: Invalidate the cache and 
writeback PSRAM data if the flash address used has a cache mapping.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-12-18 16:43:52 -03:00
chao.an
4a559807a5 arch/netdev: try tcp timer in every txavail call 
In the current implementation, the first transmission of the new
connection handshake is depends entirely by tcp_timer(), which will
caused 0.5s - 1s delay each time in connect().

This patch is mainly to improve the performance of TCP handshake.

Original:

nsh> tcp_client
[    1.536100] TCP connect start.
[    2.000200] TCP connect end. DIFF: tick: 4641, 464ms.
[    3.000300] TCP connect start.
[    4.000400] TCP connect end. DIFF: tick: 10001, 1000ms.
[    5.000500] TCP connect start.
[    6.000600] TCP connect end. DIFF: tick: 10001, 1000ms.
[    7.000700] TCP connect start.
[    8.000800] TCP connect end. DIFF: tick: 10001, 1000ms.

Optimized:

nsh> tcp_client
[    3.263600] TCP connect start.
[    3.263700] TCP connect end. DIFF: tick: 1, 0ms.
[    4.263800] TCP connect start.
[    4.263800] TCP connect end. DIFF: tick: 0, 0ms.
[    5.263900] TCP connect start.
[    5.263900] TCP connect end. DIFF: tick: 0, 0ms.
[    6.264000] TCP connect start.
[    6.264000] TCP connect end. DIFF: tick: 0, 0ms.
[    7.264100] TCP connect start.
[    7.264100] TCP connect end. DIFF: tick: 0, 0ms.

Signed-off-by: chao.an <anchao@xiaomi.com>
 2020-12-18 14:16:11 +09:00
YAMAMOTO Takashi
48ba0bb30a esp32_wifi_adapter.c: Fix a use-after-free bug 2020-12-17 03:24:15 -06:00
YAMAMOTO Takashi
75bc489e24 esp32: Fix phy_printf 
Fix the following error:

CC:  chip/esp32_wifi_adapter.c
In file included from /Users/yamamoto/git/nuttx/nuttx/include/nuttx/mm/shm.h:45,
                 from /Users/yamamoto/git/nuttx/nuttx/include/nuttx/sched.h:42,
                 from /Users/yamamoto/git/nuttx/nuttx/include/sched.h:35,
                 from /Users/yamamoto/git/nuttx/nuttx/include/stdio.h:48,
                 from chip/esp32_wifi_adapter.c:28:
chip/esp32_wifi_adapter.c: In function 'phy_printf':
chip/esp32_wifi_adapter.c:3952:10: error: expected ')' before 'format'
   wlinfo(format, arg);
          ^~~~~~
 2020-12-17 03:24:15 -06:00
Christian
abcc41d17d fix: arch/.../stm32h7x3xx_memorymap.h invalid address map for fdcan 2020-12-16 20:27:07 -06:00
Sara Souza
1acba417c4 xtensa/esp32: enables started flag if the wdt was turned on in bootloader 2020-12-16 16:35:55 -03:00
RICHNER Jonathan
6339fcfdd3 arch/arm/src/stm32h7/stm32_ethernet.c: Fix typo in multicast address hash 
table registers for STM32H7
 2020-12-16 10:01:25 -06:00
Sara Souza
71715aaee8 xtensa/esp32: fixes enable int function and gets apb clk frequency through function 2020-12-16 10:48:02 -03:00
Sara Souza
add46d0408 xtensa/esp32: Added support for RTC WDT 2020-12-16 14:37:39 +01:00
Sara Souza
be12c79c52 xtensa/esp32: Changes in rtc driver to support rtc wdt driver 2020-12-16 14:37:39 +01:00
Abdelatif Guettouche
ecede04263 arch/*/src/Makefile: Generate dependencies for head files. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-12-15 21:00:52 -06:00
Xiang Xiao
625eef20f0 arch: Remove the special check for idle thread in up_use_stack 
since the idle thread don't call up_use_stack anymore

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2020-12-16 09:54:29 +09:00
Xiang Xiao
efee1c6ded arch: Initialize the idle thread stack info directly 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2020-12-16 09:54:29 +09:00
Michal Lenc
e1596e80aa arch/arm/src/imxrt/imxrt_usdhc.c: fixed no DMA build error 
Signed-off-by: Michal Lenc <lencmich@fel.cvut.cz>
 2020-12-15 12:39:58 -08:00
Nathan Hartman
b960bee78b arch/stm32: Fix nxstyle errors 
arch/arm/src/stm32/stm32_tim.c:

    * Fix nxstyle errors.
 2020-12-15 19:10:30 +01:00
YAMAMOTO Takashi
cb71469f85 esp32: Fix a typo. ESP_SPIRAM_BOOT_INIT -> ESP32_SPIRAM_BOOT_INIT 2020-12-15 02:07:05 -06:00
Bernd Walter
2ccc37f2a8 Fix syntax for BOARD_GCLK*_RUN_IN_STANDBY and BOARD_GCLK*_OUTPUT_ENABLE 
with GCLK1-8
 2020-12-15 08:46:10 +01:00
Nathan Hartman
3adadbe5d7 arch/stm32: Fix nxstyle errors 
arch/arm/src/stm32/stm32_usbhost.h:

    * Fix nxstyle errors.
 2020-12-15 06:47:20 +01:00
Nathan Hartman
705c64e5ff arch/stm32: Fix nxstyle errors 
arch/arm/src/stm32/stm32_wwdg.c:

    * Fix nxstyle errors.
 2020-12-13 22:54:03 +01:00
John Bampton
ba12c6c0cf Fix spelling 2020-12-12 19:18:08 +01:00
Nathan Hartman
2fda2451e3 arch/stm32: Add register definitions for STM32G4 ADC 
arch/arm/src/stm32/hardware/stm32_adc_v2g4.h:

    * New file.

arch/arm/src/stm32/hardware/stm32_adc.h:

    * Distinguish between the normal STM32 ADC IPv2 core and the
      modified IPv2 core used in the G4 family, and include either
      stm32_adc_v2.h or stm32_adc_v2g4.h as needed.
 2020-12-12 13:58:51 +01:00
Nathan Hartman
3864912dc8 arch/stm32: Fix nxstyle errors 
arch/arm/src/stm32/stm32l15xxx_rtcc.c:

    * Fix nxstyle errors.
 2020-12-11 15:04:13 -03:00
danguanghua
796217917a fix build break with CONFIG_AUDIO_MULTI_SESSION enabled 
N/A

Change-Id: Idfa87031e09f26bd4ca57b5c220ce0ca849f80c4
Signed-off-by: danguanghua <danguanghua@xiaomi.com>
 2020-12-11 08:04:30 -06:00
Xiang Xiao
73d4832c15 arch/arm/imxrt: replace clock_systimespec with clock_systime_timespec 
since clock_systimespec doesn't exist anymore

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2020-12-11 04:20:40 -08:00
Masayuki Ishikawa
6158b6b77b spinlock: Introduce SP_WFE() and SP_SEV() 
Summary:
- This commit introduces SP_WFE() and SP_SEV() to be used for spinlock
- Also, use wfe/sev instructions for ARMV7-A to reduce power consumption

Impact:
- ARMV7-a SMP only

Testing:
- sabre-6quad:smp (QEMU, dev board)
- maix-bit:smp, esp32-devkitc:smp, spresense:smp sim:smp (compile only)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2020-12-11 05:58:35 -06:00
Sara Souza
6244924c3e Removed initconf from esp32_wtd_ops_s 2020-12-10 20:31:15 -06:00
Sara Souza
2a9dab2e5d xtensa/esp32: allows the rtc wdt to be configured in bootloader and used later 2020-12-10 20:31:15 -06:00
Masayuki Ishikawa
b599823f3b arch: armv7-a: Remove unnecessary #ifdef CONFIG_SMP in arm_unblocktask.c 
Summary:
- Because this_task() returns the current task of the current CPU

Impact:
- SMP only

Testing:
- Tested with sabre-6quad:smp (QEMU)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2020-12-10 20:27:59 -06:00
Abdelatif Guettouche
f7c5b467e1 arch/xtensa/src/esp32: Remove the EXPERIMENTAL config from the Wireless. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-12-10 12:31:17 -06:00
Abdelatif Guettouche
56713e0304 arch/xtensa/src/esp32/Make.defs: Don't condition including the low level 
WDT driver with the upper layer driver.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-12-10 12:31:17 -06:00
Abdelatif Guettouche
3ba5018b37 boards/xtensa/esp32: A bit of re-organisation in the ESP32 boards. 
Move the common files into the common directory.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-12-10 12:31:17 -06:00
Nathan Hartman
648ec7bee4 arch/stm32: Fix nxstyle errors 
arch/arm/src/stm32/stm32l15xxx_rcc.c:

    * Fix nxstyle errors.
 2020-12-10 18:30:24 +01:00
Masayuki Ishikawa
f3a81cb1b7 sim: Fix interrupt handling for SMP 
Summary
- This commit fixes interrupt handling for SMP
- The following are the changes
- Introduce up_copyfullstate.c
- Add enter_critical_section() to up_exit()
- Add a critical section to up_schedule_sigaction()
- Introduce pseudo timer thread to send periodic events
- UART and interval timer are now handled in the pause handler
- Apply the same SMP related code as other CPU architectures
- However, signal handling and context switching are not changed
- Also enable debug features and some tools in smp/defconfig

Imact
- SMP only

Testing
- Tested with sim:smp on ubuntu18.04 x86_64
- Tested with hello, taskset, smp, ostest

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2020-12-10 08:33:42 +01:00
Masayuki Ishikawa
ad9f88f042 Revert "Revert "arch/sim: Make the SIGUSR1 host signal to use the NuttX irq logic"" 
This reverts commit 3098b61776.
 2020-12-10 08:33:42 +01:00
Masayuki Ishikawa
409c65ce0b arch, sched: Fix global IRQ control logics for SMP 
Summary:
- This commit fixes global IRQ control logic
- In previous implementation, g_cpu_irqset for a remote CPU was
  set in sched_add_readytorun(), sched_remove_readytorun() and
  up_schedule_sigaction()
- In this implementation, they are removed.
- Instead, in the pause handler, call enter_critical_setion()
  which will call up_cpu_paused() then acquire g_cpu_irqlock
- So if a new task with irqcount > 1 restarts on the remote CPU,
  the CPU will only hold a critical section. Thus, the issue such as
  'POSSIBLE FOR TWO CPUs TO HOLD A CRITICAL SECTION' could be resolved.
- Fix nxsched_resume_scheduler() so that it does not call spin_clrbit()
  if a CPU does not hold a g_cpu_irqset
- Fix nxtask_exit() so that it acquires g_cpu_irqlock
- Update TODO

Impact:
- All SMP implementations

Testing:
- Tested with smp, ostest with the following configurations
- Tested with spresense:wifi_smp (NCPUS=2,4)
- Tested with sabre-6quad:smp (QEMU, dev board)
- Tested with maix-bit:smp (QEMU)
- Tested with esp32-core:smp (QEMU)
- Tested with lc823450-xgevk:rndis

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2020-12-10 08:33:42 +01:00
Abdelatif Guettouche
5d7428a385 arch/xtensa: Fix alignement when coloring and checking the stacks. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-12-09 09:44:04 -03:00
Abdelatif Guettouche
7075c98978 arch/xtensa: Add a pseudo save area to be able to backtrace from 
interrupts

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-12-09 09:44:04 -03:00
Abdelatif Guettouche
1f96f42f1e arch/xtensa/include/irq.h: Reserve some space for interptee's BSA. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-12-09 09:44:04 -03:00
Abdelatif Guettouche
368d21a0b9 arch/xtensa/src/common/xtensa_context.S: Name A3 register the usual way. 
i.e. a3 instead of r3.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-12-09 09:44:04 -03:00
Abdelatif Guettouche
5f9d9ba44c arch/xtensa/src/common/xtensa_context.S: Don't save CALL0 ABI 
callee-saved registers.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-12-09 09:44:04 -03:00
Abdelatif Guettouche
716a29ebeb arch/xtensa/src/common/xtensa_backtrace.S: Update the comments to show 
the functions in play during the backtrace.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-12-09 09:44:04 -03:00
raiden00pl
0c05f2ea38 stm32: add stm32g43x support and nucleo-g431rb board 2020-12-09 09:43:25 -03:00
Nathan Hartman
c257c458ad arch/stm32: Fix nxstyle errors 
arch/arm/src/stm32/stm32_rng.c:

    * Fix nxstyle errors.
 2020-12-09 09:21:42 +01:00
Juha Niskanen
7bc7b611d6 arch/arm/src/lc823450: fully parenthesize MIN and MAX macros 
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
 2020-12-08 12:58:40 -06:00
Nathan Hartman
c162069cd5 arch/stm32: Fix nxstyle errors (and one typo) 
arch/arm/src/stm32/stm32_dma2d.h
arch/arm/src/stm32/stm32_fmc.h
arch/arm/src/stm32/stm32_freerun.h
arch/arm/src/stm32/stm32_pm.h

    * Fix nxstyle errors.

arch/arm/src/stm32/hardware/stm32g4xxxx_dmamux.h

    * Fix typo in comment.
 2020-12-07 22:22:02 +01:00
raiden00pl
979a5b7fd4 stm32: convert all STM32G47X specific code to generic STM32G4 series code. 
This is an initial step towards supporting other STM32G4 chips.
 2020-12-06 13:37:02 -05:00
YAMAMOTO Takashi
b18c2e6cc5 arch/arm/src/arm/arm_assert.c: Don't assume debug macro expansion 2020-12-06 09:03:09 -06:00
YAMAMOTO Takashi
c3791e7c23 arch/arm/src/armv7-m/arm_assert.c: Don't assume debug macro expansion 2020-12-06 09:03:09 -06:00
YAMAMOTO Takashi
330aa43f72 arch/arm/src/stm32/stm32_adc.c: Don't assume debug macro expansion 2020-12-06 09:03:09 -06:00
YAMAMOTO Takashi
44f88cd71a arch/arm/src/lpc17xx_40xx/lpc17_40_can.c: Don't assume debug macro expansion 2020-12-06 09:03:09 -06:00
YAMAMOTO Takashi
065d310cf2 arch/arm/src/stm32f0l0g0/stm32_adc.c: Don't assume debug macro expansion 2020-12-06 09:03:09 -06:00
YAMAMOTO Takashi
d11bcef391 arch/x86_64/src/common/up_assert.c: Avoid assuming how _alert is expanded 2020-12-06 09:03:09 -06:00
YAMAMOTO Takashi
a600b2478d arch/arm/src/s32k1xx/s32k1xx_flexcan.c: Fix syslog formats 2020-12-06 07:41:37 -06:00
YAMAMOTO Takashi
1c7bdcea98 arch/arm/src/s32k1xx/s32k1xx_lpspi.c: Fix a syslog format 2020-12-06 07:41:37 -06:00
YAMAMOTO Takashi
cba6e69ccf arch/arm/src/s32k1xx/s32k1xx_lpi2c.c: Fix syslog formats 2020-12-06 07:41:37 -06:00
YAMAMOTO Takashi
fbf7d7cdf9 arch/arm/src/sam34/sam_emac.c: Fix syslog formats 2020-12-06 07:41:37 -06:00
YAMAMOTO Takashi
2829ecd18a arch/arm/src/sam34/sam_spi.c: Fix syslog formats 2020-12-06 07:41:37 -06:00
YAMAMOTO Takashi
5461bb2462 arch/arm/src/sam34/sam4s_nand.c: Fix syslog formats 2020-12-06 07:41:37 -06:00
YAMAMOTO Takashi
fcca968c0b arch/arm/src/sam34/sam_wdt.c: Fix syslog formats 2020-12-06 07:41:37 -06:00
YAMAMOTO Takashi
f22982f7e6 arch/arm/src/sam34/sam_wdt.c: Appease nxstyle 2020-12-06 07:41:37 -06:00
YAMAMOTO Takashi
8eb0712dec arch/arm/src/sam34/sam_hsmci.c: Fix syslog formats 2020-12-06 07:41:37 -06:00
YAMAMOTO Takashi
8af7af12b3 arch/arm/src/sama5/sam_emacb.c: Fix a syslog format 2020-12-06 07:41:37 -06:00
YAMAMOTO Takashi
83b24f0382 arch/arm/src/armv7-a/arm_syscall.c: Fix syslog formats 2020-12-06 07:41:37 -06:00
YAMAMOTO Takashi
3152ee6c62 arch/arm/src/sama5/sam_emacb.c: Fix syslog formats 2020-12-06 07:41:37 -06:00
YAMAMOTO Takashi
c3bcf80a18 arch/arm/src/sama5/sam_xdmac.c: Fix syslog formats 2020-12-06 07:41:37 -06:00
YAMAMOTO Takashi
c8eb8ac9c1 arch/arm/src/sama5/sam_xdmac.c: Appease nxstyle 2020-12-06 07:41:37 -06:00
YAMAMOTO Takashi
59dc739895 arch/arm/src/sama5/sam_ssc.c: Fix syslog formats 2020-12-06 07:41:37 -06:00
Matias N
ec83dc2ad3 nxstyle fixes 2020-12-05 21:44:49 -06:00
Matias N
de9842ab60 LPC43 RIT: build fixes 2020-12-05 21:44:49 -06:00
YAMAMOTO Takashi
0a4ee70f39 arch/renesas/src/common/up_createstack.c: Fix a syslog format 2020-12-05 08:13:32 -06:00
YAMAMOTO Takashi
e7389c8ef2 arch/renesas/src/rx65n/rx65n_eth.c: Fix syslog formats 2020-12-05 08:13:32 -06:00
YAMAMOTO Takashi
0583789abe arch/renesas/src/rx65n/rx65n_dumpstate.c: Fix syslog formats 2020-12-05 08:13:32 -06:00
YAMAMOTO Takashi
d6e1ae5616 arch/mips/src/pic32mz/pic32mz_spi.c: Fix a syslog format 2020-12-05 08:13:32 -06:00
YAMAMOTO Takashi
efde691052 arch/mips/src/pic32mx/pic32mx_spi.c: Fix syslog formats 2020-12-05 08:13:32 -06:00
YAMAMOTO Takashi
326b217ef4 arch/mips/src/pic32mx/pic32mx_ethernet.c: Fix syslog formats 2020-12-05 08:13:32 -06:00
YAMAMOTO Takashi
7b66e23a6a arch/mips/src/pic32mx/pic32mx_ethernet.c: Remove non-ascii characters 
0x91 and 0x92. I don't know what they are.
 2020-12-05 08:13:32 -06:00
YAMAMOTO Takashi
41306dbeae arch/mips/src/mips32/mips_dumpstate.c: Fix syslog formats 2020-12-05 08:13:32 -06:00
YAMAMOTO Takashi
bc2fe40f5b arch/mips/src/mips32/mips_vfork.c: Fix syslog formats 2020-12-05 08:13:32 -06:00
YAMAMOTO Takashi
4699e9dfde arch/mips/src/mips32/mips_swint0.c: Fix a syslog format 2020-12-05 08:13:32 -06:00
YAMAMOTO Takashi
7731de24e8 arch/mips/src/mips32/mips_sigdeliver.c: Fix a syslog format 2020-12-05 08:13:32 -06:00
YAMAMOTO Takashi
2d243f2c2d arch/mips/src/mips32/mips_schedulesigaction.c: Fix syslog formats 2020-12-05 08:13:32 -06:00
YAMAMOTO Takashi
58fdaa5c2d arch/xtensa/src/esp32/esp32_wifi_adapter.c: Fix a syslog format 2020-12-05 08:13:32 -06:00
YAMAMOTO Takashi
a927f98a23 arch/arm/src/imxrt/imxrt_flexcan.c: Fix syslog formats 2020-12-05 08:13:32 -06:00
YAMAMOTO Takashi
29400f0e38 arch/arm/src/sama5/sam_tsd.c: Fix syslog formats 2020-12-05 08:13:32 -06:00
YAMAMOTO Takashi
9510c968cd arch/arm/src/sama5/sam_hsmci.c: Fix syslog formats 2020-12-05 08:13:32 -06:00
YAMAMOTO Takashi
a88da8f7d7 arch/arm/src/sama5/sam_spi.c: Fix syslog formats 2020-12-05 08:13:32 -06:00
YAMAMOTO Takashi
1a71802a06 arch/arm/src/sama5/sam_dmac.c: Fix a syslog format 2020-12-05 08:13:32 -06:00
YAMAMOTO Takashi
cc9c652a58 arch/arm/src/sama5/sam_dmac.c: Appease nxstyle 2020-12-05 08:13:32 -06:00
YAMAMOTO Takashi
260b1af52b arch/arm/src/sama5/sam_dmac.c: Remove non ascii characters 
0x91 and 0x92. I don't know what they are.
 2020-12-05 08:13:32 -06:00
YAMAMOTO Takashi
2a94c70ec8 arch/arm/src/sama5/sam_twi.c: Fix syslog formats 2020-12-05 08:13:32 -06:00
YAMAMOTO Takashi
05bf54fdbc arch/arm/src/sama5/sam_lcd.c: Fix a syslog format 2020-12-05 08:13:32 -06:00
YAMAMOTO Takashi
4c3d8e7429 arch/arm/src/sama5/sam_lcd.c: Appease nxstyle 2020-12-05 08:13:32 -06:00
YAMAMOTO Takashi
7cb69a652d arch/arm/src/samv7/sam_twihs.c: Fix a syslog format 2020-12-05 08:13:32 -06:00
YAMAMOTO Takashi
ec4b3d3e84 arch/arm/src/samd5e5/sam_eic.c: Fix syslog formats 2020-12-05 08:13:32 -06:00
YAMAMOTO Takashi
7eacf123ec arch/arm/src/samd5e5/sam_tc.c: Fix syslog formats 2020-12-05 08:13:32 -06:00
YAMAMOTO Takashi
113b2b899a arch/arm/src/samv7/sam_spi.c: Fix a syslog format 2020-12-05 08:13:32 -06:00