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b107e4f417
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14570 Commits

Author SHA1 Message Date
Petro Karashchenko
b107e4f417 nuttx: unify MIN, MAX and ABS macro definition across the code 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-12-21 09:31:28 +08:00
Xiang Xiao
fd0d6a9bf5 compiler.h: Add _ between format|printf|syslog|scanf|strftime and like 
align with other macro naming style

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-12-21 01:05:19 +02:00
TimJTi
bc9b476d55 Update sam_mcan.c 2022-12-20 19:49:13 -03:00
David Sidrane
4fa163ade7 s32k3xx:EDMA fix git count 2022-12-20 18:01:21 +08:00
David Sidrane
d33475d2d4 s32k3xx:Serial add DMA 2022-12-20 13:28:54 +08:00
TimJTi
e6bfaa14ee SAMA5D2 add Flexcom SPI 
Flexcom working, DMA not looked at for SAMA5D2

Update sam_flexcom_spi.c

Update sam_flexcom_spi.h

Update sam_config.h

Update hardware/sam_flexcom_spi.h

pkarashchenko reviews

SAMA5 serial and flexcom serial corrections
 2022-12-20 12:20:28 +08:00
David Sidrane
e89e7eab8d s32k1xx:serial:Fix selection of RTS to iflow 2022-12-20 01:51:10 +08:00
David Sidrane
033adeced4 imxrt:serial:Fix selection of RTS to iflow 2022-12-20 01:50:57 +08:00
Peter van der Perk
b5fd0b2381 S32K3XX MR-CANHUBK3 Add protected knsh support 2022-12-19 20:10:34 +08:00
GD32-MCU
659bd495b0 Add i2c driver for gd32f450 MCU 2022-12-17 17:12:26 +08:00
Petro Karashchenko
cc0ee12092 arch/arm/samv7: add ARCH_RAMVECTORS support 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-12-17 13:57:03 +08:00
Petro Karashchenko
e28e4fd320 arch/arm: fix typos in start files 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-12-17 13:56:17 +08:00
TimJTi
ad33ccfa53 SAMA5 serial and flexcom serial corrections 2022-12-17 01:09:43 +02:00
Xiang Xiao
d5689e070b net/arp: Remove nuttx/net/arp.h 
1.move ARPHRD_ETHER to netinet/arp.h
1.move arp_entry_s to net/arp/arp.h
2.move arp_input to nuttx/net/netdev.h

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-12-16 22:10:59 +02:00
zhangyuan21
453a1a7332 arch: move stack and task dump to common code 
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
 2022-12-17 01:59:35 +08:00
zhangyuan21
632d87ee71 arch: remove up_release_pending function 
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
 2022-12-16 21:29:57 +08:00
Peter van der Perk
19ca5ecbb0 Fix S32K1XX PM which was broken by #7869 2022-12-16 20:37:47 +08:00
Peter Bee
aeed8f5d26 include/nuttx/video: remove validate_buf 
Removing validate_buf since it's only locally called in driver

Signed-off-by: Peter Bee <bijunda1@xiaomi.com>
 2022-12-16 17:03:35 +08:00
David Sidrane
707ac4b8f6 s32k1xx:Apply style changes from code review 
Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-12-16 01:06:12 +08:00
David Sidrane
75baa5b932 s32k1xx:LPSPI use DMA 2022-12-16 01:06:12 +08:00
David Sidrane
89f99dceed s32ke3xx:EDMA Usage Clean up 2022-12-15 22:21:32 +08:00
David Sidrane
df4eb4896d s32k3xx:LPSPI register usage cleanup 2022-12-15 22:21:32 +08:00
Petro Karashchenko
949a0d6032 arch/arm: remove FAR from ARM files 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-12-15 11:38:17 +08:00
Peter van der Perk
d172d8cd0f S32K FlexCAN don't use a blocking wait in tx avail 2022-12-14 10:45:43 -05:00
David Sidrane
1760057e29 s32k1xx:Apply Style Changes from code review 
Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-12-14 21:03:31 +08:00
David Sidrane
592e946bdf 32k1xx:serial:Support GPIO (buffler level) Flow control 2022-12-14 21:03:31 +08:00
David Sidrane
5a948ed3dd 32k1xx:serial fix HW Handshaking 2022-12-14 21:03:31 +08:00
David Sidrane
9bb1226b04 s32k1xx:serial Add EDMA 2022-12-14 21:03:31 +08:00
David Sidrane
8a412ba59b s32k1xx:Refactor DMAMUX for s32k11x, s32k14x 2022-12-14 21:03:31 +08:00
anjiahao
bc0fe0ea16 crypto:add some hardware support 
esp32c3: aes hmac-sha1 hmac-sha256
stm32f0l0g0 stm32l1 : aes
sam34: aes
lpc43: aes
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
 2022-12-14 02:33:56 +08:00
anjiahao
2b071b7a42 arch/armv8m:support pmu api 
The register definition comes from CMSIS
https: //github.com/ARM-software/CMSIS_5
commit id:10bf763a82318c0c852ff9ecc2d5cd8cebe7d761
file: Core/Include/pmu_armv8.h
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
 2022-12-14 00:27:02 +08:00
David Sidrane
4284d0398b imxrt:Serial LPUART_STAT_PF s/b LPUART_STAT_NF 
as a result of a typo LPUART_STAT_NF was not checked and
   cleared on LPUART_STAT_PF.
 2022-12-14 00:26:42 +08:00
Peter van der Perk
6b3b5751c1 S32K automatically calculate size of periphclocks array 2022-12-13 19:50:01 +08:00
chao an
47fbfa215e fs/hostfs: mode_t of mkdir(2) should use the nuttx prototype 
Signed-off-by: chao an <anchao@xiaomi.com>
 2022-12-13 18:16:20 +08:00
田昕
0382b63f5d move common assert logic together. 
Signed-off-by: 田昕 <tianxin7@xiaomi.com>
 2022-12-12 17:05:02 +08:00
zhangyuan21
ffd2eb5b14 arch/arm: only compare callee-saved registers for fpu 
Registers S0-S15 (D0-D7, Q0-Q3) do not need to be preserved. They can be used for passing
arguments or returning results in standard procedure-call variants.
Registers D16-D31 (Q8-Q15), do not need to be preserved.

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
 2022-12-09 11:00:38 +08:00
wangbowen6
27ea9f7625 arm/Kconfig: add cortex-m85 config 
Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
 2022-12-09 01:53:10 +08:00
wangbowen6
c44f87eb1a arm: add syscall SYS_save_context support for old arm and armv7-r 
Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
 2022-12-08 12:37:29 +08:00
TimJTi
18482efc39 SAMA5D2 fix printf formatter 
Update sam_adc.c

Update sam_adc.c

%08x -> PRIx32

More %08x

Revert incorrect change (PRIx32)

Update sam_tc.c

Update sam_tc.c

more style corrections/typos

Update arch/arm/src/sama5/sam_adc.c

Co-authored-by: Xiang Xiao <xiaoxiang781216@gmail.com>
 2022-12-07 21:33:17 +01:00
Peter van der Perk
9c27d96b8a s32k3xx:LPSPI Check for TX complete before RX 
Co-authored-by: David Sidrane <david.sidrane@nscdg.com>
 2022-12-05 22:35:21 +08:00
Peter van der Perk
e7449cf97a S32K3XX EDMA Set Backdoor for DTCM memory map 2022-12-05 22:35:21 +08:00
chao an
d12ddf56df arm/arm: sync ARM_THUMB support from cortex-a 
Signed-off-by: chao an <anchao@xiaomi.com>
 2022-12-05 01:09:31 +08:00
Xiang Xiao
c6e9edcbb6 net: Rename arp_arpin to arp_input 
align with other similar function(e.g. ipv4_input and ipv6_input)

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-12-04 20:39:21 +08:00
chao an
62004a28a6 net/d_buf: remove d_buf reference from l3/l4 
l3/l4 stack will decouple the reference of d_buf gradually, Only legacy
devices still retain d_buf support, new net devices will use d_iob

Signed-off-by: chao an <anchao@xiaomi.com>
 2022-12-04 20:37:14 +08:00
chao an
4b70e4ff77 arm/cortex-r: sync ARM_THUMB support from cortex-a 
Signed-off-by: chao an <anchao@xiaomi.com>
 2022-12-04 20:12:31 +08:00
wangbowen6
4859d40a51 arm_syscall: add SYS_save_context for armv7-a 
I noticed that there is not register information in the crash log
when DEBUGASSERT failed, the reason is that the arm_dumpstate()
call up_saveusercontext() to get the context of current task but
armv7-a do not support syscall SYS_save_context.

crash log:
[48/12/ 7 16:14:03] [CPU1] [10] [a7] up_assert: Assertion failed CPU1 at file:mm_heap/mm_free.c line: 115 task: panel_apps
[48/12/ 7 16:14:03] [CPU1] [10] [a7] backtrace|10: 0x38443440 0x38081f30 0x38002888 0x3802cb7c 0x38036e34 0x38037978 0x380386f0 0x38037e64
[48/12/ 7 16:14:03] [CPU1] [10] [a7] backtrace|10: 0x38036edc 0x380376a0 0x38035a2c 0x380070d0 0x3804eae4 0x3802abd0 0x3802277c 0x3804b998
[48/12/ 7 16:14:03] [CPU1] [10] [a7] backtrace|10: 0x38091be8 0x38099250 0x38096adc 0x3808f134 0x3802d5d8 0x380191a4
[48/12/ 7 16:14:03] [CPU1] [10] [a7] arm_registerdump: R0: 00000000 R1: 00000000 R2: 00000000  R3: 00000000
[48/12/ 7 16:14:03] [CPU1] [10] [a7] arm_registerdump: R4: 00000000 R5: 00000000 R6: 00000000  R7: 00000000
[48/12/ 7 16:14:03] [CPU1] [10] [a7] arm_registerdump: R8: 00000000 SB: 00000000 SL: 00000000  FP: 00000000
[48/12/ 7 16:14:03] [CPU1] [10] [a7] arm_registerdump: IP: 00000000 SP: 00000000 LR: 00000000  PC: 00000000
[48/12/ 7 16:14:03] [CPU1] [10] [a7] arm_registerdump: CPSR: 00000000

Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
 2022-12-04 01:52:49 +08:00
okayserh
0dafa5f921 Added initial USB support for stm32f746g discovery. 2022-12-03 20:06:47 +08:00
David Sidrane
da7fe760e8 s32k1xx:LPI2C Add DMA support 
s32k3xx:LPI2C fix RESET so it compiles
 2022-12-03 13:54:34 +08:00
David Sidrane
ddc178122e s32k3xx:EDMA Add Error handeling 2022-12-03 02:47:42 +08:00
David Sidrane
1d84656f79 s32k3xx:EDMA Add Looping and Cleanup 2022-12-03 02:47:42 +08:00