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44 Commits

Author SHA1 Message Date
Abdelatif Guettouche
cc23bdeca4 boards/xtensa/esp32: Add a section in external memory to hold some BSS 
data.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-03-23 16:39:01 +09:00
Abdelatif Guettouche
a68a39c785 xtensa/esp32: Move internal heap to the beginning of region 2. 
Internal heap was occupying the region straight after .data up to
HEAP_REGION1.  The issue with this is if static allocation is large,
we'll end up with too little memory left for the internal heap.
Moving it to the beginning of region 2 gives us more room to play with.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-03-16 16:22:08 +09:00
chenwen
19627095e4 esp32/esp32_allocateheap.c: Support the maximum available internal heap configuration 2021-03-02 18:27:20 -08:00
YAMAMOTO Takashi
aed24f1255 esp32: Retire XTENSA_IMEM_PROCFS 
Now /proc/meminfo has the equivalent.
 2021-02-12 03:16:03 -08:00
Abdelatif Guettouche
6bc070024d arch/xtensa/Kconfig: Reduce the default value of the internal memory. 
The static memory is now divided at almost the middle to not override
the ROM data.  The old 0x28000 will take all of what's left for heap
region1.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-01-27 09:49:58 -08:00
Abdelatif Guettouche
c00141c41a arch/xtensa/Kconfig: The ESP32 has a different numbers for vectors and 
IRQs.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-01-15 09:47:33 +01:00
Abdelatif Guettouche
7075c98978 arch/xtensa: Add a pseudo save area to be able to backtrace from 
interrupts

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-12-09 09:44:04 -03:00
chao.an
049c991d28 style/Kconfig: remove unnecessary trailing whitespace 
N/A

Signed-off-by: chao.an <anchao@xiaomi.com>
 2020-11-28 12:20:30 +01:00
Abdelatif Guettouche
9d28687b6f arch/xtensa: Print backtrace on assertions. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-11-21 11:31:46 -03:00
Abdelatif Guettouche
9b98f20969 arch/xtensa: Fix the naming of the internal heap functions. They should 
be prefixed by xtensa_ instead of up_.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
34ad33c8b2 arch/xtensa/Kconfig: Add help for the seperate internal heap. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
1b12d20225 arch/xtensa/src/esp32/esp32_spiflash.c&esp32_spi.c: Allocate a buffer from DRAM 
when the given buffer is from PSRAM.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
7ac5f7a35b arch/xtensa/src/esp32: Add a PROCFS entry for the internal memory 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
a1318926b4 arch/xtensa/esp32: Allow internal drivers and tasks' stack to be 
allocated in an internal heap.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-10-25 20:20:01 -03:00
liuhaitao
d5c6bfe6cf arch: Add custom arch chip build support 
Just like custom board build support, add custom arch chip build
support.

Change-Id: I71c87e6b2195501a1b1d728b71d7cbe344951057
Signed-off-by: liuhaitao <liuhaitao@xiaomi.com>
 2020-10-20 14:48:16 +08:00
Dong Heng
a0b84ae53e xtensa/esp32: Add ESP32 WiFi adapter and driver 2020-10-17 22:46:27 +09:00
Masayuki Ishikawa
6232e7f84e arch: esp32: Fix crash on startup 
Summary:
- This commit fixes crash on startup introduced by commit 232aa62f03

Impact:
- Affects all use cases for esp32

Testing:
- Tested with esp32-core:smp with QEMU

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2020-10-07 18:43:13 -03:00
Alan C. Assis
232aa62f03 Add support to PSRAM using SPIRAM interface 2020-10-07 16:55:34 +01:00
Abdelatif Guettouche
c20c8c6dd5 arch/xtensa/esp32: Implement system reset. 
Both CPUs are soft-reset with a call to board_reset.  This is actually a
Core Reset, so both cores and all registers are reset.  The only
exception is RTC.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-10-07 11:51:47 -03:00
Masayuki Ishikawa
08c4376606 arch, include, sched : Refactor ARCH_GLOBAL_IRQDISABLE related code 
Summary:
- ARCH_GLOBAL_IRQDISABLE was initially introduced for LC823450 SMP
- At that time, i.MX6 (quad Cortex-A9) did not use this config
- However, this option is now used for all CPUs which support SMP
- So it's good timing for refactoring the code

Impact:
- Should have no impact because the logic is the same for SMP

Testing:
- Tested with board: spresense:smp, spresense:wifi_smp
- Tested with qemu: esp32-core:smp, maix-bit:smp, sabre-6quad:smp
- Build only: lc823450-xgevk:rndis, sam4cmp-db:nsh

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2020-09-03 10:20:20 +08:00
hartmannathan
bfc153ca27
Fix typos in comments and documentation (#750) 
* Fix typos in comments and documentation
 2020-04-08 06:45:35 -06:00
YAMAMOTO Takashi
03a916acb8 Kconfig: Add kconfig options for module text allocator 
Enable it for ESP32.
 2020-03-16 07:54:49 -06:00
Masayuki Ishikawa
a5cb0b3731 arch: xtensa: Fix SMP related logic 
NOTE: Applied the same logic as in other SMP architectures
 2020-03-04 23:34:43 -06:00
Gregory Nutt
1c5ec07414 arch/: Remove dangling space at the end of lines. 2017-06-28 13:16:48 -06:00
Gregory Nutt
7fe112fe4c Kconfig/deconfigs: Add CONFIG_ARCH_TOOLCHAIN_GNU to indicate that the toolchain is based on GNU gcc/as/ld. This is in addition to the CPU-specific versions of the same definition. 2017-05-13 11:44:12 -06:00
Gregory Nutt
adbacfc42c Xtensa ESP32: Fix a duplicate in Kconfig files. Level 1 should return via RFE. 2016-12-17 07:07:33 -06:00
Gregory Nutt
6a875bcb61 Xtensa: Add EXPERIMENTAL hooks to support lazy co-processor state restore in the future. 2016-11-16 06:48:13 -06:00
Gregory Nutt
8c96221093 Xtensa: Replace CONFIG_XTENSA_CALL0_ABI with compiler defined __XTENSA_CALL0_ABI__ 2016-10-30 07:37:51 -06:00
Gregory Nutt
d346f25aae Xtensa/ESP32: Fix some compile issues related to new co-processor logic 2016-10-29 10:27:46 -06:00
Gregory Nutt
ccf5b4e357 Xtensa: Cleanup of co-processor logic; remove some unnecessary things. 2016-10-29 09:36:33 -06:00
Gregory Nutt
be2a801e30 Xtensa: Add xtensa_coproc.h 2016-10-28 10:33:20 -06:00
Gregory Nutt
e93bcda8ae ESP32: Partial co-processor state save logic. Incomplete and will probably be redesigned. 2016-10-28 09:05:39 -06:00
Gregory Nutt
6bbe55602c Xtensa: Add tie.h 2016-10-23 13:25:41 -06:00
Gregory Nutt
75df09fd40 Remove support for software prioritization of interrupts 2016-10-23 06:37:28 -06:00
Gregory Nutt
23b003c649 Xtensa: Some things in Kconfig are really core options, not user configurations. 2016-10-22 12:25:56 -06:00
Gregory Nutt
5c3afd088e Xtensa: A little more interrupt handling logic 2016-10-20 11:44:14 -06:00
Gregory Nutt
d1562a18e6 Add vectors for interrupt levels 2-6 2016-10-19 13:58:51 -06:00
Gregory Nutt
054a1a8231 ESP32 Core: Refresh configuration 2016-10-18 09:41:16 -06:00
Gregory Nutt
c1334048c5 Xtensa: Add initial CPU0 start-up logic 2016-10-17 08:15:36 -06:00
Gregory Nutt
8c3c78f24a Xtensa: Fix register usage in up_strackframe 2016-10-16 09:26:33 -06:00
Gregory Nutt
0be3d12ba0 ESP32: Add option for interrupt support 2016-10-15 10:11:35 -06:00
Gregory Nutt
e3ead1db69 Xtensa: Add an initial guess at the form of struct xcpcontext 2016-10-14 13:17:48 -06:00
Gregory Nutt
25331aeb63 ESP32 Core: Add an NSH configuration for build testing 2016-10-13 14:37:28 -06:00
Gregory Nutt
55523f5771 arch/xtensa: Add a few basic XTENSA/LX6 files. Not yet enough to do anything with 2016-10-12 13:11:05 -06:00