Commit Graph

5309 Commits

Author SHA1 Message Date
Gregory Nutt
29136e51cc Clean up and review of header files for conformance to standards 2015-06-12 19:26:01 -06:00
Gregory Nutt
c07a9632cc Clean up and review of header files for conformance to standards 2015-06-12 19:17:42 -06:00
Gregory Nutt
7bd3d5eaf1 Clean up and review of header files for conformance to standards 2015-06-12 19:00:52 -06:00
Gregory Nutt
d6ce8220fd Clean up and review of header files for conformance to standards 2015-06-12 18:07:47 -06:00
Gregory Nutt
46148524a9 SAM4S/4E: Eand default loop optimiozation if EEFC_FMR configuration. From Marco Aurélio da Cruz 2015-06-11 14:35:49 -06:00
Gregory Nutt
4b11c9da2c Kinetis: Add up-sysemreset.c to Make.defs 2015-06-11 12:08:45 -06:00
Gregory Nutt
4712c23218 Make some imported files a little closer to the NuttX coding standard 2015-06-11 09:14:44 -06:00
Gregory Nutt
85d88d364f Kinetis: Add logic to set CFM protect area to all 0xff in all configurations 2015-06-11 08:39:40 -06:00
Gregory Nutt
7fab748667 STL32 F15x: stm32_stdclockconfig() was calling stm32_pw_setvos() which accessed PWR_CR via an inactive APB. From Juha Niskanen. 2015-06-11 08:09:36 -06:00
Gregory Nutt
98b2034cdf Teensy-3.1: Add user LED support 2015-06-10 17:19:26 -06:00
Gregory Nutt
ad2a529624 RAM functions should have noinline attribute 2015-06-10 14:51:42 -06:00
Gregory Nutt
cb1a6e7954 Cosmetic 2015-06-10 14:20:11 -06:00
Gregory Nutt
0742ee3c3e Add support for MK20DN--VLH5 and MK20DX---VLH5. Needed for backward compatible support for Teensy-3.0 2015-06-10 11:45:17 -06:00
Gregory Nutt
075261f5ee SAML21: Since SERCOM5 usese a different output channel, it will also need a different GCLK generator 2015-06-10 08:38:35 -06:00
Gregory Nutt
9be151cdbb SAML21: A different SLOW clock must be used with SERCOM5 2015-06-10 08:18:05 -06:00
Gregory Nutt
f01c04f1a7 Add support for other members of the Kinetis MK20DX---VLH7 family; undate a README 2015-06-09 18:01:32 -06:00
Gregory Nutt
d1847d2e0b Correct write to incorrect register in EFM32 SPI driver. From Pierre-noel Bouteville. 2015-06-09 12:50:30 -06:00
Gregory Nutt
13e8c0d5b1 Update/add README.txt files 2015-06-09 07:03:25 -06:00
Gregory Nutt
f3425d6298 Fix SAMA5 CAN frame construction. From Max Holtzberg. 2015-06-07 13:13:44 -06:00
Gregory Nutt
f875a26ed2 Add SPI GPIO pin initialization. From Pierre-noel Bouteville. 2015-06-05 14:26:21 -06:00
Gregory Nutt
0488df7cf3 Correct some comments. Noted by Jouko Holopainen 2015-06-04 08:12:58 -06:00
Gregory Nutt
e816afe161 LC17 Ethernet: Ignore 4-bit versin number when checking for PHY ID match 2015-06-03 19:47:10 -06:00
Gregory Nutt
03562269d4 Lincoln60: Add a network enabled NXH configuration (still does not yet build) 2015-06-03 18:48:08 -06:00
Gregory Nutt
7677cf72eb LPC17 Ethernet: Add support for the Micrel KSZ8041 PHY. 2015-06-03 17:34:36 -06:00
Gregory Nutt
d9d6ff1d1b Fix some memory sizing errors in refreshed defconfig files 2015-06-02 08:44:57 -06:00
Gregory Nutt
e6b8d2eebe Refresh some Olimex LPC1766STK networking configurations 2015-06-02 08:12:44 -06:00
Gregory Nutt
1d697a18d1 Condition default value for CONFIG_ARMV7M_TARGET2_PREL on UCLIBCXX_EXCEPTION 2015-06-01 15:12:33 -06:00
Gregory Nutt
280e2ee385 Add support uClibc++ excpetions. This involves additional handling for relative relation types, additional support for unwinding, as well as additional changes. The culmination of a big effort fromo Leo Aloe3132 2015-06-01 14:16:18 -06:00
Gregory Nutt
73419e77f4 LPC17 Ethernet: Fix several compilation related issues when CONFIG_NET_NOINTS=y 2015-06-01 08:35:40 -06:00
Gregory Nutt
29b6f140e3 LPC17xx Ethernet: Improve CONFIG_NET_NOINTS implementation 2015-06-01 08:07:32 -06:00
Gregory Nutt
0c59dd2888 Fix a missing # in the previous commit 2015-05-31 13:26:13 -06:00
Gregory Nutt
4e811aa54d Add basic support for the STM32F205RG. From SourceForge Ticket 40 (anonymous). 2015-05-31 13:06:26 -06:00
Gregory Nutt
a25d0908f8 Simulator: Add more name conversons. From Max Neklyudov 2015-05-29 08:20:06 -06:00
Gregory Nutt
38735fafeb More missing semicolons after DEBUGASSERT 2015-05-27 13:32:39 -06:00
Gregory Nutt
d41b050526 Fix another missing semicolon after DEBUGASSERT 2015-05-27 11:49:19 -06:00
Gregory Nutt
d50761428c LPC11: Fix hardcoded BAUD calculation. Is no configurable. From Alan Carvalho de Assis 2015-05-27 09:44:07 -06:00
Gregory Nutt
528275a77c Fix some typos 2015-05-27 07:34:35 -06:00
Gregory Nutt
ac102d3f85 K20: Some preliminary pin definitions 2015-05-26 17:02:47 -06:00
Gregory Nutt
318345fb1d Basic support for the Kinetis K20 architecture. Taken from PX4. This is the work of Jakob Odersky. 2015-05-26 15:03:35 -06:00
Gregory Nutt
cae38625f8 SAM4L: Fix some issues from loast commit. Now running off DFLL with source clock = XOSCK32K 2015-05-26 13:25:39 -06:00
Gregory Nutt
b96a141e8a SAML21-Xlplained: Add options to enable XOSC32K and to use it as the DFLL source; NSH configure now uses DFLL with OSC16M source 2015-05-26 10:39:38 -06:00
Gregory Nutt
f055d4cac4 Logic that samples the free running counter reads the pending interrupt status regsiter and can cause interrupts to be lost. So, if when the status regsiter is read, the logic must also handle the timer overflow event. Found and fixed by Max Neklyudov 2015-05-26 08:09:10 -06:00
Gregory Nutt
fe175fbc16 SAMD20: Fixes the problem introduced with the SAML21 integration 2015-05-25 10:13:06 -06:00
Gregory Nutt
643a98a0a8 SAML21: Fix issue with open loop operation; Add configuration options to select clock source 2015-05-24 10:27:37 -06:00
Gregory Nutt
9649e564f9 LPC11xx: Use offsets instead of absolute address in look-up tables. This saves about 156 bytes of FLASH. From Alan Carvalho de Assis. 2015-05-24 07:49:38 -06:00
Gregory Nutt
6973337ccd Fix numerous typos in configuration variable names. Tracked down by Alan Carvalho de Assis 2015-05-23 17:08:35 -06:00
Gregory Nutt
8e71f90d84 SAML21: Add missing support for GCLK8 2015-05-23 17:02:13 -06:00
Gregory Nutt
d495834882 SAML21: Several SERCOM fixes. No gets UART output, but at the wrong BAUD 2015-05-23 13:08:28 -06:00
Gregory Nutt
84ca7f4a46 SAM4L: Re-order some clock initialization. There was a dependency of GCLK0 on DFLL, but DFLL was being enabled after GCLK0 2015-05-23 11:01:22 -06:00
Gregory Nutt
41f9fb8c62 SAML21: Fix some register definitions; board OSC16M frequency 2015-05-23 10:54:51 -06:00