Otherwise, the IP address is always considered to conflict, and the ipv6
address cannot be effectively obtained.
Later we will look at how to perform conflict detection on L3 network cards
Signed-off-by: zhanghongyu <zhanghongyu@xiaomi.com>
PWMx_CHy_LONLY options have been added to Kconfig, too.
If LONLY is selected, it's not possible to use complementary outputs.
If LONLY is not selected, it's possible to use H or complementary
output. If configured correctly with cpol and dcpol attributes,
a H-like behaviour can be achieved. May be useful when you run out
of free MCU pins.
Signed-off-by: Stepan Pressl <pressste@fel.cvut.cz>
These configs are changed based on below rules.
1. always enable +CONFIG_LV_USE_NUTTX=y
2. If touchpad is used, enable +CONFIG_LV_USE_NUTTX_TOUCHSCREEN=y
3. enable log by +CONFIG_LV_USE_LOG=y
4. If -CONFIG_LV_MEM_CUSTOM=y previously defined, replace it with +CONFIG_LV_USE_CLIB_MALLOC=y +CONFIG_LV_USE_CLIB_SPRINTF=y +CONFIG_LV_USE_CLIB_STRING=y
5. If -CONFIG_LV_PORT_USE_FBDEV=y, default config is for fbdev. If -CONFIG_LV_PORT_USE_LCDDEV=y, +CONFIG_LV_USE_NUTTX_LCD=y
6. Remove all -CONFIG_LV_TICK_CUSTOM=y -CONFIG_LV_TICK_CUSTOM_INCLUDE="port/lv_port_tick.h"
7. If -CONFIG_LV_PORT_LCDDEV_DOUBLE_BUFFER=y, replace it with CONFIG_LV_NUTTX_LCD_DOUBLE_BUFFER=y. For fbdev, double buffer is automatically detected.
8. If -CONFIG_LV_COLOR_16_SWAP=y, need to upgrade the LCD driver to support hardware byte order swap.
Signed-off-by: Xu Xingliang <xuxingliang@xiaomi.com>
The qemu-rv use a small init code for M mode in kernel build.
It is hard-coding and is difficult to change. Due to the fact,
introduce a already mature SBI implement (e.g OpenSBI) to
replace existing code is a better choice.
This patch introduce some change for qemu-rv:
1. use SSTC to provide time interrupt in kernel build
2. remove uncessary M mode trap.
For simplicity, this patch does not add support for booting
nuttx for any core, but force boot core to start core 0 and
let core 0 do the initialization.
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
SSTC extension allows nuttx to implement S-mode timer directly,
which is useful for starting at S-mode.
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
As `up_get_intstackbase` supports per cpu stack base, fix
the report value with the cpu specific one.
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
It is misleading to allocate stack from static array and heap,
make all stack allocated from heap area.
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
according to manual:
The FPU is not affected by any security configuration.
Thus, it appears as not present in PERIPHID[n].PERM
register located in the SPU
This patch adds definitions to support user space device mappings
that allows devices like frame buffer to be accessible from user
space in kernel mode.
The are mainly two changes:
- in `mm/`:
added vm_map_region(), vm_unmap_region() for drivers to do
device mapping easily.
- in `arch/`:
extended ARCH_SHM_NPAGES as user-space mapping region size.
decoupled ARCH_SHM_MAXREGIONS from region size calculations and
limit its usage only for SysV shm purposes.
Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
This patch adds a way to configure PLL frequencies. The configuration is
given by board logic.
These values should only be modified by the bootloader, but we don't have
that yet so the flag is never activated.
The frequency LUT idea is not necessary as the PLL output can be calculated
by the CPU. It is better to do this as the clocks are set by the SPL (2nd
stage program loader) which means the NuttX payload would not have access
to such a LUT anyhow.
The mask PLL_DIV_RDIV_MASK is also fixed, as that was simply wrong.
Also add call to imx9_clockconfig (although it does not do anything yet).
Support the network interface card driver to receive zero copies of packets and send and receive giant frame packets, allowing drivers to initialize the DMA buffer to the iob structure, and we can apply for IOB with large memory
Signed-off-by: zhanghongyu <zhanghongyu@xiaomi.com>
In some special chipsets, multiple CPUs may be bundled in one hardware
thread cluster, which results in hartid and cpuindex not being exactly
the same. The new option will decouple Scratch-based Per-CPU storage
with S-Mode to distinguish the real cpu index.
Signed-off-by: chao an <anchao@lixiang.com>
RISC-V provided fetch-and-op style atomic primitives as they scale
to highly parallel systems better than LR/SC or CAS. A simple
microarchitecture can implement AMOs using the LR/SC primitives,
provided the implementation can guarantee the AMO eventually
completes. More complex implementations might also implement AMOs
at memory controllers, and can optimize away fetching the original
value when the destination is x0.
Signed-off-by: chao an <anchao@lixiang.com>
Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
Most of the functions used to describe the SoCs capabilities are
available for all Espressif's chips. This commit uses this set of
common functions and remove outdated functions that perform the
same operations in a chip level.
1. pm configuration demonstrates the use of power management present on the ESP32-S3.
2. You can use the pmconfig command to test the power management, for details look at
``Documentation/platforms/xtensa/esp32s3/boards/esp32s3-devkit/index.rst``
Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
* Extends tools/configure.sh default appdir search paths.
* Search for apps in ../nuttx-apps and ../nuttx-apps.git locations.
* This allows -a parameter skip when nuttx-apps or nuttx-apps.git is used.
Signed-off-by Tomasz 'CeDeROM' CEDRO <tomek@cedro.info>
acpi_init() must be called early during boot, some system components may be
unavailable at this stage, so debug messages won't work
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
