nuttx

arm_addrenv.c

Add configuration to use the fixed DRAM mapping for the page pool (if available) instead of remapping dynamically to access L2 page tables and page data. Also, add logic in address environment creation to initialize the shared data at the beginning of the .bss/.data process memory region.

2014-09-10 08:41:01 -06:00

arm_allocpage.c

More trailing whilespace removal

2014-04-13 16:22:22 -06:00

arm_assert.c

Replace os_internal.h with sched/sched.h in files that actually reference something in sched.h

2014-08-08 17:53:55 -06:00

arm_blocktask.c

ARM: Move address environment switch from the task switchers to the interrupt handler. That may save doing the actin multiple times per interrupt

2014-08-28 06:34:09 -06:00

arm_checkmapping.c

Improve Cortex-A5 context switching so that a little less copying is done

2013-07-24 07:47:51 -06:00

arm_coherent_dcache.c

up_coherent_dcache should do nothing the the length is zero

2014-08-26 14:51:53 -06:00

arm_copyarmstate.c

Remove os_internal.h it has been replace by several new header files under sched/. There have been some sneak inclusion paths via os_internal.h, so expect a few compilation errors for some architectures

2014-08-08 18:39:28 -06:00

arm_copyfullstate.c

Remove os_internal.h it has been replace by several new header files under sched/. There have been some sneak inclusion paths via os_internal.h, so expect a few compilation errors for some architectures

2014-08-08 18:39:28 -06:00

arm_dataabort.c

Replace os_internal.h with sched/sched.h in files that actually reference something in sched.h

2014-08-08 17:53:55 -06:00

arm_doirq.c

Fix an error introduced into ALL implmentations of interrupt dispatch logic

2014-08-28 08:41:57 -06:00

arm_elf.c

ELF relocations. Some relocation types do not have a named symbol associated with them. The design did not account for that case

2014-09-09 16:52:51 -06:00

arm_fpuconfig.S

Cosmetic spaces to tabs change

2013-12-08 10:38:33 -06:00

arm_fullcontextrestore.S

Improve some ARMv7-A/M floating point register save time; Add floating point register save logic for ARMv7-A

2013-07-23 17:52:06 -06:00

arm_head.S

Need to enable FIQ in initial task state; Improve H32/64 test in IRQ handling

2014-06-21 09:55:09 -06:00

arm_initialstate.c

Rename CONFIG_NUTTX_KERNEL to CONFIG_BUILD_PROTECTED; Partially integrate new CONFIG_BUILD_KERNEL

2014-08-29 14:47:22 -06:00

arm_l2cc_pl310.c

ARM: Move L2 cache initialization to much later in the sequence

2014-07-27 10:03:33 -06:00

arm_memcpy.S

Ooops... last (cosmetic) changes were still in the editor

2014-05-06 15:00:39 -06:00

arm_mmu.c

Misc changed to get the SAMA5 ELF configuration with address environments working

2014-08-25 13:28:13 -06:00

arm_pgalloc.c

Add configuration to use the fixed DRAM mapping for the page pool (if available) instead of remapping dynamically to access L2 page tables and page data. Also, add logic in address environment creation to initialize the shared data at the beginning of the .bss/.data process memory region.

2014-09-10 08:41:01 -06:00

arm_pghead.S

Need to enable FIQ in initial task state; Improve H32/64 test in IRQ handling

2014-06-21 09:55:09 -06:00

arm_pginitialize.c

More ARMv7-A files that are just copies of the ARMv4/5 files for now

2013-07-19 11:43:04 -06:00

arm_prefetchabort.c

Replace os_internal.h with sched/sched.h in files that actually reference something in sched.h

2014-08-08 17:53:55 -06:00

arm_releasepending.c

Add address environment support to ALL implementatins of up_release_pending()

2014-08-28 08:10:19 -06:00

arm_reprioritizertr.c

Add address environment support to ALL implementatins of up_reprioritize_rtr()

2014-08-28 07:54:07 -06:00

arm_restorefpu.S

ARMv7-N: Fix a copy error introduced in the previous check-in

2013-07-23 19:09:17 -06:00

arm_savefpu.S

ARMv7-N: Fix a copy error introduced in the previous check-in

2013-07-23 19:09:17 -06:00

arm_saveusercontext.S

Add a hello world configuration to help with the SAMA5 bringup

2013-07-26 15:28:01 -06:00

arm_schedulesigaction.c

Mostly cosmetic changes

2014-09-04 10:28:38 -06:00

arm_sigdeliver.c

Replace os_internal.h with sched/sched.h in files that actually reference something in sched.h

2014-08-08 17:53:55 -06:00

arm_syscall.c

pcDuino: Several fixes so that it still builds after other Cortex-A changes.

2014-09-10 06:24:39 -06:00

arm_unblocktask.c

ARM: Move address environment switch from the task switchers to the interrupt handler. That may save doing the actin multiple times per interrupt

2014-08-28 06:34:09 -06:00

arm_undefinedinsn.c

Remove os_internal.h it has been replace by several new header files under sched/. There have been some sneak inclusion paths via os_internal.h, so expect a few compilation errors for some architectures

2014-08-08 18:39:28 -06:00

arm_va2pte.c

Improve Cortex-A5 context switching so that a little less copying is done

2013-07-24 07:47:51 -06:00

arm_vectoraddrexcptn.S

Fix all occurrences of "the the" in documentation and comments

2013-08-27 09:40:19 -06:00

arm_vectors.S

Fix a cloned typo

2014-08-29 10:09:07 -06:00

arm_vectortab.S

SVC is the preferred mnemonic vs. SWI for cortex A

2014-01-05 16:21:41 -06:00

arm_vfork.S

More trailing whilespace removal

2014-04-13 16:22:22 -06:00

arm.h

Add support for .data and .bss in SDRAM

2014-01-28 14:35:03 -06:00

cache.h

ARM: Move L2 cache initialization to much later in the sequence

2014-07-27 10:03:33 -06:00

cp15_cacheops.h

Rename ARMv7-A cache.h to cp15_cache.h. Things will be broken on this commit until I get the new cache.h in place.

2014-07-26 16:54:19 -06:00

cp15_clean_dcache.S

Remove executable mode bits

2013-11-17 08:27:11 -06:00

cp15_coherent_dcache.S

Remove executable mode bits

2013-11-17 08:27:11 -06:00

cp15_flush_dcache.S

Remove executable mode bits

2013-11-17 08:27:11 -06:00

cp15_invalidate_dcache_all.S

Remove executable mode bits

2013-11-17 08:27:11 -06:00

cp15_invalidate_dcache.S

Remove executable mode bits

2013-11-17 08:27:11 -06:00

cp15.h

Trivial updates to comments and README files

2013-12-16 11:13:55 -06:00

crt0.c

The 'make export' target needs to bundle up the user C startup file (crt0), not the kernel head object

2014-09-04 13:31:34 -06:00

fpu.h

SAMA5/Cortex-A: Improve irqsave/restore inlines + add irqenable. Add skeleton file for SAMA5 interrupt management. Also change from last commit that was left in the editor

2013-07-21 17:08:40 -06:00

Kconfig

After cached related fix, the ELF example is now functional

2014-08-24 14:12:45 -06:00

l2cc_pl310.h

arch/arm/src/armv7-a/arm_l2cc_pl310.c, l2cc.h, l2cc_pl310.h, Kconfig: Add initiali support for the ARM L2CC-PL310 L2 cache.

2014-07-26 16:50:08 -06:00

l2cc.h

ARM: Move L2 cache initialization to much later in the sequence

2014-07-27 10:03:33 -06:00

mmu.h

SAMA5D4-EK: In kernel build with address environment, need logic to map user virtual addresses to physical addresses, and vice versa

2014-09-07 19:25:30 -06:00

sctlr.h

More trailing whilespace removal

2014-04-13 16:22:22 -06:00

svcall.h

Rename CONFIG_NUTTX_KERNEL to CONFIG_BUILD_PROTECTED; Partially integrate new CONFIG_BUILD_KERNEL

2014-08-29 14:47:22 -06:00

Toolchain.defs

The optimization level can now be selected as part of the configuration

2014-01-24 07:45:35 -06:00