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hardware
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arch/arm/src/stm32h7: Fix UART7/8 typos. Fix bug in ETH_MACQTXFCR configuration.
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2019-08-06 07:37:55 -06:00 |
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chip.h
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Rename arch/arm/src/stm32h7/chip to arch/arm/src/stm32h7/hardware.
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2019-05-24 16:54:25 -06:00 |
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Kconfig
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Merged in alinjerpelea/nuttx (pull request #963)
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2019-08-05 12:04:14 +00:00 |
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Make.defs
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arch/arm/src/armv7-m: Add ARMv7-M setjmp/longjump functions.
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2019-08-06 15:59:19 -06:00 |
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stm32_adc.c
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arch/arm/src/stm32h7/:
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2019-08-02 07:09:52 -06:00 |
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stm32_adc.h
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Merged in david_s5/nuttx/master_h7 (pull request #900)
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2019-06-13 19:51:12 +00:00 |
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stm32_allocateheap.c
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arch/arm/src/stm32l4: if SRAM3 is used as heap, do not power it off in stop 2 mode.
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2019-06-13 05:52:40 -06:00 |
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stm32_dma.c
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Rename arch/arm/src/stm32h7/chip to arch/arm/src/stm32h7/hardware.
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2019-05-24 16:54:25 -06:00 |
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stm32_dma.h
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Rename arch/arm/src/stm32h7/chip to arch/arm/src/stm32h7/hardware.
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2019-05-24 16:54:25 -06:00 |
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stm32_ethernet.c
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Change naming configs/ to boards in comments, Documentation, etc. Still a few more to go.
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2019-08-05 07:13:48 -06:00 |
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stm32_ethernet.h
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Rename arch/arm/src/stm32h7/chip to arch/arm/src/stm32h7/hardware.
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2019-05-24 16:54:25 -06:00 |
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stm32_exti_gpio.c
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stm32_exti.h
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Rename arch/arm/src/stm32h7/chip to arch/arm/src/stm32h7/hardware.
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2019-05-24 16:54:25 -06:00 |
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stm32_gpio.c
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Rename arch/arm/src/stm32h7/chip to arch/arm/src/stm32h7/hardware.
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2019-05-24 16:54:25 -06:00 |
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stm32_gpio.h
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Rename arch/arm/src/stm32h7/chip to arch/arm/src/stm32h7/hardware.
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2019-05-24 16:54:25 -06:00 |
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stm32_i2c.c
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Rename arch/arm/src/stm32h7/chip to arch/arm/src/stm32h7/hardware.
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2019-05-24 16:54:25 -06:00 |
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stm32_i2c.h
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Rename arch/arm/src/stm32h7/chip to arch/arm/src/stm32h7/hardware.
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2019-05-24 16:54:25 -06:00 |
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stm32_irq.c
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In the current implementation we only use very high priority interrupts (levels 0, 0x10 and 0x20 in CORTEX-M speak) but that means there are loads of lower priority ones that are effectively unused. I have *not* changed the semantics of these levels but have 'shifted' them to be based around the midpoint of the available interrupts (0x80) rather than at the top end....that allows for interrupts to be defined above (or, indeed, below) them as needed by the application. This should have no functional effect on existing code but adds in a clean capability to define higher priority interrupts.
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2018-12-03 17:41:59 -06:00 |
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stm32_lowputc.c
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Fix typos.
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2019-08-04 14:50:28 -06:00 |
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stm32_lowputc.h
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Merged in raiden00/nuttx_h7 (pull request #672)
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2018-07-09 16:32:22 +00:00 |
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stm32_mpuinit.c
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Merged in raiden00/nuttx_h7 (pull request #839)
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2019-03-11 16:43:13 +00:00 |
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stm32_mpuinit.h
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Merged in raiden00/nuttx_h7 (pull request #839)
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2019-03-11 16:43:13 +00:00 |
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stm32_otg.h
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Rename arch/arm/src/stm32h7/chip to arch/arm/src/stm32h7/hardware.
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2019-05-24 16:54:25 -06:00 |
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stm32_otgdev.c
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Rename arch/arm/src/stm32h7/chip to arch/arm/src/stm32h7/hardware.
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2019-05-24 16:54:25 -06:00 |
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stm32_otghost.c
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In stm32_ctrlout() in the HS and FS host drivers, the data buffer isn't sent. This patch passes the buffer and buflen to the stm32_ctrl_senddata() function. With this change, I am able to send MBIM control messages to my USB modem, and read the response.
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2019-06-23 07:05:21 -06:00 |
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stm32_pwm.c
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Merged in raiden00/nuttx_pe (pull request #891)
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2019-06-12 13:22:21 +00:00 |
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stm32_pwm.h
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Merged in raiden00/nuttx_h7 (pull request #880)
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2019-06-03 11:51:00 +00:00 |
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stm32_pwr.h
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Rename arch/arm/src/stm32h7/chip to arch/arm/src/stm32h7/hardware.
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2019-05-24 16:54:25 -06:00 |
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stm32_qencoder.c
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arch/arm/src/stm32h7: Ported the QEncoder from F7 to H7.
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2019-06-27 07:07:55 -06:00 |
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stm32_qencoder.h
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arch/arm/src/stm32h7: Ported the QEncoder from F7 to H7.
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2019-06-27 07:07:55 -06:00 |
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stm32_rcc.c
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Rename arch/arm/src/stm32h7/chip to arch/arm/src/stm32h7/hardware.
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2019-05-24 16:54:25 -06:00 |
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stm32_rcc.h
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Rename arch/arm/src/stm32h7/chip to arch/arm/src/stm32h7/hardware.
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2019-05-24 16:54:25 -06:00 |
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stm32_sdmmc.c
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arch/arm/src/stm32h7: Add stm32h7 sdmmc driver. This is the initial sdmmc driver for stm32h7. It is mostly copied from stm32f7, with modified register addresses and bits, and IDMA added. This is still WIP, it only works with IDMA.
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2019-04-30 07:08:19 -06:00 |
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stm32_sdmmc.h
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Rename arch/arm/src/stm32h7/chip to arch/arm/src/stm32h7/hardware.
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2019-05-24 16:54:25 -06:00 |
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stm32_serial.c
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arch/arm/src/stm32h7/:
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2019-08-02 07:09:52 -06:00 |
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stm32_spi.c
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arch/arm/src/stm32h7/:
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2019-08-02 07:09:52 -06:00 |
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stm32_spi.h
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Rename arch/arm/src/stm32h7/chip to arch/arm/src/stm32h7/hardware.
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2019-05-24 16:54:25 -06:00 |
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stm32_start.c
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arch/arm/src/stm32h7/stm32_start.c: Inclusion of nvic.h should not be conditioned on CONFIG_ARCH_FPU.
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2019-04-25 07:09:19 -06:00 |
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stm32_start.h
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stm32_tim.c
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Merged in david_s5/nuttx/master_h7 (pull request #900)
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2019-06-13 19:51:12 +00:00 |
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stm32_tim.h
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Rename arch/arm/src/stm32h7/chip to arch/arm/src/stm32h7/hardware.
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2019-05-24 16:54:25 -06:00 |
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stm32_timerisr.c
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Rename sched_process_timer to nxsched_process_timer. That is the appropriate name for an internal sched/ function (still many named incorrectly).
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2019-03-20 19:27:40 -06:00 |
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stm32_uart.h
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Rename arch/arm/src/stm32h7/chip to arch/arm/src/stm32h7/hardware.
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2019-05-24 16:54:25 -06:00 |
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stm32_usbhost.h
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Merged in raiden00/nuttx_h7 (pull request #837)
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2019-03-10 13:24:58 +00:00 |
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stm32_userspace.c
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Merged in raiden00/nuttx_h7 (pull request #839)
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2019-03-11 16:43:13 +00:00 |
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stm32_userspace.h
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Merged in raiden00/nuttx_h7 (pull request #839)
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2019-03-11 16:43:13 +00:00 |
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stm32.h
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Merged in raiden00/nuttx_h7 (pull request #742)
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2018-10-28 12:43:08 +00:00 |
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stm32h7x3xx_rcc.c
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Merged in david_s5/nuttx/master_h7 (pull request #900)
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2019-06-13 19:51:12 +00:00 |
