Commit Graph

5397 Commits

Author SHA1 Message Date
Gregory Nutt
cbdafb96d5 Remove unused function setipsr. Cortex-M IPSR register is not writable 2015-09-23 08:38:32 -06:00
Gregory Nutt
a1cbb7d8fb Correct bad cut-and-paste in STM32 F7 stm32_uart.h. Noted by Vlad Chiorean 2015-09-22 09:02:06 -06:00
Gregory Nutt
139a31b875 stm32f74xx75xx_irq.h: STM32_IRQ_SAI2 is not defined but STM32_IRQ_SAI1 is defined twice. Noted by Vlad Chiorean 2015-09-22 07:45:59 -06:00
Gregory Nutt
7a2428819f Minor style: # if pre-processor command should be in columnn 1 2015-09-18 12:47:24 -06:00
Gregory Nutt
39859a9645 All ARMV7-M: Force 8-byte stack alignment when calling from assembly to C to interrupt handling 2015-09-15 07:37:09 -06:00
Gregory Nutt
f7ca98c5ae Fix error in almost all ARMv7-M interrupt stack handling 2015-09-14 07:07:13 -06:00
Gregory Nutt
f5d015d8a2 Clean up some kruft left in the SAMA5D2 PIO driver 2015-09-13 07:25:45 -06:00
Gregory Nutt
a27e673967 SAMA5D2: Finish implementtion of the PIO driver 2015-09-12 11:36:06 -06:00
Gregory Nutt
ac986987de SAMA5D2: Add PIO driver. Still a work in progress 2015-09-12 09:58:18 -06:00
Gregory Nutt
7c62fcbe96 Rename sam_pio.c to sama5d53x4x_pio.c 2015-09-12 09:14:34 -06:00
Gregory Nutt
114f353224 SAMA5D2: Update matrix header file for the SAMA5D2 2015-09-12 09:02:42 -06:00
Gregory Nutt
94bdeda28e SAMA5D2: Add PIO register definition header file 2015-09-12 08:24:48 -06:00
Gregory Nutt
b8c1f0bfeb SAMA5: Rename chip/sam_pio.h to chip/sama5d3s4x_pio.h 2015-09-12 06:49:37 -06:00
Gregory Nutt
1f745e534b SAMA5D2: Make sure that USART mode is selected for each Flexcom used as a serial device 2015-09-11 18:42:49 -06:00
Gregory Nutt
36eba6ef99 Fix some errors in comments 2015-09-11 18:03:40 -06:00
Gregory Nutt
cc0f1d1f04 SAMA5D: Ooops. Committed wrong version of RXLP header file 2015-09-11 18:01:38 -06:00
Gregory Nutt
7c4428b67e SAMA5D2: Add RXLP register definition header file 2015-09-11 16:11:00 -06:00
Gregory Nutt
972ae84d95 SAMA5D2: Add logic to enable Flexcom clocking and to configure Flexcom pins 2015-09-11 14:54:30 -06:00
Gregory Nutt
b19c3d7cbe SAMA5D2: Add Flexcom UART serial driver 2015-09-11 14:30:19 -06:00
Gregory Nutt
9385a98588 SAMA5D: Move common configuration logic from sam_lowputc.c and sam_serial.c to new sam_config.h. Make room in the architecture for forthcoming Flexcom USARTs 2015-09-11 12:00:30 -06:00
Gregory Nutt
a39b2351f0 SAMA5D2: Add Flexcom register definition header files 2015-09-11 10:40:12 -06:00
Gregory Nutt
f51541dfd6 SAMA5Dx UART: SAMAD4 also has BRSRCCK bit in the MR register 2015-09-11 08:27:18 -06:00
Gregory Nutt
9b55b91fea Merged in paulpatience/nuttx-arch (pull request #14)
Fix typo
2015-09-11 08:03:04 -06:00
Paul A. Patience
260778feb1 Fix typo 2015-09-10 21:07:03 -04:00
Gregory Nutt
cf7ea3bc3e Updates for SAMA5D2: It has no USARTS 2015-09-10 17:15:52 -06:00
Gregory Nutt
2cdbc17a63 SAMA5: Fix support for varying number of PIO ports 2015-09-10 13:46:57 -06:00
Gregory Nutt
c1b83cfbc8 SAMA5D2: Add pin multiplexing definition file and other necessary changes for the SAMA5D2 2015-09-10 13:07:04 -06:00
Gregory Nutt
7ad8c32adf Trivial spacing change 2015-09-10 12:11:10 -06:00
Ilya Averyanov
0fea56cd8b LPC43xx: Add ehci driver. 2015-09-10 07:23:03 -06:00
Gregory Nutt
87aa1cb83b SAMA5D2: Update PMC definitions; has UART2-4, but not USART0-4 2015-09-09 12:11:45 -06:00
Gregory Nutt
c391ada5e7 SAMA5D2: Update boot logic, AXIMX, SFR, and WDT register definition files for SAMA5D2 2015-09-09 10:00:29 -06:00
Ilya Averyanov
76ab22debf LPC43xx: Fix IRQ Ethernet name 2015-09-09 07:22:02 -06:00
Gregory Nutt
5f54db8c17 Separate memory mapping tables for SAMA5D2, 3, and 4 2015-09-08 16:40:13 -06:00
Gregory Nutt
6e900bc88a Eliminate warning 2015-09-08 13:26:51 -06:00
Gregory Nutt
36f1d84374 Remove some nonfunctional logic that also generates warnings 2015-09-08 13:02:33 -06:00
Gregory Nutt
0f8a416b20 More fixes for warning removal typos 2015-09-08 12:15:29 -06:00
Gregory Nutt
35866ede44 Eliminate warnings 2015-09-08 12:02:35 -06:00
Gregory Nutt
e7c149e545 Yet another rething of the SAMA5 memory mapping definitions 2015-09-08 11:50:30 -06:00
Gregory Nutt
e6aba39805 SAMA5: Correct some memory map logic 2015-09-08 11:35:11 -06:00
Gregory Nutt
2138e16199 Eliminate warnings 2015-09-08 11:08:44 -06:00
Gregory Nutt
2913aac866 Eliminate warnings 2015-09-08 10:20:41 -06:00
Gregory Nutt
e354853776 Elminiate some warnings 2015-09-08 09:18:59 -06:00
Gregory Nutt
d8c83218fe Eliminate warnings 2015-09-08 08:27:34 -06:00
Gregory Nutt
7065f78b92 Eliminate a warning 2015-09-08 08:18:01 -06:00
Gregory Nutt
cfd41bdb30 STM32: Eliminate some warnings 2015-09-07 16:25:54 -06:00
Ilya Averyanov
560613622d EHCI: We not need disable and enable async scheduler when 2015-09-07 13:44:56 -06:00
Ilya Averyanov
8cc83fa6dc EHCI: Fix qh_ioccheck to move bp to next QH 2015-09-07 13:42:39 -06:00
Ilya Averyanov
6799bba3c1 EHCI: Rename asynch_setup to ioc_async_setup 2015-09-07 13:36:52 -06:00
Gregory Nutt
f3af146d44 SAMV7 QSPI: Back out part of last change; byte access are necessary. Correct write to the IAR register 2015-09-06 11:24:43 -06:00
Gregory Nutt
26eada3446 In all up_initialize() functions, automatically initialize TUN driver is so configureded 2015-09-06 09:35:29 -06:00