Gregory Nutt
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cbdafb96d5
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Remove unused function setipsr. Cortex-M IPSR register is not writable
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2015-09-23 08:38:32 -06:00 |
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Gregory Nutt
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a1cbb7d8fb
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Correct bad cut-and-paste in STM32 F7 stm32_uart.h. Noted by Vlad Chiorean
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2015-09-22 09:02:06 -06:00 |
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Gregory Nutt
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139a31b875
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stm32f74xx75xx_irq.h: STM32_IRQ_SAI2 is not defined but STM32_IRQ_SAI1 is defined twice. Noted by Vlad Chiorean
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2015-09-22 07:45:59 -06:00 |
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Gregory Nutt
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7a2428819f
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Minor style: # if pre-processor command should be in columnn 1
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2015-09-18 12:47:24 -06:00 |
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Gregory Nutt
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39859a9645
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All ARMV7-M: Force 8-byte stack alignment when calling from assembly to C to interrupt handling
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2015-09-15 07:37:09 -06:00 |
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Gregory Nutt
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f7ca98c5ae
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Fix error in almost all ARMv7-M interrupt stack handling
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2015-09-14 07:07:13 -06:00 |
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Gregory Nutt
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f5d015d8a2
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Clean up some kruft left in the SAMA5D2 PIO driver
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2015-09-13 07:25:45 -06:00 |
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Gregory Nutt
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a27e673967
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SAMA5D2: Finish implementtion of the PIO driver
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2015-09-12 11:36:06 -06:00 |
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Gregory Nutt
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ac986987de
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SAMA5D2: Add PIO driver. Still a work in progress
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2015-09-12 09:58:18 -06:00 |
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Gregory Nutt
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7c62fcbe96
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Rename sam_pio.c to sama5d53x4x_pio.c
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2015-09-12 09:14:34 -06:00 |
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Gregory Nutt
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114f353224
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SAMA5D2: Update matrix header file for the SAMA5D2
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2015-09-12 09:02:42 -06:00 |
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Gregory Nutt
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94bdeda28e
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SAMA5D2: Add PIO register definition header file
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2015-09-12 08:24:48 -06:00 |
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Gregory Nutt
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b8c1f0bfeb
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SAMA5: Rename chip/sam_pio.h to chip/sama5d3s4x_pio.h
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2015-09-12 06:49:37 -06:00 |
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Gregory Nutt
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1f745e534b
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SAMA5D2: Make sure that USART mode is selected for each Flexcom used as a serial device
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2015-09-11 18:42:49 -06:00 |
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Gregory Nutt
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36eba6ef99
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Fix some errors in comments
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2015-09-11 18:03:40 -06:00 |
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Gregory Nutt
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cc0f1d1f04
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SAMA5D: Ooops. Committed wrong version of RXLP header file
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2015-09-11 18:01:38 -06:00 |
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Gregory Nutt
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7c4428b67e
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SAMA5D2: Add RXLP register definition header file
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2015-09-11 16:11:00 -06:00 |
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Gregory Nutt
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972ae84d95
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SAMA5D2: Add logic to enable Flexcom clocking and to configure Flexcom pins
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2015-09-11 14:54:30 -06:00 |
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Gregory Nutt
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b19c3d7cbe
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SAMA5D2: Add Flexcom UART serial driver
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2015-09-11 14:30:19 -06:00 |
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Gregory Nutt
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9385a98588
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SAMA5D: Move common configuration logic from sam_lowputc.c and sam_serial.c to new sam_config.h. Make room in the architecture for forthcoming Flexcom USARTs
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2015-09-11 12:00:30 -06:00 |
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Gregory Nutt
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a39b2351f0
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SAMA5D2: Add Flexcom register definition header files
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2015-09-11 10:40:12 -06:00 |
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Gregory Nutt
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f51541dfd6
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SAMA5Dx UART: SAMAD4 also has BRSRCCK bit in the MR register
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2015-09-11 08:27:18 -06:00 |
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Gregory Nutt
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9b55b91fea
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Merged in paulpatience/nuttx-arch (pull request #14)
Fix typo
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2015-09-11 08:03:04 -06:00 |
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Paul A. Patience
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260778feb1
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Fix typo
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2015-09-10 21:07:03 -04:00 |
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Gregory Nutt
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cf7ea3bc3e
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Updates for SAMA5D2: It has no USARTS
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2015-09-10 17:15:52 -06:00 |
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Gregory Nutt
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2cdbc17a63
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SAMA5: Fix support for varying number of PIO ports
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2015-09-10 13:46:57 -06:00 |
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Gregory Nutt
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c1b83cfbc8
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SAMA5D2: Add pin multiplexing definition file and other necessary changes for the SAMA5D2
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2015-09-10 13:07:04 -06:00 |
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Gregory Nutt
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7ad8c32adf
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Trivial spacing change
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2015-09-10 12:11:10 -06:00 |
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Ilya Averyanov
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0fea56cd8b
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LPC43xx: Add ehci driver.
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2015-09-10 07:23:03 -06:00 |
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Gregory Nutt
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87aa1cb83b
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SAMA5D2: Update PMC definitions; has UART2-4, but not USART0-4
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2015-09-09 12:11:45 -06:00 |
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Gregory Nutt
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c391ada5e7
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SAMA5D2: Update boot logic, AXIMX, SFR, and WDT register definition files for SAMA5D2
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2015-09-09 10:00:29 -06:00 |
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Ilya Averyanov
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76ab22debf
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LPC43xx: Fix IRQ Ethernet name
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2015-09-09 07:22:02 -06:00 |
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Gregory Nutt
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5f54db8c17
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Separate memory mapping tables for SAMA5D2, 3, and 4
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2015-09-08 16:40:13 -06:00 |
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Gregory Nutt
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6e900bc88a
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Eliminate warning
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2015-09-08 13:26:51 -06:00 |
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Gregory Nutt
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36f1d84374
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Remove some nonfunctional logic that also generates warnings
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2015-09-08 13:02:33 -06:00 |
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Gregory Nutt
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0f8a416b20
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More fixes for warning removal typos
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2015-09-08 12:15:29 -06:00 |
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Gregory Nutt
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35866ede44
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Eliminate warnings
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2015-09-08 12:02:35 -06:00 |
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Gregory Nutt
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e7c149e545
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Yet another rething of the SAMA5 memory mapping definitions
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2015-09-08 11:50:30 -06:00 |
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Gregory Nutt
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e6aba39805
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SAMA5: Correct some memory map logic
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2015-09-08 11:35:11 -06:00 |
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Gregory Nutt
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2138e16199
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Eliminate warnings
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2015-09-08 11:08:44 -06:00 |
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Gregory Nutt
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2913aac866
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Eliminate warnings
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2015-09-08 10:20:41 -06:00 |
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Gregory Nutt
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e354853776
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Elminiate some warnings
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2015-09-08 09:18:59 -06:00 |
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Gregory Nutt
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d8c83218fe
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Eliminate warnings
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2015-09-08 08:27:34 -06:00 |
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Gregory Nutt
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7065f78b92
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Eliminate a warning
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2015-09-08 08:18:01 -06:00 |
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Gregory Nutt
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cfd41bdb30
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STM32: Eliminate some warnings
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2015-09-07 16:25:54 -06:00 |
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Ilya Averyanov
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560613622d
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EHCI: We not need disable and enable async scheduler when
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2015-09-07 13:44:56 -06:00 |
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Ilya Averyanov
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8cc83fa6dc
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EHCI: Fix qh_ioccheck to move bp to next QH
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2015-09-07 13:42:39 -06:00 |
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Ilya Averyanov
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6799bba3c1
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EHCI: Rename asynch_setup to ioc_async_setup
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2015-09-07 13:36:52 -06:00 |
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Gregory Nutt
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f3af146d44
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SAMV7 QSPI: Back out part of last change; byte access are necessary. Correct write to the IAR register
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2015-09-06 11:24:43 -06:00 |
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Gregory Nutt
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26eada3446
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In all up_initialize() functions, automatically initialize TUN driver is so configureded
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2015-09-06 09:35:29 -06:00 |
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