script.
These functions are strongly declared and thus will be used instead of
any other implementation. Furthermore, necessary Kconfig options are
selected to avoid building those function from NuttX's C library.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
Currently configuring the uart3/4 as the serial console
doesn't work. Apply proper changes in mpfs_config.h that
enables the following configuration options:
- CONFIG_UART3_SERIAL_CONSOLE
- CONFIG_UART4_SERIAL_CONSOLE
Also, fix a typo in mpfs_lowputc.c that gives a compile
error if defined.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
When enable DEBUG_TCBINFO config, a global struct will
provide, then debuggers can aware nuttx task infomation.
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
This commit adds microcontroller support for Analog Front End driver to
samv7 MCUs. Only software trigger via IOCTL is currently supported,
averaging can be set by configuration option CONFIG_SAMV7_AFECn_RES.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
cppcheck reports the following:
arch/risc-v/src/mpfs/mpfs_emmcsd.c:2375:22: error: Uninitialized variable: waitbits [uninitvar]
while (!(status & (waitbits | MPFS_EMMCSD_SRS12_EINT))
The finding is positive and this patch initializes it to
zero properly.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
Strongly-Ordered requires aligned access unless
caching is enabled.
Normal memory
Accesses to normal memory region are idempotent...
- unaligned accesses can be supported
With CONFIG_ARMV7M_DCACHE the cache maintenance operation
are not present. Or if CONFIG_ARMV7M_DCACHE_WRITETHROUGH
is on then buffering operations are no-ops.
This change enables MPU_RASR_C and MPU_RASR_B if
CONFIG_ARMV7M_DCACHE is only set.
if CONFIG_ARMV7M_DCACHE_WRITETHROUGH is set then only
MPU_RASR_C is enabled.
N.B When caching is disalbed unaligned access may cause hard faults
so add -mno-unaligned-access
It is always safe to enable Buffering in FLASH to achive unaligned
access leniency, as it is not written to.
1. Wi-Fi and BLE use common PHY functions.
2. Fix Wi-Fi & BLE coexist adapter error.
3. Update esp-wireless-drivers-3rdparty, provide coexist protection for connection.
1. Fix the issue that Wi-Fi can't connect to some special routers occasionally.
2. Support Wi-Fi 12/13 channel active scanning by default.
3. Update Wi-Fi driver code to fix issue of failure to send pkt.
4. Replace software random with hardware random
5. Fix Wi-Fi mode start error
E51 may configure the L1 and L2 caches. Once configured,
no reconfiguration is possible after hardware reset is
issued.
L2 is 16-way set associative with write-back policy. The
size 2 MB, from which 1 MB is utilized with the values
provided here. That's a total of 8 ways. The rest of the
L2 is left out for the bootloader usage.
mpfs_enable_cache() first checks the bootloader usage
doesn't overlap with the cache itself, thus providing a
set of functional values.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
the SDIO clock is not enabled when the bus goes to the idle state, that, in turn, breaks
IRQ delivering mechanism over DAT[1]/IRQ SDIO line to the host.
This reverts commit d9a5b92c1a306a70df52d50a02a80dc8ef20bf0d.
Revert "arch/arm: Remove -march and -mtune"
This reverts commit b8e99cf12f3a287311a2d341f285c71a5da3e4d4.
Bluetooth is not enabled. When Bluetooth is enbaled then it defaults to
64KB. This will not wast those 64KB of memory when Bluetooth is not enabled.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
This commit adds new files that support functionality of QSPI driver in
SPI Master Mode. This functionality is included in new files sam_qspi_spi.x
to avoid too much mess in the source code. QSPI in SPI mode can be turn
on by config option SAMV7_QSPI_SPI_MODE.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
When NuttX is booted from a foreign (non NuttX)
bootloader. There as a possibility that the
bootloader configured the MPU, in an
incompatible way for the NuttX memory usage.
The option to reset the MPU before it is initialized
may not succeed if the bss and data initialization
code violated the previous MPU configurations.
Added herein are ARM_MPU_RESET and
ARM_MPU_EARLY_RESET. The former can be used
If the system is capable of booting and running
NuttX MPU configuration code without an MPU
violation. The latter is used if the system can
not run the bss and data initialization code.
These are options so that a NuttX may be configured to
not clobber a bootloader MPU configuration in a system
that is architected to share the MPU configuration task.
So far the SD-card functionality has been tested with
the driver. Now, also the internal eMMC has been tested
working with this patch. This patch applies IOMUX and
clock settings that have been tested working with the
internal eMMC in the Polarfire Icicle kit.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
This adds the proper flag for introducing the DDR
support. Also call the mpfs_ddr_init() at the
proper location.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
This adds DDR training. The training has a small chance of failing,
and then the training is restarted.
DDR training cannot be done meaningfully while the software is
in DDR. If the system is intended to run from eNVM, like a
bootloader, the linker script should be tuned to utilize the envm
region as follows:
envm (rx) : ORIGIN = 0x20220100, LENGTH = 128K - 256
l2lim (rwx) : ORIGIN = 0x08000000, LENGTH = 1024k
256 bytes are reserved for the system; The fixed block may be
installed from the 'hart-software-services' -repository:
https://github.com/polarfire-soc/hart-software-services.git
For example, the 256-byte image: hss-envm-wrapper-bm1-dummySbic.bin
may be prepended on the nuttx bootloader image in the following
manner:
cat hss-envm-wrapper-bm1-dummySbic.bin > nuttx_bootloader.bin
cat nuttx.bin >> nuttx_bootloader.bin
riscv64-unknown-elf-objcopy -I binary -O ihex --change-section-lma
*+0x20220000 nuttx_bootloader.bin flashable_image.hex
This provides an image 'flashable_image.hex' that may be flashed on
the eNVM region via Microsemi Libero tool.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
- Fix the FPU enabling code
- If booting from eNVM, all harts start booting. With CONFIG_MPFS_BOOTLOADER,
one can allow just one hart booting and rest are stuck in wfi.
- Check that mtvec is actually updated before continuing the boot
- Create 5 IRQ stacks, one for each hart
Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
- Jump to mpfs_start with mhartid in a0 as the comment says
- Don't invalidate mmu tlb on e51 (it doesn't have mmu)
- Fix FPU initialization flags on e54 (it fires IRQ5 and crashes)
Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
This commit adds header file imxrt_adc_etc.h for external ADC trigger
module. This contains only definitions of ADC_ETC registers and separate
bits, implementation of ADC_ETC driver is yet to be done.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
If we repeatedly call up_cpu_pause and up_cpu_resume, there would be
cases where the next call to up_cpu_pause happens while the other CPU is
still responding to the previous resume request. In this case the
DEBUGASSERT will trigger. We should allow the first CPU to wait until the
other CPU has finished responding to the resume request.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
spinlock.
If we repeatedly call up_cpu_pause and up_cpu_resume, there would be
cases where the next call to up_cpu_pause happens while the other CPU is
still responding to the previous resume request. In this case the
DEBUGASSERT will trigger. We should allow the first CPU to wait until the
other CPU has finished responding to the resume request.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
SCOMPARE1 is used by some atomic instructions and need to be preserved
during a context switch.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
Gregory Nutt is the copyright holder for those files and he has submitted the
SGA as a result we can migrate the licenses to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
Gregory Nutt has submitted the SGA
Omni Hoverboards has submitted the SGA
David Sidrane has submitted the ICLA
Mateusz Szafoni has submitted the ICLA
Sebastien Lorquet has submitted the ICLA
Paul Alexander Patience has submitted the ICLA
as a result we can migrate the licenses to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
pid variable was initialized to -EINVAL to prevent rt_timer_deinit
from delete an invalid kthread. But priv->pid was being overwritten in the
rt_timer_init, so in case of failure to create a kthread, it would
call rt_timer_deinit with a non expected initialization value.
file. This function is already defined in esp_himem and is used only
when that file is built. We don't need another weak function.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
The stm32_gpiosetevent calls stm32_configgpio. So
the pin is infact restored to the SDMMC/SDIO D0.
The seconday init, dropped interrupts in a debug
build with HW stack checking on after the GPIO glich
fixes and that was how it was detected.
This prevents gliches on changing to an output mode.
If not the ALT mux can be selecting a IP block that
is drving the line to say 0. Then the output is connected
to that source, then swithced to the correct source.
This prevents gliches on changing to an output mode.
If not the ALT mux can be selecting a IP block that
is drving the line to say 0. Then the output is connected
to that source, then swithced to the correct source.
This prevents gliches on changing to an output mode.
If not the ALT mux can be selecting a IP block that
is drving the line to say 0. Then the output is connected
to that source, then swithced to the correct source. This
produced a 430 nS glich on a F4 @168 Mhz. It was a enough
to corrupt an I2C device with a bus monitor.
This adds the emmcsd driver for the Polarfire Icicle kit.
The driver has been tested with several SD-cards, such as:
- Kingston 32 GB SDS2 Canvas Select Plus
- Kingston MicroSD Canvas Select Plus
- Sandisk Extreme PRO 32 GB
- Transcend 8 GB MicroSD
The internal eMMC hasn't been tested comprehensively.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
Summary:
- This commit replaces the critical section with spinlock in cxd56_serial.c
Impact:
- None
Testing:
- Tested with spresense:rndis_smp, spresense:rndis
and spresense:rndis_wifi
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Gregory Nutt has submitted the SGA
Bill Gatliff has submitted the ICLA
as a result we can migrate the licenses to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
The registers may be in window during interrupt.
Flush window stack to stack first.
And fix warning in build.
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
