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48c9aa08a3
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1307 Commits

Author SHA1 Message Date
Gregory Nutt
48c9aa08a3 Merged in marten_svanfeldt/nuttx-public/for_upstream/stm32_dma_fix (pull request #43) 
Fix STM32 DMA code and configuration for STM32F37X chips
 2016-06-09 09:10:13 -06:00
David Sidrane
44ead7f40a Fix email address in file headers 2016-06-09 08:26:14 -06:00
Marten Svanfeldt
1b36526e91 Fix STM32 DMA code and configuration for STM32F37X chips 
Signed-off-by: Marten Svanfeldt <marten@intuitiveaerial.com>
 2016-06-09 05:02:43 +02:00
Konstantin Berezenko
3fc7b6f0e5 Add stm32f105r support 2016-06-06 12:52:41 -07:00
Gregory Nutt
053ac343fd STM32 PWM: More review changes from last commit; improve handling of unsigned types 2016-06-05 16:01:29 -06:00
Pierre-noel Bouteville
0bd444ae47 Just update duty if frequency is not changed and PSM started. This removeis glitch or blinking when only duty is frequently changed. 2016-06-05 15:35:43 -06:00
Gregory Nutt
6b84637a5b Update some comments 2016-06-04 13:04:13 -06:00
Gregory Nutt
4965d0dc99 KL and LPC11: Perform similar name change as for STM32: xyz_lowputc -> up_putc 2016-06-04 11:29:27 -06:00
Alan Carvalho de Assis
86cfcfd58a Add the up_getc() function to STM32 in order to support the minnsh configuration. 2016-06-04 07:22:45 -06:00
Gregory Nutt
37e8536a88 STM32: Put timer selections in a separate menu 2016-06-04 07:11:05 -06:00
Gregory Nutt
34df98d97e Use DEBUG assertions to save space 2016-06-03 14:49:05 -06:00
Gregory Nutt
704fadb0e6 STM32 TIM: Assure that a compilation error will occur if the old timer input clock frequency definitions are used 2016-06-03 14:17:18 -06:00
Gregory Nutt
3ec2386be8 STM32 TIM: There is a TIM17 on some parts too 2016-06-03 14:08:28 -06:00
Gregory Nutt
282edefab3 STM32 TIM: Add hooks for all previously unsupported timers. Also fix some PWM warnings. 2016-06-03 13:51:43 -06:00
Gregory Nutt
c11e923ad4 Fix a cut'n'paste error left from last commit. 2016-06-03 12:11:55 -06:00
Gregory Nutt
910bac65fa STM32 Timer: Generalize and extend calculation of per-timer pre-scaler value. Inspired by original proposal from Pierre-noel Bouteville. 2016-06-03 11:38:59 -06:00
Gregory Nutt
88a41862b5 Revert "STM32 Timer Driver: Change calculation of per-timer pre-scaler value" 
This reverts commit 082d32226b.
 2016-06-03 09:41:17 -06:00
Pierre-noel Bouteville
082d32226b STM32 Timer Driver: Change calculation of per-timer pre-scaler value 2016-06-03 08:45:22 -06:00
Pierre-noel Bouteville
426e425a55 Correct conditional compilation in STM32 timer cpature logic 2016-06-03 08:41:53 -06:00
Pierre-noel Bouteville
6a2a0bf11f Note reserved bits in STM32 ADC 2016-06-03 08:39:17 -06:00
Gregory Nutt
fcdc17056b STM32 F4 RTC: I believe that the F405/407 has only a single alarm. Not sure. 2016-06-02 15:04:23 -06:00
Gregory Nutt
82c73e206e STM32 F4 RTC, trivial changes 2016-06-02 07:58:13 -06:00
Gregory Nutt
2f974ffeaf Merged in david_s5/nuttx/upstream_to_greg (pull request #37) 
Fix the Value Line adc IRQ number selection
 2016-05-31 19:18:11 -06:00
Gregory Nutt
82dec4acab STM32F4 RTC: Remove 24 hour limit; Fix calculation of the alarm register (was not including day of the month). Fix a bad shift value 2016-05-31 19:13:21 -06:00
David Sidrane
70f2b47a0d Fix the Value Line adc IRQ number selection 2016-05-31 14:54:04 -10:00
Gregory Nutt
6eac8bf28d Update some comments 2016-05-31 17:31:15 -06:00
Gregory Nutt
15810946b1 Update some comments 2016-05-31 17:28:02 -06:00
Gregory Nutt
8ca5daf2b3 Changes from review of last PR 2016-05-31 15:52:56 -06:00
neilh10
639410849e alarm 10 now runs to completion 2016-05-31 14:17:52 -07:00
Pierre-noel Bouteville
39c1e3aba2 Allow to not use all channet in a lower part of PWM 2016-05-30 11:58:22 -06:00
Gregory Nutt
f65616f872 Replace confusing references to uIP with just 'the network' 2016-05-30 09:16:32 -06:00
Konstantin Berezenko
5c6cd17d46 Add support for SPI 4 and 5 on stm32f411 chips 2016-05-27 11:08:18 -07:00
Gregory Nutt
3d3b7b5422 EFM32, STM32, TIVA: Allow lower half driver to build if any ADC is selected. Should not depend on CONFIG_ADC. 2016-05-27 06:46:33 -06:00
Gregory Nutt
31ac3f5123 STM32 ADC: Missed on adc_receive 2016-05-26 12:42:34 -06:00
Gregory Nutt
8f2a660c8b Add ADC bind method to the STM32 ADC drivers 2016-05-26 12:25:54 -06:00
Gregory Nutt
783bab6c82 Costmetic changes from review of last PR 2016-05-25 18:04:39 -06:00
Gregory Nutt
3603dc6218 1-wire: Initialization/uninitialization functions are not use MCU-independent up_ naming. Should use STM32-specific stm32_ naming. These are not globally accessible but only accessible from STM32 board logic. 2016-05-25 17:56:47 -06:00
Paul A. Patience
d31aefe4ef STM32 CAN: Add support for both RX FIFOs 2016-05-25 16:11:18 -04:00
Gregory Nutt
add152bf24 Update README 2016-05-25 14:07:59 -06:00
Gregory Nutt
4a63a7760a STM32: Hook 1-Wire driver into the build system 2016-05-25 12:31:32 -06:00
Gregory Nutt
2a87741e72 Rename CONFIG_ARCH_HAVE_UARTn to CONFIG_UARTn_SERIALDRIVER 2016-05-25 10:45:01 -06:00
Gregory Nutt
249a2e48e5 Rename CONFIG_ARCH_HAVE_USARTn to CONFIG_USARTn_SERIALDRIVER 2016-05-25 10:39:23 -06:00
Aleksandr Vyhovanec
52c6cb1799 Fix typographical naming error in STM32 U[S]ART bit defintiions. 2016-05-25 09:04:03 -06:00
Aleksandr Vyhovanec
9a2002a302 1-wire driver based on U[S]ART in single-wire, half-duplex mode. 2016-05-25 08:59:47 -06:00
Konstantin Berezenko
a2253cdd3e Add basic configuration for stm32f411e-disco board with STM32F411VE chip 2016-05-20 16:38:25 -07:00
Gregory Nutt
72de45b7cf Merged in david_s5/nuttx/upstream_to_greg (pull request #21) 
Fixed Break changes needed CONFIG_SERIAL_TERMIOS to build
 2016-05-17 18:09:23 -06:00
David Sidrane
f444f061d6 Fixed Break changes needed CONFIG_SERIAL_TERMIOS to build 2016-05-17 14:04:51 -10:00
Gregory Nutt
5fc619eb1b Changes from review of last PR 2016-05-17 17:39:27 -06:00
David Sidrane
b11f49e7f1 Support BSD compatible breaks on stm32 U[S]ART 2016-05-17 13:09:34 -10:00
David Sidrane
55d8b0e277 Use the correct register and bit to send an STM32 non-bsd compatible break 2016-05-17 07:55:33 -10:00