Gregory Nutt
|
40b7ddf68e
|
SAMA5: FIQs should be disabled along with IRQs on most exeptions in most configuratinons. arm_decodefiq and arm_decodeirq are mutually exclusive and, hence, can use the same interrupt stack
|
2014-06-20 18:49:01 -06:00 |
|
Gregory Nutt
|
c68d2532be
|
SAMA5D4: Add support for secure/FIQ interrupts; SAIC supports need to be be enabled unconditionally
|
2014-06-20 18:16:41 -06:00 |
|
Gregory Nutt
|
8f4f73884b
|
SAMA5D4: Fix MATRIX32 base address
|
2014-06-20 18:15:13 -06:00 |
|
Gregory Nutt
|
8fb8774c26
|
SAMA5D4: Minor fixes to get working with SAMA5D3 again
|
2014-06-20 16:01:45 -06:00 |
|
Gregory Nutt
|
0a2133b57f
|
SAMA5D4: Add partial support for secure interrupt controller (SAIC)
|
2014-06-20 15:22:00 -06:00 |
|
Gregory Nutt
|
aecddf9b52
|
SAMA5D4: USART peripheral clock appears to be MCK/2
|
2014-06-20 11:40:36 -06:00 |
|
Gregory Nutt
|
b31f34cf94
|
SAMA5D4-EK: Make sure that the H32MX divider is set; correct sense of bit driver red LED
|
2014-06-20 10:33:33 -06:00 |
|
Gregory Nutt
|
9869c9b50d
|
SAMA5D4: Fix peripheral clocking macros: AIC and L2CC are continuously clocked
|
2014-06-19 15:52:42 -06:00 |
|
Gregory Nutt
|
c14d80ee25
|
SAMA5D4: Initial bring-up fixes
|
2014-06-19 14:16:36 -06:00 |
|
Gregory Nutt
|
ce390e12a8
|
Costmetic update to comments/README file
|
2014-06-18 17:40:06 -06:00 |
|
Gregory Nutt
|
902c1342b9
|
Cosmetic cleanup
|
2014-06-18 08:24:53 -06:00 |
|
Gregory Nutt
|
e2ede42d14
|
SAMA5D4: XDMAC driver now compiles error/warning free (still untested)
|
2014-06-17 16:31:09 -06:00 |
|
Gregory Nutt
|
4b3342fd96
|
SAMA5D4: More progress on XDMAC driver (still no complete); Also fixes some critical errors in the SAMA5D3 DMA definitions
|
2014-06-17 13:18:52 -06:00 |
|
Gregory Nutt
|
5d73322dc7
|
SAMA5D4: Correct MATRIX register addresses
|
2014-06-14 10:42:53 -06:00 |
|
Gregory Nutt
|
1a236c13de
|
SAMA5D4: Implement SDRAM initialization
|
2014-06-14 10:42:26 -06:00 |
|
Gregory Nutt
|
9e7eb2d12d
|
SAMA5D4: Fix some memory remapping issues; updates to comments and README files
|
2014-06-14 08:02:58 -06:00 |
|
Gregory Nutt
|
cf72b05936
|
SAMA5: XDMAC update (still not complete)
|
2014-06-13 11:59:44 -06:00 |
|
Gregory Nutt
|
ab79090ce0
|
SAMA5D4: Initial XDMAC driver logic; initial check-in is little more the the DMAC driver with some name changes
|
2014-06-12 16:33:04 -06:00 |
|
Gregory Nutt
|
a2cb59cab8
|
First check-in of Lazlo's PF_PACKET 'raw' socket implementation
|
2014-06-12 11:52:06 -06:00 |
|
Gregory Nutt
|
a23245781a
|
STM32: Handle setting of USART CR1_M when 8 bits of data plus parity
|
2014-06-11 15:49:54 -06:00 |
|
Gregory Nutt
|
5009def270
|
Typo in last SAMA5D4 commit
|
2014-06-11 13:43:54 -06:00 |
|
Gregory Nutt
|
bb8fd2fa2c
|
SAMA5: Add support for Micrel KSZ8081 PHY
|
2014-06-11 13:25:59 -06:00 |
|
Gregory Nutt
|
22a36b7af3
|
SAMA5D4: Add EMAC driver
|
2014-06-11 12:23:31 -06:00 |
|
Gregory Nutt
|
288c891ad1
|
SAMA5D4: Still trying to reconcile Ethernet interfaces
|
2014-06-11 08:01:48 -06:00 |
|
Gregory Nutt
|
379f516780
|
SAMA5D3/4: More renaming. Change SAMA5D3 EMAC to EMACA and SAMA5D4 to EMACB so that the configuration and build system can configure them. I might come up with something better later
|
2014-06-10 17:40:25 -06:00 |
|
Gregory Nutt
|
348e666278
|
STM32: Expicitly include header file files. From Freddie Chopin
|
2014-06-10 15:49:48 -06:00 |
|
Gregory Nutt
|
e9aec9fdff
|
SAMA5D4: update MATRIX register definitions for the SAMA5D4
|
2014-06-10 13:15:29 -06:00 |
|
Gregory Nutt
|
f14775b755
|
SAMA5D4: Complete MPDDR header file
|
2014-06-10 11:16:05 -06:00 |
|
Gregory Nutt
|
021122f921
|
SAMA5D4: Add MPDDRC file (incomplete)
|
2014-06-10 08:46:14 -06:00 |
|
Gregory Nutt
|
d54b7b733c
|
Move SAMA5D3 MPDDRC definitions to a separate header file
|
2014-06-10 08:11:31 -06:00 |
|
Gregory Nutt
|
fc343d833a
|
SAMA5D4: Update LCDC header file
|
2014-06-09 13:27:08 -06:00 |
|
Gregory Nutt
|
3a10623e29
|
Add logic to select between incompatible SAMA5D3 and SAMA5D4 EMAC header files
|
2014-06-09 12:24:39 -06:00 |
|
Gregory Nutt
|
48a8ead37b
|
SAMA5: Back out most of commit c37b5b7b97d0644743c04f2c3d9e2b7ef9f5d698. Things are going to have to be done differently
|
2014-06-09 12:16:16 -06:00 |
|
Gregory Nutt
|
a72cf5ee76
|
SAMA5D4: Updated EMAC header file
|
2014-06-09 11:40:11 -06:00 |
|
Gregory Nutt
|
6fb582d1af
|
SAMA5D4: Add EMAC header file
|
2014-06-09 11:29:02 -06:00 |
|
Gregory Nutt
|
fa3e843ddc
|
SAMA5D4: More header file changes
|
2014-06-09 10:07:00 -06:00 |
|
Gregory Nutt
|
78c9fcdfb9
|
SAMA5D4: update ISI register definition header file
|
2014-06-09 09:29:23 -06:00 |
|
Gregory Nutt
|
979b732f3b
|
SAMA5D4: Completes PMC modifications for the SAMA5D4
|
2014-06-09 07:55:51 -06:00 |
|
Gregory Nutt
|
b2de85be4e
|
SAMA5D4: Completes L2CC register definition header file
|
2014-06-08 19:08:11 -06:00 |
|
Gregory Nutt
|
07df0b41f1
|
SAMA5D4: Update HSMC register definitions
|
2014-06-08 16:27:58 -06:00 |
|
Gregory Nutt
|
175193788d
|
SAMA5D4: Update PIO register definitions
|
2014-06-08 15:35:51 -06:00 |
|
Gregory Nutt
|
140bbdb51f
|
SAMA5D4: Update DBGU header file
|
2014-06-08 14:37:09 -06:00 |
|
Gregory Nutt
|
b43fa3910a
|
SAMA5D4: Update PWM header file
|
2014-06-08 14:16:50 -06:00 |
|
Gregory Nutt
|
39cb768969
|
SAMA5D4: Updated HSMCI header file
|
2014-06-08 12:49:45 -06:00 |
|
Gregory Nutt
|
04430796c4
|
SAMA5D4: Update ADC register definition header file
|
2014-06-08 12:19:05 -06:00 |
|
Gregory Nutt
|
256cd0b34c
|
SAMA5D4: Updated RTC header file
|
2014-06-08 10:14:36 -06:00 |
|
Gregory Nutt
|
f65a238389
|
SAMA5D4: Update register definitions; add support for TC2
|
2014-06-08 09:19:50 -06:00 |
|
Gregory Nutt
|
23557d31bb
|
SAMA5: Add TWI3 support
|
2014-06-08 08:25:39 -06:00 |
|
Gregory Nutt
|
8e1d1db8d1
|
Updated SAMA5 SFR header file for the SAMA5D4
|
2014-06-08 07:48:36 -06:00 |
|
Gregory Nutt
|
3e3d3dff9b
|
SAMA5D4: Add support for UART4
|
2014-06-08 07:47:56 -06:00 |
|