Gregory Nutt
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6f7c03bd71
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ESP32: Add initial serial driver. Taken from SAMV7; not fully converted. Does not yet compile.
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2016-10-27 13:55:58 -06:00 |
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Gregory Nutt
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bc51fdb96c
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ESP32: Add GPIO signal mapping file
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2016-10-27 11:04:24 -06:00 |
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Gregory Nutt
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cf73c9e1d1
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EPS32: Add GPIO ROM interface definitions
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2016-10-27 10:43:58 -06:00 |
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Gregory Nutt
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0967864c92
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Correct clock initialization. The correct range for the month is 0-11 but is entered as 1-12 in the .config file
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2016-10-27 08:32:23 -06:00 |
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Vytautas Lukenskas
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d9c2789253
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LPC32xx serial: Fix a typo in ioctl TIOCSRS485 ioctl.
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2016-10-27 07:00:32 -06:00 |
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Gregory Nutt
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76788040d5
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ESP32: Add esp32_config.h
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2016-10-26 15:45:03 -06:00 |
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David Sidrane
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314dd62dd5
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stm32f76xx77xx_pinmap.h Missed one
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2016-10-26 21:10:59 +00:00 |
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David Sidrane
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0bab23fb1b
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stm32_i2c.c Dejavu
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2016-10-26 21:00:50 +00:00 |
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Gregory Nutt
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ca7ca0eb57
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ESP32: More compilation issues
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2016-10-26 12:59:31 -06:00 |
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Gregory Nutt
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0a96f3a8c8
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ESP32: Fix some compilation issues
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2016-10-26 12:50:10 -06:00 |
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Gregory Nutt
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650757bbf0
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ESP32: Add GPIO support
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2016-10-26 12:11:24 -06:00 |
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Gregory Nutt
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946045075e
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ESP32: Remove some long lines in header file
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2016-10-26 08:23:09 -06:00 |
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Gregory Nutt
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6acc831e77
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Remove duplicate select from Kconfig
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2016-10-26 07:00:24 -06:00 |
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Gregory Nutt
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2c09279343
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ESP32: Add beginning of GPIO register definition file
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2016-10-26 06:27:02 -06:00 |
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Sebastien Lorquet
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f24701f5c7
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Merge branch 'master' into stm32l4_pinouts
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2016-10-26 13:31:54 +02:00 |
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Sebastien Lorquet
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68dae715b0
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CHxN channels are always outputs
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2016-10-26 13:21:57 +02:00 |
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Gregory Nutt
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b8462d3e04
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ESP32: Need to take priority into account when allocating CPU interrupts
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2016-10-25 16:27:58 -06:00 |
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Gregory Nutt
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fef7b414c5
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Add logic to attach peripheral interrupt sources to CPU interrupts
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2016-10-25 15:19:29 -06:00 |
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Marc Rechte
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483f012600
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Initial implemention of the STM32 F37xx SDADC module. There are also changes to ADC, DAC modules. SDADC has only been tested in DMA mode and does not support external TIMER triggers. This is a work in progress.
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2016-10-25 14:14:10 -06:00 |
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Gregory Nutt
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6756b44dc3
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ESP32: Add framework to assign a a peripheral to a CPU interrupt
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2016-10-25 13:16:05 -06:00 |
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Gregory Nutt
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d5fceadacd
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Xtensa: Fix some compilation issues
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2016-10-25 12:34:23 -06:00 |
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Gregory Nutt
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2a59205ffa
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ESP32: Add CPU interrupt managmement logic; improve level interrupt decoding.
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2016-10-25 12:02:53 -06:00 |
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Gregory Nutt
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c457e26f2a
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ESP32: Add UART register definition file
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2016-10-25 08:35:07 -06:00 |
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Gregory Nutt
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04c6319e32
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Merged in slorquet/nuttx/stm32l4_uarts (pull request #155)
Enable and renames for 32l4 UARTs 4 and 5
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2016-10-25 13:09:17 +00:00 |
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Sebastien Lorquet
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27920eeae9
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Enable and renames for 32l4 UARTs 4 and 5
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2016-10-25 10:55:25 +02:00 |
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Sebastien Lorquet
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9be23d0c76
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Fix i2c devices rcc registers
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2016-10-25 10:53:24 +02:00 |
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Max Kriegleder
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1d50259358
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STM32 F4 I2c: A new implementation of the STM32 F4 I2C bottom half. The commin I2C as this did not handled correctly in the current implementation (see also https://github.com/PX4/NuttX/issues/54). The changes almost exclusively affect the ISR.
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2016-10-24 16:32:10 -06:00 |
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Gregory Nutt
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1dabbd8489
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Costmetic changes
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2016-10-24 16:18:30 -06:00 |
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Gregory Nutt
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3d4ce55ebd
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Oops.. a couple of hunks failed in the last patch. Hope I got them fixed correctly.
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2016-10-24 15:25:40 -06:00 |
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Gregory Nutt
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7b7e352d6e
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ESP32: Add some peripheral configuration
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2016-10-24 14:09:47 -06:00 |
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Gregory Nutt
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818b0171d7
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ESP32: Clock configuration is not yet implemented. ESP32 will be running a XTAL frequency.
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2016-10-24 07:30:11 -06:00 |
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Gregory Nutt
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4cf60022ca
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Xtensa: Correct some compile issues
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2016-10-23 16:25:55 -06:00 |
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Gregory Nutt
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2514ddec8b
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Xtensa: Add NMI handler
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2016-10-23 16:24:09 -06:00 |
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Gregory Nutt
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261eec110b
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Xtensa: Mismatched #endif
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2016-10-23 14:19:08 -06:00 |
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Gregory Nutt
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9a9488ae92
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ESP32: Fix heap initialization
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2016-10-23 14:20:03 -06:00 |
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Gregory Nutt
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a41c98952c
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Xtensa: Fix some compilation issues
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2016-10-23 13:33:48 -06:00 |
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Gregory Nutt
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1166d44441
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Minor improvement to the up_irq_save() implementation
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2016-10-23 13:37:40 -06:00 |
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Gregory Nutt
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6bbe55602c
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Xtensa: Add tie.h
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2016-10-23 13:25:41 -06:00 |
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Gregory Nutt
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978c788926
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Merge branch 'esp32' of bitbucket.org:nuttx/nuttx
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2016-10-23 11:46:04 -06:00 |
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Gregory Nutt
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1fcced12eb
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Xtensa: Timer code now compiles okay
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2016-10-23 11:31:48 -06:00 |
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Gregory Nutt
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2b33768d09
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Xtensa: Revert back to some XCHAL naming
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2016-10-23 10:39:51 -06:00 |
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Gregory Nutt
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bf363d103b
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Merge branch 'esp32' of bitbucket.org:nuttx/nuttx into esp32
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2016-10-23 10:47:31 -06:00 |
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Gregory Nutt
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9f06b13ffb
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Xtensa: Add core.h header file
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2016-10-23 10:43:16 -06:00 |
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Gregory Nutt
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9b5fedc81e
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Xtensa: Add implementation of system timer; Correct CFLAGS
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2016-10-23 10:08:38 -06:00 |
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Gregory Nutt
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c3d76d56bc
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Xtensa: Fix some compilation issues
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2016-10-23 10:06:30 -06:00 |
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Gregory Nutt
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09b462e419
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Xtensa: Add region protected; Implement some missing signal handling logic.
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2016-10-23 09:02:50 -06:00 |
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Gregory Nutt
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112b62a14e
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Xtensa: Correct variou compilation issues
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2016-10-23 08:04:57 -06:00 |
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Gregory Nutt
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a9a4f6384d
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Xtensa: Add interrupt enable/disable controls. Add dummy timer and IRQ initialization.
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2016-10-23 08:00:17 -06:00 |
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Gregory Nutt
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ea175cd98b
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Xtensa: Flesh out other interrupt handlers. Suppress nested interrupts, at least for now.
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2016-10-23 07:08:19 -06:00 |
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Gregory Nutt
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75df09fd40
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Remove support for software prioritization of interrupts
|
2016-10-23 06:37:28 -06:00 |
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