Commit Graph

18481 Commits

Author SHA1 Message Date
raiden00pl
6fe95d8314 stm32: add SocketCAN support, based on stm32_can.c 2022-01-05 06:16:41 -08:00
Zeng Zhaoxiu
fb43fd73ed signal: signal handler may cause task's state error
For example, task is blocked by nxsem_wait(sem1), use nxsem_wait(sem2)
in signal handler, and take sem2 successfully, after exit from signal
handler to task, nxsem_wait(sem1) returns OK, but the correct result
should be -EINTR.

Signed-off-by: Zeng Zhaoxiu <zhaoxiu.zeng@gmail.com>
2022-01-05 21:36:44 +09:00
raiden00pl
5b9b3814f8 stm32: add CAN error support 2022-01-05 18:33:06 +08:00
Jukka Laitinen
9aea5d5dbb arch/risc-v/src/mpfs/mpfs_serial.c: Correct setting of nbits
Number of bits was set wrongly in TCSETS for mpfs

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2022-01-05 12:21:38 +08:00
Huang Qi
3a0e86c99b arch/risc-v: Replace __LP64__ with CONFIG_ARCH_RV64
It can provide better auto complete experience for modern code editor,
since they use clang/gcc based parser to analyze code but lacks some
target dependent info such as __LP64__ for riscv64.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-01-04 23:22:43 +08:00
Eero Nurkkala
c87ae33459 risc-v/opensbi: update to version 1.0
OpenSBI recently introduced version 1.0. Use the latest
version here as well.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-01-04 15:50:25 +08:00
Huang Qi
845168ce12 arch/risc-v: Refine riscv_assert.c
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-01-04 14:46:24 +08:00
Huang Qi
a6662c2887 arch/risc-v: Refine arch.h
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-01-04 14:46:24 +08:00
Abdelatif Guettouche
4edc5fb701 xtensa: Rename up_stack_color to xtensa_stack_color since it's an
internal function.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-01-04 02:45:45 +08:00
Petro Karashchenko
4b190fbce1 arch/arm/samv7: correct number on interrupts
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-03 22:10:22 +08:00
Petro Karashchenko
6c2b40f98a typos: fix typos in many files
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-03 22:10:07 +08:00
Gustavo Henrique Nihei
c04fbb0365 risc-v/esp32c3: Sort LIBC_ARCH_* configs alphabetically
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-01-03 10:37:04 -03:00
Gustavo Henrique Nihei
78362b0949 xtensa/esp32: Use ROM implementations of libc functions
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-01-03 10:37:04 -03:00
Petro Karashchenko
c7d3a674fd drivers/sensors/as5048b: fix lower half init issue
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-03 11:38:44 +08:00
Xiang Xiao
d2309195da boards/sim: Add vncserver config for test
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-01-03 11:19:32 +08:00
Petro Karashchenko
d23ad9b9b0 userspace: fix typos in comments
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-02 20:50:30 +01:00
Huang Qi
b11e90f384 arch/risc-v: Refine riscv_initialstate.c
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-01-02 01:21:48 +08:00
Gustavo Henrique Nihei
c1fac720ec xtensa/esp32: Add missing param documentation for SPI Flash function
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-01-01 20:37:44 +08:00
Gustavo Henrique Nihei
25f2dc2077 risc-v/esp32c3: Enable the creation of encrypted Flash partitions
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-01-01 20:37:44 +08:00
Gustavo Henrique Nihei
9e5e60ba48 esp32s2/esp32c3: Build MCUboot bootloader with Flash Encryption support 2022-01-01 20:37:44 +08:00
Norman Rasmussen
185de258bf Fix preprocessing directives for uart flow control
commit 58bd873729 had a mix of
`#if defined(X)` and `#ifdef X`, but used `#if X` in its TCSETS ioctl
logic which causes compile warnings.
2021-12-31 18:51:17 +08:00
Dong Heng
c56c58020a risc-v/esp32c3: SPI flash MTD device uses all flash space 2021-12-31 11:40:23 +08:00
Gustavo Henrique Nihei
f130d8b91e xtensa/esp32s2: Remove unavailable support for ROM Basic Console
This feature is only available for ESP32 chips.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-12-31 00:56:08 +08:00
Gustavo Henrique Nihei
74c02fbadb risc-v/esp32c3: Remove unavailable support for ROM Basic Console
This feature is only available on ESP32 chips.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-12-31 00:56:08 +08:00
Huang Qi
33df35f003 arch/risc-v: Correct epc adjustment with C ISA
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2021-12-30 22:54:17 +09:00
chao.an
736add0fe8 arch/backtrace: correct the skip counter
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-30 16:57:40 +08:00
Gustavo Henrique Nihei
80da9abd6a xtensa/esp32: Move assertions after logging to improve debugging
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-12-30 12:35:41 +08:00
Gustavo Henrique Nihei
b6addaa4c7 xtensa/esp32: Enable the creation of encrypted Flash partitions
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-12-30 12:35:41 +08:00
Gustavo Henrique Nihei
340e0c8a8f xtensa/esp32: Build MCUboot bootloader with Flash Encryption support
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-12-30 12:35:41 +08:00
Jukka Laitinen
3beecbe905 risc-v/mpfs: Add MSSIO GPIO pinmap configuration
Add a pinmap header for mpfs to be able to configure MSSIO GPIOs
This also adds Kconfigs for some different chip/package types of the PolarFire SOC

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2021-12-30 11:49:00 +08:00
Huang Qi
2de22980e5 arch/risc-v: Refine syscall interface
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2021-12-30 11:47:42 +08:00
Norman Rasmussen
091322ba4a Add backtrace to risc-v common sources 2021-12-30 01:30:08 +08:00
Xiang Xiao
b92c90ee81 arch/arm: Fix rebase error in arm_backtrace_thumb.c
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-12-29 20:42:05 +08:00
Huang Qi
c15195b126 arch/risc-v: Refine riscv_testset.S
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2021-12-29 06:06:01 -06:00
Xiang Xiao
228442ee23 arch/renesas: Undefine macro B0 to avoid the confliction
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-12-29 08:11:08 -03:00
Huang Qi
901361be48 arch/risc-v: Move more files to common
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2021-12-29 01:19:30 -06:00
Huang Qi
22ae2e0121 arch/risc-v: Refine riscv_fpu.S
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2021-12-29 01:19:30 -06:00
ChenWen
6ce335fa84 xtensa/esp32: Fix some Wi-Fi issues
1. Fix the issue that Wi-Fi can't connect to some special routers occasionally.
    2. Update Wi-Fi driver code to fix issue of failure to send pkt.
    3. Replace software random with hardware random
2021-12-28 23:48:25 -06:00
chao.an
7ed0b97414 make/allsyms: skip the unnecessary link operation
For incremental compilation, skip the stage 1 dummy link
operation if nuttx elf has been generated

Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-28 23:47:10 -06:00
Xiang Xiao
186ac17f1f arch: Select ARCH_HAVE_BACKTRACE in Kconfig for supported arch
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-12-29 13:34:02 +08:00
Xiang Xiao
dd942f0b04 sched/backtrace: Dump the complete stack regardless the depth
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-12-29 12:09:54 +08:00
Xiang Xiao
f302e8fd40 arch/sim: Implement up_backtrace
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-12-29 11:03:08 +08:00
Xiang Xiao
f061766801 video/fb: Fix typo error in include/nuttx/video/fb.h
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-12-28 17:21:18 -03:00
Huang Qi
e75321e61c arch/risc-v: Move riscv_blocktask.c to common
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2021-12-28 11:32:15 -06:00
Norman Rasmussen
934a79736a Use userspace chosen channel numbers when starting bl602 pwm
commit 2889315c20 added support for pwm
but didn't read the channel numbers provided by user-space. They should
be, otherwise it's not possible to start a sub-set of channels that are
not the first "n" channels.
2021-12-28 06:27:51 -06:00
chao.an
cf2dfa8985 arch/arm/assert: move the arm_assert to common code
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-28 05:09:30 -06:00
Huang Qi
d71cfc178a arch/risc-v: Remove unneeded kconfigs
CONFIG_RV32IM_HW_MULDIV can be safely removed since this behavior is
controlled by M extension.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2021-12-28 05:02:42 -06:00
chao.an
579738c8fa arch/arm: move the backtrace implement to common code
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-28 03:02:01 -06:00
Norman Rasmussen
1e2f067181 pwm: add option to break the loops when using multiple PWM channels
commit 7354ab187e added an option to break
the loops when using multiple PWM channels to arm pwm drivers. This adds
the same support to the risc-v pwm drivers.
2021-12-28 03:01:27 -06:00
Huang Qi
c2e8c92b25 arch/risc-v: Refine Toolchain.defs
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2021-12-28 00:30:10 -06:00